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-rw-r--r--arch/arm/cpu/armv7/sunxi/clock_sun6i.c10
-rw-r--r--arch/arm/cpu/armv7/sunxi/prcm.c12
-rw-r--r--arch/arm/include/asm/arch-sunxi/cpu_sun4i.h1
-rw-r--r--arch/arm/include/asm/arch-sunxi/gpio.h2
-rw-r--r--arch/arm/include/asm/arch-sunxi/i2c.h3
-rw-r--r--arch/arm/include/asm/arch-sunxi/prcm.h2
-rw-r--r--arch/nds32/cpu/n1213/start.S2
-rw-r--r--arch/nds32/include/asm/macro.h22
-rw-r--r--arch/nds32/include/asm/posix_types.h4
9 files changed, 46 insertions, 12 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 4501884e1c..1da5455c9a 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -77,6 +77,16 @@ int clock_twi_onoff(int port, int state)
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ if (port == 5) {
+ if (state)
+ prcm_apb0_enable(
+ PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
+ else
+ prcm_apb0_disable(
+ PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
+ return 0;
+ }
+
/* set the apb clock gate for twi */
if (state)
setbits_le32(&ccm->apb2_gate,
diff --git a/arch/arm/cpu/armv7/sunxi/prcm.c b/arch/arm/cpu/armv7/sunxi/prcm.c
index 19b4938dc9..e1d091fd57 100644
--- a/arch/arm/cpu/armv7/sunxi/prcm.c
+++ b/arch/arm/cpu/armv7/sunxi/prcm.c
@@ -33,3 +33,15 @@ void prcm_apb0_enable(u32 flags)
/* deassert reset for module */
setbits_le32(&prcm->apb0_reset, flags);
}
+
+void prcm_apb0_disable(u32 flags)
+{
+ struct sunxi_prcm_reg *prcm =
+ (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
+
+ /* assert reset for module */
+ clrbits_le32(&prcm->apb0_reset, flags);
+
+ /* close the clock for module */
+ clrbits_le32(&prcm->apb0_gate, flags);
+}
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 63b161ab03..0cdefdcdf4 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -134,6 +134,7 @@
#define SUNXI_RTC_BASE 0x01f00000
#define SUNXI_PRCM_BASE 0x01f01400
#define SUN6I_CPUCFG_BASE 0x01f01c00
+#define SUNXI_R_TWI_BASE 0x01f02400
#define SUNXI_R_UART_BASE 0x01f02800
#define SUNXI_R_PIO_BASE 0x01f02c00
#define SUN6I_P2WI_BASE 0x01f03400
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index a2a9a38dbe..649f6cd840 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -199,6 +199,8 @@ enum sunxi_gpio_number {
#define SUN6I_GPL1_R_P2WI_SDA 3
#define SUN8I_GPL_R_RSB 2
+#define SUN8I_H3_GPL_R_TWI 2
+#define SUN8I_A23_GPL_R_TWI 3
#define SUN8I_GPL_R_UART 2
#define SUN9I_GPN_R_RSB 3
diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h b/arch/arm/include/asm/arch-sunxi/i2c.h
index 561cd2be16..4dfd313f1a 100644
--- a/arch/arm/include/asm/arch-sunxi/i2c.h
+++ b/arch/arm/include/asm/arch-sunxi/i2c.h
@@ -23,6 +23,9 @@
#ifdef CONFIG_I2C4_ENABLE
#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE
#endif
+#ifdef CONFIG_R_I2C_ENABLE
+#define CONFIG_I2C_MVTWSI_BASE5 SUNXI_R_TWI_BASE
+#endif
/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
#define CONFIG_SYS_TCLK 24000000
diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h b/arch/arm/include/asm/arch-sunxi/prcm.h
index 82ed541e91..556c1af600 100644
--- a/arch/arm/include/asm/arch-sunxi/prcm.h
+++ b/arch/arm/include/asm/arch-sunxi/prcm.h
@@ -236,5 +236,7 @@ struct sunxi_prcm_reg {
};
void prcm_apb0_enable(u32 flags);
+void prcm_apb0_disable(u32 flags);
+
#endif /* __ASSEMBLY__ */
#endif /* _PRCM_H */
diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S
index 2f0b76c04c..8b7f8f4540 100644
--- a/arch/nds32/cpu/n1213/start.S
+++ b/arch/nds32/cpu/n1213/start.S
@@ -400,7 +400,7 @@ end_flush_dcache:
! FIXME: Other way to get PC?
! FIXME: Update according to the newest spec!!
1:
- la $r28, 1
+ li $r28, 1
push $r28
mfsr $r28, PSW ! $PSW
push $r28
diff --git a/arch/nds32/include/asm/macro.h b/arch/nds32/include/asm/macro.h
index f5c853991a..66be258052 100644
--- a/arch/nds32/include/asm/macro.h
+++ b/arch/nds32/include/asm/macro.h
@@ -23,20 +23,20 @@
*/
.macro write32, addr, data
- li $r4, addr
- li $r5, data
+ li $r4, \addr
+ li $r5, \data
swi $r5, [$r4]
.endm
.macro write16, addr, data
- li $r4, addr
- li $r5, data
+ li $r4, \addr
+ li $r5, \data
shi $r5, [$r4]
.endm
.macro write8, addr, data
- li $r4, addr
- li $r5, data
+ li $r4, \addr
+ li $r5, \data
sbi $r5, [$r4]
.endm
@@ -46,17 +46,17 @@
* Note: Instruction 'ori' supports immediate value up to 15 bits.
*/
.macro setbf32, addr, data
- li $r4, addr
+ li $r4, \addr
lwi $r5, [$r4]
- li $r6, data
+ li $r6, \data
or $r5, $r5, $r6
swi $r5, [$r4]
.endm
.macro setbf15, addr, data
- li $r4, addr
+ li $r4, \addr
lwi $r5, [$r4]
- ori $r5, $r5, data
+ ori $r5, $r5, \data
swi $r5, [$r4]
.endm
@@ -69,7 +69,7 @@
*/
.macro wait_timer, time
- li $r4, time
+ li $r4, \time
1:
nop
addi $r4, $r4, -1
diff --git a/arch/nds32/include/asm/posix_types.h b/arch/nds32/include/asm/posix_types.h
index a92803878e..e6c591dfe4 100644
--- a/arch/nds32/include/asm/posix_types.h
+++ b/arch/nds32/include/asm/posix_types.h
@@ -33,7 +33,11 @@ typedef int __kernel_pid_t;
typedef unsigned short __kernel_ipc_pid_t;
typedef unsigned short __kernel_uid_t;
typedef unsigned short __kernel_gid_t;
+#ifdef __GNUC__
+typedef __SIZE_TYPE__ __kernel_size_t;
+#else
typedef unsigned int __kernel_size_t;
+#endif
typedef int __kernel_ssize_t;
typedef int __kernel_ptrdiff_t;
typedef long __kernel_time_t;
generated by cgit (git 2.34.1) at 2024-12-29 11:44:16 +0000