diff options
Diffstat (limited to 'arch')
33 files changed, 310 insertions, 75 deletions
diff --git a/arch/arc/dts/emsdp.dts b/arch/arc/dts/emsdp.dts index d307b95d8e..dbebdb4e76 100644 --- a/arch/arc/dts/emsdp.dts +++ b/arch/arc/dts/emsdp.dts @@ -32,4 +32,27 @@ reg-shift = <2>; reg-io-width = <4>; }; + + mmcclk_biu: mmcclk-biu { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + }; + + mmcclk_ciu: mmcclk-ciu { + compatible = "fixed-clock"; + clock-frequency = <100000000>; + #clock-cells = <0>; + }; + + mmc: mmc0@f0010000 { + compatible = "snps,dw-mshc"; + reg = <0xf0010000 0x400>; + bus-width = <4>; + fifo-depth = <256>; + clocks = <&mmcclk_biu>, <&mmcclk_ciu>; + clock-names = "biu", "ciu"; + max-frequency = <25000000>; + }; + }; diff --git a/arch/arc/dts/iot_devkit.dts b/arch/arc/dts/iot_devkit.dts index ebf5a950f0..c0173fa5ab 100644 --- a/arch/arc/dts/iot_devkit.dts +++ b/arch/arc/dts/iot_devkit.dts @@ -42,4 +42,26 @@ compatible = "nop-phy"; #phy-cells = <0>; }; + + mmcclk_biu: mmcclk-biu { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + }; + + mmcclk_ciu: mmcclk-ciu { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + }; + + mmc: mmc0@f000b000 { + compatible = "snps,dw-mshc"; + reg = <0xf000b000 0x400>; + bus-width = <4>; + fifo-depth = <128>; + clocks = <&mmcclk_biu>, <&mmcclk_ciu>; + clock-names = "biu", "ciu"; + max-frequency = <25000000>; + }; }; diff --git a/arch/arm/dts/am335x-baltos.dts b/arch/arm/dts/am335x-baltos.dts index f939cf6406..b3c13c9a9d 100644 --- a/arch/arm/dts/am335x-baltos.dts +++ b/arch/arm/dts/am335x-baltos.dts @@ -409,16 +409,26 @@ pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@7 { + reg = <7>; + eee-broken-100tx; + eee-broken-1000t; + }; }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; + phy-handle = <&phy0>; phy-mode = "rmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <7>; + phy-handle = <&phy1>; phy-mode = "rgmii-txid"; dual_emac_res_vlan = <2>; }; diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi index 40a3c35ff8..5b8230e281 100644 --- a/arch/arm/dts/am335x-bone-common.dtsi +++ b/arch/arm/dts/am335x-bone-common.dtsi @@ -360,16 +360,12 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; - phy-mode = "mii"; -}; - -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; + phy-handle = <ðphy0>; phy-mode = "mii"; }; &mac { + slaves = <1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; @@ -381,6 +377,10 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; }; &mmc1 { diff --git a/arch/arm/dts/am335x-brsmarc1.dts b/arch/arm/dts/am335x-brsmarc1.dts index 1a7f9a5365..e1738b6dde 100644 --- a/arch/arm/dts/am335x-brsmarc1.dts +++ b/arch/arm/dts/am335x-brsmarc1.dts @@ -247,6 +247,14 @@ &davinci_mdio { status = "okay"; + + ethphy0: ethernet-phy@1 { + reg = <1>; + }; + + ethphy1: ethernet-phy@3 { + reg = <3>; + }; }; &mac { @@ -258,13 +266,13 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <1>; + phy-handle = <ðphy0>; phy-mode = "rmii"; ti,ledcr = <0x0480>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <3>; + phy-handle = <ðphy1>; phy-mode = "rmii"; ti,ledcr = <0x0480>; }; diff --git a/arch/arm/dts/am335x-brxre1.dts b/arch/arm/dts/am335x-brxre1.dts index 708407daf2..a0d046d07a 100644 --- a/arch/arm/dts/am335x-brxre1.dts +++ b/arch/arm/dts/am335x-brxre1.dts @@ -206,6 +206,14 @@ &davinci_mdio { status = "okay"; + + ethphy0: ethernet-phy@1 { + reg = <1>; + }; + + ethphy1: ethernet-phy@2 { + reg = <2>; + }; }; &mac { @@ -213,12 +221,12 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <1>; + phy-handle = <ðphy0>; phy-mode = "mii"; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <2>; + phy-handle = <ðphy1>; phy-mode = "mii"; }; diff --git a/arch/arm/dts/am335x-chiliboard.dts b/arch/arm/dts/am335x-chiliboard.dts index 59431b2359..9c2a947aac 100644 --- a/arch/arm/dts/am335x-chiliboard.dts +++ b/arch/arm/dts/am335x-chiliboard.dts @@ -140,10 +140,14 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; + phy-handle = <ðphy0>; phy-mode = "rmii"; }; diff --git a/arch/arm/dts/am335x-draco.dts b/arch/arm/dts/am335x-draco.dts index 25d0480ecd..f8faa8f7c4 100644 --- a/arch/arm/dts/am335x-draco.dts +++ b/arch/arm/dts/am335x-draco.dts @@ -143,7 +143,7 @@ }; &cpsw_emac0 { - phy_id = <&mdio0>, <0>; + phy-handle = <&phy0>; phy-mode = "rmii"; }; diff --git a/arch/arm/dts/am335x-evm.dts b/arch/arm/dts/am335x-evm.dts index fe27207588..0bda4d4429 100644 --- a/arch/arm/dts/am335x-evm.dts +++ b/arch/arm/dts/am335x-evm.dts @@ -675,6 +675,7 @@ pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; status = "okay"; + slaves = <1>; }; &davinci_mdio { @@ -682,16 +683,15 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; -}; -&cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; - phy-mode = "rgmii-txid"; + ethphy0: ethernet-phy@0 { + reg = <0>; + }; }; -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; - phy-mode = "rgmii-txid"; +&cpsw_emac0 { + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; }; &tscadc { diff --git a/arch/arm/dts/am335x-evmsk.dts b/arch/arm/dts/am335x-evmsk.dts index 0767578aee..5762967cf7 100644 --- a/arch/arm/dts/am335x-evmsk.dts +++ b/arch/arm/dts/am335x-evmsk.dts @@ -630,17 +630,25 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; - phy-mode = "rgmii-txid"; + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; - phy-mode = "rgmii-txid"; + phy-handle = <ðphy1>; + phy-mode = "rgmii-id"; dual_emac_res_vlan = <2>; }; diff --git a/arch/arm/dts/am335x-icev2.dts b/arch/arm/dts/am335x-icev2.dts index debc6f6132..37484cb6f5 100644 --- a/arch/arm/dts/am335x-icev2.dts +++ b/arch/arm/dts/am335x-icev2.dts @@ -397,13 +397,13 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <1>; + phy-handle = <ðphy0>; phy-mode = "rmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <3>; + phy-handle = <ðphy1>; phy-mode = "rmii"; dual_emac_res_vlan = <2>; }; @@ -427,4 +427,12 @@ status = "okay"; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; reset-delay-us = <2>; /* PHY datasheet states 1uS min */ + + ethphy0: ethernet-phy@1 { + reg = <1>; + }; + + ethphy1: ethernet-phy@3 { + reg = <3>; + }; }; diff --git a/arch/arm/dts/am335x-igep0033.dtsi b/arch/arm/dts/am335x-igep0033.dtsi index a5769a8f5f..f102f6adad 100644 --- a/arch/arm/dts/am335x-igep0033.dtsi +++ b/arch/arm/dts/am335x-igep0033.dtsi @@ -102,15 +102,23 @@ &davinci_mdio { status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; + phy-handle = <ðphy0>; phy-mode = "rmii"; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; + phy-handle = <ðphy1>; phy-mode = "rmii"; }; diff --git a/arch/arm/dts/am335x-pxm2.dtsi b/arch/arm/dts/am335x-pxm2.dtsi index d9243d5d3d..19bd7e2420 100644 --- a/arch/arm/dts/am335x-pxm2.dtsi +++ b/arch/arm/dts/am335x-pxm2.dtsi @@ -117,12 +117,12 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; + phy-handle = <ðphy0>; phy-mode = "rgmii-txid"; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; + phy-handle = <ðphy1>; phy-mode = "rgmii-txid"; }; @@ -131,6 +131,14 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; }; &elm { diff --git a/arch/arm/dts/am335x-rut.dts b/arch/arm/dts/am335x-rut.dts index a5716a929f..145247344f 100644 --- a/arch/arm/dts/am335x-rut.dts +++ b/arch/arm/dts/am335x-rut.dts @@ -149,13 +149,8 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <1>; - phy-mode = "rmii"; -}; - -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <0>; phy-mode = "rmii"; + phy-handle = <ðernet_phy>; }; &davinci_mdio { diff --git a/arch/arm/dts/am335x-shc.dts b/arch/arm/dts/am335x-shc.dts index 5cdd309b90..8e35c439e5 100644 --- a/arch/arm/dts/am335x-shc.dts +++ b/arch/arm/dts/am335x-shc.dts @@ -197,17 +197,17 @@ }; }; +&cpsw_emac0 { + phy-mode = "mii"; + phy-handle = <ðernetphy0>; +}; + &mac { pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; status = "okay"; slaves = <1>; - cpsw_emac0: slave@4a100200 { - phy_id = <&davinci_mdio>, <0>; - phy-mode = "mii"; - phy-handle = <ðernetphy0>; - }; }; &mmc1 { diff --git a/arch/arm/dts/am335x-sl50.dts b/arch/arm/dts/am335x-sl50.dts index 1bcc60424e..ebb56bdaad 100644 --- a/arch/arm/dts/am335x-sl50.dts +++ b/arch/arm/dts/am335x-sl50.dts @@ -507,13 +507,8 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; - phy-mode = "mii"; -}; - -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; phy-mode = "mii"; + phy-handle = <ðphy0>; }; &mac { @@ -528,6 +523,12 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; + reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + reset-delay-us = <100>; /* PHY datasheet states 100us min */ + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; }; &sham { diff --git a/arch/arm/dts/am437x-gp-evm.dts b/arch/arm/dts/am437x-gp-evm.dts index 142bfc52a1..3c500d52db 100644 --- a/arch/arm/dts/am437x-gp-evm.dts +++ b/arch/arm/dts/am437x-gp-evm.dts @@ -645,10 +645,14 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; + phy-handle = <ðphy0>; phy-mode = "rgmii"; }; diff --git a/arch/arm/dts/am437x-idk-evm.dts b/arch/arm/dts/am437x-idk-evm.dts index 19d1462d15..8f6824c198 100644 --- a/arch/arm/dts/am437x-idk-evm.dts +++ b/arch/arm/dts/am437x-idk-evm.dts @@ -385,6 +385,7 @@ }; &mac { + slaves = <1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; @@ -396,10 +397,14 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; + phy-handle = <ðphy0>; phy-mode = "rgmii"; }; diff --git a/arch/arm/dts/am437x-sk-evm.dts b/arch/arm/dts/am437x-sk-evm.dts index dc8fcde458..66a3bd1dfa 100644 --- a/arch/arm/dts/am437x-sk-evm.dts +++ b/arch/arm/dts/am437x-sk-evm.dts @@ -626,16 +626,24 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; + + ethphy0: ethernet-phy@4 { + reg = <4>; + }; + + ethphy1: ethernet-phy@5 { + reg = <5>; + }; }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <4>; + phy-handle = <ðphy0>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <5>; + phy-handle = <ðphy1>; phy-mode = "rgmii"; dual_emac_res_vlan = <2>; }; diff --git a/arch/arm/dts/am43x-epos-evm.dts b/arch/arm/dts/am43x-epos-evm.dts index fa4d1e3f32..65f157ed59 100644 --- a/arch/arm/dts/am43x-epos-evm.dts +++ b/arch/arm/dts/am43x-epos-evm.dts @@ -389,6 +389,7 @@ pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; status = "okay"; + slaves = <1>; }; &davinci_mdio { @@ -396,15 +397,14 @@ pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; -}; -&cpsw_emac0 { - phy_id = <&davinci_mdio>, <16>; - phy-mode = "rmii"; + ethphy0: ethernet-phy@16 { + reg = <16>; + }; }; -&cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; +&cpsw_emac0 { + phy-handle = <ðphy0>; phy-mode = "rmii"; }; diff --git a/arch/arm/dts/am57xx-idk-common.dtsi b/arch/arm/dts/am57xx-idk-common.dtsi index fdb4e0e47c..590fb14caf 100644 --- a/arch/arm/dts/am57xx-idk-common.dtsi +++ b/arch/arm/dts/am57xx-idk-common.dtsi @@ -372,17 +372,27 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <0>; + phy-handle = <ðphy0>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <1>; + phy-handle = <ðphy1>; phy-mode = "rgmii"; dual_emac_res_vlan = <2>; }; +&davinci_mdio { + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &usb2_phy1 { phy-supply = <&ldousb_reg>; }; diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts index aa426dabb6..43de9638e3 100644 --- a/arch/arm/dts/dra7-evm.dts +++ b/arch/arm/dts/dra7-evm.dts @@ -479,17 +479,27 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <2>; + phy-handle = <ðphy0>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <3>; + phy-handle = <ðphy1>; phy-mode = "rgmii"; dual_emac_res_vlan = <2>; }; +&davinci_mdio { + ethphy0: ethernet-phy@2 { + reg = <2>; + }; + + ethphy1: ethernet-phy@3 { + reg = <3>; + }; +}; + &dcan1 { status = "ok"; pinctrl-names = "default", "sleep", "active"; diff --git a/arch/arm/dts/dra71-evm.dts b/arch/arm/dts/dra71-evm.dts index 64363f75c0..9bf08294b2 100644 --- a/arch/arm/dts/dra71-evm.dts +++ b/arch/arm/dts/dra71-evm.dts @@ -201,13 +201,13 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <2>; + phy-handle = <&dp83867_0>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <3>; + phy-handle = <&dp83867_1>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <2>; }; diff --git a/arch/arm/dts/dra72-evm-revc.dts b/arch/arm/dts/dra72-evm-revc.dts index bf588d0072..fafc2a4d7b 100644 --- a/arch/arm/dts/dra72-evm-revc.dts +++ b/arch/arm/dts/dra72-evm-revc.dts @@ -61,13 +61,13 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <2>; + phy-handle = <&dp83867_0>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <3>; + phy-handle = <&dp83867_1>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <2>; }; diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts index c572693b16..154b0a0ceb 100644 --- a/arch/arm/dts/dra72-evm.dts +++ b/arch/arm/dts/dra72-evm.dts @@ -51,10 +51,16 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <3>; + phy-handle = <ðphy0>; phy-mode = "rgmii"; }; +&davinci_mdio { + ethphy0: ethernet-phy@3 { + reg = <3>; + }; +}; + &mmc1 { pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; pinctrl-0 = <&mmc1_pins_default>; diff --git a/arch/arm/dts/dra76-evm.dts b/arch/arm/dts/dra76-evm.dts index a1f289f345..e3da17ac97 100644 --- a/arch/arm/dts/dra76-evm.dts +++ b/arch/arm/dts/dra76-evm.dts @@ -341,13 +341,13 @@ }; &cpsw_emac0 { - phy_id = <&davinci_mdio>, <2>; + phy-handle = <&dp83867_0>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { - phy_id = <&davinci_mdio>, <3>; + phy-handle = <&dp83867_1>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <2>; }; diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index 90b546e741..31663714a0 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -385,6 +385,14 @@ static void setup_mtrr(void) } } +int x86_cpu_init_tpl(void) +{ + setup_cpu_features(); + setup_identity(); + + return 0; +} + int x86_cpu_init_f(void) { if (ll_boot_init()) diff --git a/arch/x86/cpu/start_from_spl.S b/arch/x86/cpu/start_from_spl.S index a73b4d7c45..22cab2dd6c 100644 --- a/arch/x86/cpu/start_from_spl.S +++ b/arch/x86/cpu/start_from_spl.S @@ -31,6 +31,7 @@ _start: call board_init_f_init_reserve + call x86_cpu_reinit_f xorl %eax, %eax call board_init_f call board_init_f_r diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index feee0f915f..21a05dab7d 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -55,6 +55,7 @@ enum { X86_SYSCON_PINCONF, /* Intel x86 pin configuration */ X86_SYSCON_PMU, /* Power Management Unit */ X86_SYSCON_SCU, /* System Controller Unit */ + X86_SYSCON_PUNIT, /* Power unit */ }; struct cpuid_result { diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 17a4d34491..7f3ada06f6 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -76,6 +76,7 @@ struct arch_global_data { uint8_t x86_mask; uint32_t x86_device; uint64_t tsc_base; /* Initial value returned by rdtsc() */ + bool tsc_inited; /* true if tsc is ready for use */ unsigned long clock_rate; /* Clock rate of timer in Hz */ void *new_fdt; /* Relocated FDT */ uint32_t bist; /* Built-in self test value */ diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 2466ad2ad3..3e5d56d075 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -34,6 +34,15 @@ int x86_cpu_init_f(void); */ int x86_cpu_reinit_f(void); +/** + * x86_cpu_init_tpl() - Do the minimum possible CPU init + * + * This just sets up the CPU features and figured out the identity + * + * @return 0 (indicating success, to mimic cpu_init_f()) + */ +int x86_cpu_init_tpl(void); + int cpu_init_f(void); void setup_gdt(struct global_data *id, u64 *gdt_addr); /* diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 7623fc9ada..1677f80b25 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -5,11 +5,15 @@ #include <common.h> #include <debug_uart.h> +#include <dm.h> #include <malloc.h> #include <spl.h> +#include <syscon.h> #include <asm/cpu.h> +#include <asm/cpu_common.h> #include <asm/mrccache.h> #include <asm/mtrr.h> +#include <asm/pci.h> #include <asm/processor.h> #include <asm/spl.h> #include <asm-generic/sections.h> @@ -21,6 +25,32 @@ __weak int arch_cpu_init_dm(void) return 0; } +#ifdef CONFIG_TPL + +static int set_max_freq(void) +{ + if (cpu_get_burst_mode_state() == BURST_MODE_UNAVAILABLE) { + /* + * Burst Mode has been factory-configured as disabled and is not + * available in this physical processor package + */ + debug("Burst Mode is factory-disabled\n"); + return -ENOENT; + } + + /* Enable burst mode */ + cpu_set_burst_mode(true); + + /* Enable speed step */ + cpu_set_eist(true); + + /* Set P-State ratio */ + cpu_set_p_state_to_turbo_ratio(); + + return 0; +} +#endif + static int x86_spl_init(void) { #ifndef CONFIG_TPL @@ -31,10 +61,16 @@ static int x86_spl_init(void) * place it immediately below CONFIG_SYS_TEXT_BASE. */ char *ptr = (char *)0x110000; +#else + struct udevice *punit; #endif int ret; debug("%s starting\n", __func__); + if (IS_ENABLED(TPL)) + ret = x86_cpu_reinit_f(); + else + ret = x86_cpu_init_f(); ret = spl_init(); if (ret) { debug("%s: spl_init() failed\n", __func__); @@ -101,6 +137,14 @@ static int x86_spl_init(void) return ret; } mtrr_commit(true); +#else + ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit); + if (ret) + debug("Could not find PUNIT (err=%d)\n", ret); + + ret = set_max_freq(); + if (ret) + debug("Failed to set CPU frequency (err=%d)\n", ret); #endif return 0; diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index d70f590541..784e3a02de 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -5,6 +5,7 @@ #include <common.h> #include <debug_uart.h> +#include <dm.h> #include <spl.h> #include <asm/cpu.h> #include <asm/mtrr.h> @@ -23,6 +24,11 @@ static int x86_tpl_init(void) int ret; debug("%s starting\n", __func__); + ret = x86_cpu_init_tpl(); + if (ret) { + debug("%s: x86_cpu_init_tpl() failed\n", __func__); + return ret; + } ret = spl_init(); if (ret) { debug("%s: spl_init() failed\n", __func__); @@ -39,11 +45,6 @@ static int x86_tpl_init(void) return ret; } preloader_console_init(); - ret = print_cpuinfo(); - if (ret) { - debug("%s: print_cpuinfo() failed\n", __func__); - return ret; - } return 0; } @@ -106,7 +107,7 @@ int spl_spi_load_image(void) void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { - printf("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point); + debug("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point); jump_to_spl(spl_image->entry_point); hang(); } @@ -115,3 +116,27 @@ void spl_board_init(void) { preloader_console_init(); } + +#if !CONFIG_IS_ENABLED(PCI) +/* + * This is a fake PCI bus for TPL when it doesn't have proper PCI. It is enough + * to bind the devices on the PCI bus, some of which have early-regs properties + * providing fixed BARs. Individual drivers program these BARs themselves so + * that they can access the devices. The BARs are allocated statically in the + * device tree. + * + * Once SPL is running it enables PCI properly, but does not auto-assign BARs + * for devices, so the TPL BARs continue to be used. Once U-Boot starts it does + * the auto allocation (after relocation). + */ +static const struct udevice_id tpl_fake_pci_ids[] = { + { .compatible = "pci-x86" }, + { } +}; + +U_BOOT_DRIVER(pci_x86) = { + .name = "pci_x86", + .id = UCLASS_SIMPLE_BUS, + .of_match = tpl_fake_pci_ids, +}; +#endif |