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-rw-r--r--arch/arm/cpu/arm926ejs/armada100/dram.c4
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/cpu.c4
-rw-r--r--arch/arm/include/asm/u-boot-arm.h2
-rw-r--r--arch/arm/mach-davinci/misc.c4
-rw-r--r--arch/arm/mach-meson/board.c4
-rw-r--r--arch/arm/mach-mvebu/arm64-common.c8
-rw-r--r--arch/arm/mach-mvebu/dram.c4
-rw-r--r--arch/arm/mach-omap2/am33xx/emif4.c4
-rw-r--r--arch/arm/mach-omap2/omap3/emif4.c4
-rw-r--r--arch/arm/mach-omap2/omap3/sdrc.c4
-rw-r--r--arch/arm/mach-orion5x/dram.c4
-rw-r--r--arch/arm/mach-tegra/board2.c4
-rw-r--r--arch/arm/mach-tegra/tegra186/nvtboot_mem.c4
-rw-r--r--arch/arm/mach-uniphier/dram_init.c4
-rw-r--r--arch/x86/cpu/broadwell/sdram.c4
-rw-r--r--arch/x86/cpu/coreboot/sdram.c4
-rw-r--r--arch/x86/cpu/efi/sdram.c4
-rw-r--r--arch/x86/cpu/ivybridge/sdram.c4
-rw-r--r--arch/x86/cpu/qemu/dram.c4
-rw-r--r--arch/x86/cpu/quark/dram.c4
-rw-r--r--arch/x86/include/asm/u-boot-x86.h2
-rw-r--r--arch/x86/lib/efi/efi.c6
-rw-r--r--arch/x86/lib/fsp/fsp_dram.c4
23 files changed, 68 insertions, 26 deletions
diff --git a/arch/arm/cpu/arm926ejs/armada100/dram.c b/arch/arm/cpu/arm926ejs/armada100/dram.c
index f3b9a66cd5..6a9000e304 100644
--- a/arch/arm/cpu/arm926ejs/armada100/dram.c
+++ b/arch/arm/cpu/arm926ejs/armada100/dram.c
@@ -108,7 +108,9 @@ int dram_init(void)
* If this function is not defined here,
* board.c alters dram bank zero configuration defined above.
*/
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
dram_init();
+
+ return 0;
}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 1e6d90c68f..ea6c090e0b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -663,7 +663,7 @@ phys_size_t get_effective_memsize(void)
return ea_size;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
#ifdef CONFIG_SYS_DP_DDR_BASE_PHY
phys_size_t dp_ddr_size;
@@ -772,6 +772,8 @@ void dram_init_banksize(void)
}
}
#endif
+
+ return 0;
}
#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index 305a302dfc..2129f37c8f 100644
--- a/arch/arm/include/asm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
@@ -36,7 +36,7 @@ int arch_early_init_r(void);
/* board/.../... */
int board_init(void);
-void dram_init_banksize (void);
+int dram_init_banksize(void);
void board_quiesce_devices(void);
/* cpu/.../interrupt.c */
diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c
index e699d61874..e1064e0a2f 100644
--- a/arch/arm/mach-davinci/misc.c
+++ b/arch/arm/mach-davinci/misc.c
@@ -28,10 +28,12 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
}
#endif
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index f159cbf849..273dbeb020 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -34,11 +34,13 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
/* Reserve first 16 MiB of RAM for firmware */
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + (16 * 1024 * 1024);
gd->bd->bi_dram[0].size = gd->ram_size - (16 * 1024 * 1024);
+
+ return 0;
}
void reset_cpu(ulong addr)
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index 8f026559c2..1c0477a3ca 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -82,7 +82,7 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
const void *fdt = gd->fdt_blob;
const fdt32_t *val;
@@ -90,13 +90,13 @@ void dram_init_banksize(void)
val = get_memory_reg_prop(fdt, &len);
if (len < 0)
- return;
+ return -ENXIO;
ac = fdt_address_cells(fdt, 0);
sc = fdt_size_cells(fdt, 0);
if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
printf("invalid address/size cells\n");
- return;
+ return -ENXIO;
}
cells = ac + sc;
@@ -114,6 +114,8 @@ void dram_init_banksize(void)
i, (unsigned long)gd->bd->bi_dram[i].start,
(unsigned long)gd->bd->bi_dram[i].size);
}
+
+ return 0;
}
int arch_cpu_init(void)
diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c
index a8ec5ea21b..e3f304c366 100644
--- a/arch/arm/mach-mvebu/dram.c
+++ b/arch/arm/mach-mvebu/dram.c
@@ -273,7 +273,7 @@ int dram_init(void)
* If this function is not defined here,
* board.c alters dram bank zero configuration defined above.
*/
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
u64 size = 0;
int i;
@@ -287,6 +287,8 @@ void dram_init_banksize(void)
if (size > SDRAM_SIZE_MAX)
mvebu_sdram_bs_set(i, 0x40000000);
}
+
+ return 0;
}
#if defined(CONFIG_ARCH_MVEBU)
diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c
index 27fa3fb462..3a110f2845 100644
--- a/arch/arm/mach-omap2/am33xx/emif4.c
+++ b/arch/arm/mach-omap2/am33xx/emif4.c
@@ -32,10 +32,12 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
}
diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c
index a2aadc9816..d540cf08d2 100644
--- a/arch/arm/mach-omap2/omap3/emif4.c
+++ b/arch/arm/mach-omap2/omap3/emif4.c
@@ -142,7 +142,7 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize (void)
+int dram_init_banksize(void)
{
unsigned int size0 = 0, size1 = 0;
@@ -153,6 +153,8 @@ void dram_init_banksize (void)
gd->bd->bi_dram[0].size = size0;
gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
gd->bd->bi_dram[1].size = size1;
+
+ return 0;
}
/*
diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c
index 4f15ac9cb5..f64cd912ff 100644
--- a/arch/arm/mach-omap2/omap3/sdrc.c
+++ b/arch/arm/mach-omap2/omap3/sdrc.c
@@ -216,7 +216,7 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize (void)
+int dram_init_banksize(void)
{
unsigned int size0 = 0, size1 = 0;
@@ -227,6 +227,8 @@ void dram_init_banksize (void)
gd->bd->bi_dram[0].size = size0;
gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
gd->bd->bi_dram[1].size = size1;
+
+ return 0;
}
/*
diff --git a/arch/arm/mach-orion5x/dram.c b/arch/arm/mach-orion5x/dram.c
index 9ed93d25bc..e9c03f3837 100644
--- a/arch/arm/mach-orion5x/dram.c
+++ b/arch/arm/mach-orion5x/dram.c
@@ -42,7 +42,7 @@ int dram_init (void)
return 0;
}
-void dram_init_banksize (void)
+int dram_init_banksize(void)
{
int i;
@@ -52,4 +52,6 @@ void dram_init_banksize (void)
(long *) (gd->bd->bi_dram[i].start),
CONFIG_MAX_RAM_BANK_SIZE);
}
+
+ return 0;
}
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 5a457b913e..b73cd632e7 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -315,7 +315,7 @@ static ulong usable_ram_size_below_4g(void)
* start address of that bank cannot be represented in the 32-bit .size
* field.
*/
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = usable_ram_size_below_4g();
@@ -334,6 +334,8 @@ void dram_init_banksize(void)
gd->bd->bi_dram[1].start = 0;
gd->bd->bi_dram[1].size = 0;
}
+
+ return 0;
}
/*
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
index 37dd8d4334..bf1616628b 100644
--- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
+++ b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
@@ -72,7 +72,7 @@ int dram_init(void)
extern unsigned long nvtboot_boot_x0;
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
int i;
@@ -80,6 +80,8 @@ void dram_init_banksize(void)
gd->bd->bi_dram[i].start = ram_banks[i].start;
gd->bd->bi_dram[i].size = ram_banks[i].size;
}
+
+ return 0;
}
ulong board_get_usable_ram_top(ulong total_size)
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index d9f6c16fdc..f79b7cf3ca 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -232,7 +232,7 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
struct uniphier_dram_map dram_map[3] = {};
int i;
@@ -246,6 +246,8 @@ void dram_init_banksize(void)
gd->bd->bi_dram[i].start = dram_map[i].base;
gd->bd->bi_dram[i].size = dram_map[i].size;
}
+
+ return 0;
}
#ifdef CONFIG_OF_BOARD_SETUP
diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c
index 74736cd56c..774aba6359 100644
--- a/arch/x86/cpu/broadwell/sdram.c
+++ b/arch/x86/cpu/broadwell/sdram.c
@@ -28,9 +28,11 @@ ulong board_get_usable_ram_top(ulong total_size)
return mrc_common_board_get_usable_ram_top(total_size);
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
mrc_common_dram_init_banksize();
+
+ return 0;
}
void broadwell_fill_pei_data(struct pei_data *pei_data)
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index 7115e7a151..82407affaf 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -104,7 +104,7 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
int i, j;
@@ -121,4 +121,6 @@ void dram_init_banksize(void)
}
}
}
+
+ return 0;
}
diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c
index 51599445ab..413e55b596 100644
--- a/arch/x86/cpu/efi/sdram.c
+++ b/arch/x86/cpu/efi/sdram.c
@@ -22,8 +22,10 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = efi_get_ram_base();
gd->bd->bi_dram[0].size = CONFIG_EFI_RAM_SIZE;
+
+ return 0;
}
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 201368c9c7..643d804e35 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -46,9 +46,11 @@ ulong board_get_usable_ram_top(ulong total_size)
return mrc_common_board_get_usable_ram_top(total_size);
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
mrc_common_dram_init_banksize();
+
+ return 0;
}
static int read_seed_from_cmos(struct pei_data *pei_data)
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c
index a88d0d2654..9d84af5ef2 100644
--- a/arch/x86/cpu/qemu/dram.c
+++ b/arch/x86/cpu/qemu/dram.c
@@ -26,10 +26,12 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = 0;
gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
}
/*
diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c
index 40c830af96..47beb86da3 100644
--- a/arch/x86/cpu/quark/dram.c
+++ b/arch/x86/cpu/quark/dram.c
@@ -162,10 +162,12 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = 0;
gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
}
/*
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index cc7fc7370e..33c6e2bb68 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -41,7 +41,7 @@ void x86_disable_caches(void);
int x86_init_cache(void);
void reset_cpu(ulong addr);
ulong board_get_usable_ram_top(ulong total_size);
-void dram_init_banksize(void);
+int dram_init_banksize(void);
int default_print_cpuinfo(void);
/* Set up a UART which can be used with printch(), printhex8(), etc. */
diff --git a/arch/x86/lib/efi/efi.c b/arch/x86/lib/efi/efi.c
index 533318bc36..b1746fa474 100644
--- a/arch/x86/lib/efi/efi.c
+++ b/arch/x86/lib/efi/efi.c
@@ -92,7 +92,7 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
struct efi_mem_desc *desc, *end;
struct efi_entry_memmap *map;
@@ -103,7 +103,7 @@ void dram_init_banksize(void)
if (ret) {
/* We should have stopped in dram_init(), something is wrong */
debug("%s: Missing memory map\n", __func__);
- return;
+ return -ENXIO;
}
end = (struct efi_mem_desc *)((ulong)map + size);
desc = map->desc;
@@ -123,6 +123,8 @@ void dram_init_banksize(void)
EFI_PAGE_SHIFT;
num_banks++;
}
+
+ return 0;
}
int checkcpu(void)
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index fcfe693ce5..8b880cd594 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -41,10 +41,12 @@ int dram_init(void)
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = 0;
gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
}
/*
generated by cgit (git 2.34.1) at 2024-12-24 18:28:34 +0000