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-rw-r--r--arch/arc/include/asm/arcregs.h3
-rw-r--r--arch/arc/lib/start.S9
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 56ec11f789..9920d2e719 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -19,6 +19,9 @@
#define ARC_AUX_IDENTITY 0x04
#define ARC_AUX_STATUS32 0x0a
+/* STATUS32 Bits Positions */
+#define STATUS_AD_BIT 19 /* Enable unaligned access */
+
/* Instruction cache related auxiliary registers */
#define ARC_AUX_IC_IVIC 0x10
#define ARC_AUX_IC_CTRL 0x11
diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S
index e573ce7718..84959b41bd 100644
--- a/arch/arc/lib/start.S
+++ b/arch/arc/lib/start.S
@@ -61,6 +61,15 @@ ENTRY(_start)
1:
#endif
+#ifdef __ARC_UNALIGNED__
+ /*
+ * Enable handling of unaligned access in the CPU as by default
+ * this HW feature is disabled while GCC starting from 8.1.0
+ * unconditionally uses it for ARC HS cores.
+ */
+ flag 1 << STATUS_AD_BIT
+#endif
+
/* Establish C runtime stack and frame */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp