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-rw-r--r--arch/microblaze/cpu/cache.c5
-rw-r--r--arch/microblaze/cpu/start.S6
-rw-r--r--arch/microblaze/cpu/u-boot.lds2
-rw-r--r--arch/microblaze/include/asm/bitops.h3
-rw-r--r--arch/microblaze/include/asm/byteorder.h23
-rw-r--r--arch/microblaze/include/asm/posix_types.h3
-rw-r--r--arch/microblaze/lib/bootm.c5
-rw-r--r--arch/nios2/include/asm/status_led.h31
8 files changed, 10 insertions, 68 deletions
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index d258a69382..ce066b96e9 100644
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -61,12 +61,7 @@ void dcache_enable (void) {
void dcache_disable(void) {
#ifdef XILINX_USE_DCACHE
-#ifdef XILINX_DCACHE_BYTE_SIZE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
-#else
-#warning please rebuild BSPs and update configuration
- flush_cache(0, 32768);
-#endif
#endif
MSRCLR(0x80);
}
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 8564c4e30a..3da711d4d5 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -132,6 +132,12 @@ _start:
rsubi r8, r10, 0x26
sh r6, r0, r8
+ /* Flush cache before enable cache */
+ addik r5, r0, 0
+ addik r6, r0, XILINX_DCACHE_BYTE_SIZE
+flush: bralid r15, flush_cache
+ nop
+
/* enable instruction and data cache */
mfs r12, rmsr
ori r12, r12, 0xa0
diff --git a/arch/microblaze/cpu/u-boot.lds b/arch/microblaze/cpu/u-boot.lds
index 4297b93443..fe3d97dad8 100644
--- a/arch/microblaze/cpu/u-boot.lds
+++ b/arch/microblaze/cpu/u-boot.lds
@@ -45,7 +45,9 @@ SECTIONS
.data ALIGN(0x4):
{
__data_start = .;
+#ifdef CONFIG_OF_EMBED
dts/libdts.o (.data)
+#endif
*(.data)
__data_end = .;
}
diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h
index e8c835f7c0..eafa2b576b 100644
--- a/arch/microblaze/include/asm/bitops.h
+++ b/arch/microblaze/include/asm/bitops.h
@@ -319,7 +319,8 @@ extern __inline__ int ext2_test_bit(int nr, const volatile void * addr)
#define ext2_find_first_zero_bit(addr, size) \
ext2_find_next_zero_bit((addr), (size), 0)
-extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
+static inline unsigned long ext2_find_next_zero_bit(void *addr,
+ unsigned long size, unsigned long offset)
{
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
unsigned long result = offset & ~31UL;
diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h
index b2757a41f8..f3a471d1b2 100644
--- a/arch/microblaze/include/asm/byteorder.h
+++ b/arch/microblaze/include/asm/byteorder.h
@@ -20,29 +20,6 @@
#ifdef __GNUC__
-/* This is effectively a dupe of the arch-independent byteswap
- code in include/linux/byteorder/swab.h, however we force a cast
- of the result up to 32 bits. This in turn forces the compiler
- to explicitly clear the high 16 bits, which it wasn't doing otherwise.
-
- I think this is a symptom of a bug in mb-gcc. JW 20040303
-*/
-
-
-static __inline__ __u16 ___arch__swab16 (__u16 half_word)
-{
- /* 32 bit temp to cast result, forcing clearing of high word */
- __u32 temp;
-
- temp = ((half_word & 0x00FFU) << 8) | ((half_word & 0xFF00U) >> 8);
-
- return (__u16) temp;
-}
-
-#define __arch__swab16(x) ___arch__swab16(x)
-
-/* Microblaze has no arch-specific endian conversion insns */
-
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __BYTEORDER_HAS_U64__
# define __SWAB_64_THRU_32__
diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h
index 9a2cc663ec..38dc5aa85d 100644
--- a/arch/microblaze/include/asm/posix_types.h
+++ b/arch/microblaze/include/asm/posix_types.h
@@ -16,9 +16,6 @@
#ifndef __MICROBLAZE_POSIX_TYPES_H__
#define __MICROBLAZE_POSIX_TYPES_H__
-#include <asm/bitops.h>
-
-
typedef unsigned int __kernel_dev_t;
typedef unsigned long __kernel_ino_t;
typedef unsigned long long __kernel_ino64_t;
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 95cee509d2..66d21f4ef6 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -70,12 +70,7 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
#endif
#ifdef XILINX_USE_DCACHE
-#ifdef XILINX_DCACHE_BYTE_SIZE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
-#else
-#warning please rebuild BSPs and update configuration
- flush_cache(0, 32768);
-#endif
#endif
/*
* Linux Kernel Parameters (passing device tree):
diff --git a/arch/nios2/include/asm/status_led.h b/arch/nios2/include/asm/status_led.h
deleted file mode 100644
index 20f8d90195..0000000000
--- a/arch/nios2/include/asm/status_led.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef __ASM_STATUS_LED_H__
-#define __ASM_STATUS_LED_H__
-
-typedef unsigned led_id_t;
-extern void __led_init (led_id_t mask, int state);
-extern void __led_set (led_id_t mask, int state);
-inline void __led_toggle (led_id_t mask);
-
-#endif /* __ASM_STATUS_LED_H__ */