diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/Kconfig | 11 | ||||
| -rw-r--r-- | arch/arm/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/mx7/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/imx-common/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/include/asm/fsl_secure_boot.h | 5 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/mach-keystone/Kconfig | 4 | ||||
| -rw-r--r-- | arch/arm/mach-kirkwood/include/mach/config.h | 6 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/Kconfig | 17 | ||||
| -rw-r--r-- | arch/powerpc/Kconfig | 5 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc5xxx/Kconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc5xxx/ide.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/Kconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 32 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/Kconfig | 6 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/fsl_secure_boot.h | 2 | ||||
| -rw-r--r-- | arch/powerpc/lib/Kconfig | 8 | ||||
| -rw-r--r-- | arch/powerpc/lib/Makefile | 3 | ||||
| -rw-r--r-- | arch/powerpc/lib/immap.c | 703 |
22 files changed, 814 insertions, 12 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index 1212635dde..02e887ac86 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -34,6 +34,7 @@ config M68K config MICROBLAZE bool "MicroBlaze architecture" select SUPPORT_OF_CONTROL + imply CMD_IRQ config MIPS bool "MIPS architecture" @@ -69,6 +70,12 @@ config SANDBOX select DM_SPI select DM_GPIO select DM_MMC + imply CMD_GETTIME + imply CMD_HASH + imply CMD_IO + imply CMD_IOTRACE + imply LZMA + imply CMD_LZMADEC config SH bool "SuperH architecture" @@ -87,6 +94,10 @@ config X86 select DM_SPI_FLASH select USB_EHCI_HCD select DM_MMC if MMC + imply CMD_FPGA_LOADMK + imply CMD_GETTIME + imply CMD_IO + imply CMD_IRQ config XTENSA bool "Xtensa architecture" diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a17ba2c60a..2a3a36eba4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -281,6 +281,7 @@ choice config ARCH_AT91 bool "Atmel AT91" + select SPL_BOARD_INIT if SPL config TARGET_EDB93XX bool "Support edb93xx" @@ -502,6 +503,7 @@ config TARGET_BCM28155_AP config TARGET_BCMCYGNUS bool "Support bcmcygnus" select CPU_V7 + imply CMD_HASH config TARGET_BCMNSP bool "Support bcmnsp" @@ -553,6 +555,7 @@ config ARCH_KEYSTONE config ARCH_OMAP2PLUS bool "TI OMAP2+" select CPU_V7 + select SPL_BOARD_INIT if SPL select SUPPORT_SPL imply FIT @@ -674,6 +677,7 @@ config ARCH_ZYNQ select CPU_V7 select SUPPORT_SPL select OF_CONTROL + select SPL_BOARD_INIT if SPL select SPL_OF_CONTROL if SPL select DM select DM_ETH @@ -701,6 +705,7 @@ config ARCH_ZYNQMP select DM_SERIAL select SUPPORT_SPL select CLK + select SPL_BOARD_INIT if SPL select SPL_CLK select DM_USB if USB @@ -943,6 +948,7 @@ config ARCH_UNIPHIER select OF_CONTROL select OF_LIBFDT select PINCTRL + select SPL_BOARD_INIT if SPL select SPL_DM if SPL select SPL_LIBCOMMON_SUPPORT if SPL select SPL_LIBGENERIC_SUPPORT if SPL diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 0ff904507d..4fd60d480e 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -7,6 +7,7 @@ config MX6 select ARM_ERRATA_751472 if !MX6UL select ARM_ERRATA_761320 if !MX6UL select ARM_ERRATA_794072 if !MX6UL + imply CMD_FUSE config MX6D bool diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig index 8dfb4c9646..80c129019a 100644 --- a/arch/arm/cpu/armv7/mx7/Kconfig +++ b/arch/arm/cpu/armv7/mx7/Kconfig @@ -6,10 +6,12 @@ config MX7 select CPU_V7_HAS_VIRT select CPU_V7_HAS_NONSEC select ARCH_SUPPORT_PSCI + imply CMD_FUSE default y config MX7D select ROM_UNIFIED_SECTIONS + imply CMD_FUSE bool choice diff --git a/arch/arm/imx-common/Kconfig b/arch/arm/imx-common/Kconfig index 25cbd12c89..cd8b8d2882 100644 --- a/arch/arm/imx-common/Kconfig +++ b/arch/arm/imx-common/Kconfig @@ -55,3 +55,9 @@ config CMD_DEKBLOB Freescale secure boot mechanism. This command encapsulates and creates a blob of data. See also CMD_BLOB and doc/README.mxc_hab for more information. + +config CMD_HDMIDETECT + bool "Support the 'hdmidet' command" + help + This enables the 'hdmidet' command which detects if an HDMI monitor + is connected. diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index b0ca4bcf04..b0b3b9377e 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -8,12 +8,8 @@ #define __FSL_SECURE_BOOT_H #ifdef CONFIG_CHAIN_OF_TRUST -#define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_FSL_SEC_MON -#define CONFIG_SHA_HW_ACCEL -#define CONFIG_SHA_PROG_HW_ACCEL -#define CONFIG_SPL_BOARD_INIT #ifdef CONFIG_SPL_BUILD /* * Define the key hash for U-Boot here if public/private key pair used to @@ -30,7 +26,6 @@ #define CONFIG_KEY_REVOCATION #ifndef CONFIG_SPL_BUILD -#define CONFIG_CMD_HASH #ifndef CONFIG_SYS_RAMBOOT /* The key used for verification of next level images * is picked up from an Extension Table which has diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 46981a5933..5b6c5ea328 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -17,6 +17,8 @@ config ARCH_EXYNOS5 bool "Exynos5 SoC family" select CPU_V7 select BOARD_EARLY_INIT_F + select SHA_HW_ACCEL + imply CMD_HASH help Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig index 3ea8dc33ef..cababdba52 100644 --- a/arch/arm/mach-keystone/Kconfig +++ b/arch/arm/mach-keystone/Kconfig @@ -6,19 +6,23 @@ choice config TARGET_K2HK_EVM bool "TI Keystone 2 Kepler/Hawking EVM" + select SPL_BOARD_INIT if SPL imply DM_I2C config TARGET_K2E_EVM bool "TI Keystone 2 Edison EVM" + select SPL_BOARD_INIT if SPL imply DM_I2C config TARGET_K2L_EVM bool "TI Keystone 2 Lamar EVM" + select SPL_BOARD_INIT if SPL imply DM_I2C config TARGET_K2G_EVM bool "TI Keystone 2 Galileo EVM" select BOARD_LATE_INIT + select SPL_BOARD_INIT if SPL select TI_I2C_BOARD_DETECT imply DM_I2C diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index c7beb58e80..ba6007186e 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -95,7 +95,7 @@ /* * IDE Support on SATA ports */ -#ifdef CONFIG_CMD_IDE +#ifdef CONFIG_IDE #define __io #define CONFIG_MVSATA_IDE #define CONFIG_IDE_PREINIT @@ -110,12 +110,12 @@ #define CONFIG_SYS_ATA_STRIDE 4 /* Controller supports 48-bits LBA addressing */ #define CONFIG_LBA48 -/* CONFIG_CMD_IDE requires some #defines for ATA registers */ +/* CONFIG_IDE requires some #defines for ATA registers */ #define CONFIG_SYS_IDE_MAXBUS 2 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* ATA registers base is at SATA controller base */ #define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE -#endif /* CONFIG_CMD_IDE */ +#endif /* CONFIG_IDE */ /* * I2C related stuff diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 740dbdf70e..6be2ab5025 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -14,6 +14,7 @@ config ROCKCHIP_RK3036 config ROCKCHIP_RK3188 bool "Support Rockchip RK3188" select CPU_V7 + select SPL_BOARD_INIT if SPL select SUPPORT_SPL select SUPPORT_TPL select SPL @@ -30,6 +31,7 @@ config ROCKCHIP_RK3188 config ROCKCHIP_RK3288 bool "Support Rockchip RK3288" select CPU_V7 + select SPL_BOARD_INIT if SPL select SUPPORT_SPL select SPL help diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 2563e7926d..45e5379d56 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -39,6 +39,7 @@ config TARGET_SOCFPGA_ARRIA5 config TARGET_SOCFPGA_ARRIA10 bool + select SPL_BOARD_INIT if SPL config TARGET_SOCFPGA_CYCLONE5 bool diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index c67ffa5a23..940257b5ec 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -49,6 +49,7 @@ config TEGRA_ARMV7_COMMON bool "Tegra 32-bit common options" select CPU_V7 select SPL + select SPL_BOARD_INIT if SPL select SUPPORT_SPL select TEGRA_COMMON select TEGRA_GPIO @@ -126,4 +127,20 @@ source "arch/arm/mach-tegra/tegra124/Kconfig" source "arch/arm/mach-tegra/tegra210/Kconfig" source "arch/arm/mach-tegra/tegra186/Kconfig" +config CMD_ENTERRCM + bool "Enable 'enterrcm' command" + default y + help + Tegra's boot ROM supports a mode whereby code may be downloaded and + flash-programmed over a USB connection. On dev boards, this is + typically entered by holding down a "force recovery" button and + resetting the CPU. However, not all boards have such a button (one + example is the Compulab Trimslice), so a method to enter RCM from + software is useful. + + Even on boards other than Trimslice, controlling this over a UART + may be useful, e.g. to allow simple remote control without the need + for mechanical button actuators, or hooking up relays/... to the + button. + endif diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 01e9008d0a..f37a9cbffb 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -33,6 +33,8 @@ config MPC85xx select SYS_FSL_DDR select SYS_FSL_DDR_BE imply USB_EHCI_HCD if USB + imply CMD_HASH + imply CMD_IRQ config MPC86xx bool "MPC86xx" @@ -45,9 +47,12 @@ config 8xx config 4xx bool "PPC4xx" select CREATE_ARCH_SYMLINK + imply CMD_IRQ endchoice +source "arch/powerpc/lib/Kconfig" + source "arch/powerpc/cpu/mpc512x/Kconfig" source "arch/powerpc/cpu/mpc5xx/Kconfig" source "arch/powerpc/cpu/mpc5xxx/Kconfig" diff --git a/arch/powerpc/cpu/mpc5xxx/Kconfig b/arch/powerpc/cpu/mpc5xxx/Kconfig index 5d4922870b..6ba0dd492d 100644 --- a/arch/powerpc/cpu/mpc5xxx/Kconfig +++ b/arch/powerpc/cpu/mpc5xxx/Kconfig @@ -59,6 +59,7 @@ config TARGET_O3DNT config TARGET_DIGSY_MTC bool "Support digsy_mtc" + imply CMD_IRQ config TARGET_PCM030 bool "Support pcm030" diff --git a/arch/powerpc/cpu/mpc5xxx/ide.c b/arch/powerpc/cpu/mpc5xxx/ide.c index 9003b774ff..d1f4349184 100644 --- a/arch/powerpc/cpu/mpc5xxx/ide.c +++ b/arch/powerpc/cpu/mpc5xxx/ide.c @@ -8,7 +8,7 @@ */ #include <common.h> -#if defined(CONFIG_CMD_IDE) +#if defined(CONFIG_IDE) #include <mpc5xxx.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index 02e43bc515..0772b7c4fb 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -49,6 +49,7 @@ config TARGET_MPC8349EMDS config TARGET_MPC8349ITX bool "Support MPC8349ITX" + imply CMD_IRQ config TARGET_MPC837XEMDS bool "Support MPC837XEMDS" diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 31c0964994..88d56a9a32 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -4,6 +4,14 @@ menu "mpc85xx CPU" config SYS_CPU default "mpc85xx" +config CMD_ERRATA + bool "Enable the 'errata' command" + depends on MPC85xx + default y + help + This enables the 'errata' command which displays a list of errata + work-arounds which are enabled for the current board. + choice prompt "Target select" optional @@ -124,6 +132,7 @@ config TARGET_P1010RDB_PA select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL + imply CMD_EEPROM config TARGET_P1010RDB_PB bool "Support P1010RDB_PB" @@ -131,6 +140,7 @@ config TARGET_P1010RDB_PB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select SUPPORT_TPL + imply CMD_EEPROM config TARGET_P1022DS bool "Support P1022DS" @@ -141,54 +151,63 @@ config TARGET_P1022DS config TARGET_P1023RDB bool "Support P1023RDB" select ARCH_P1023 + imply CMD_EEPROM config TARGET_P1020MBG bool "Support P1020MBG-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM config TARGET_P1020RDB_PC bool "Support P1020RDB-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM config TARGET_P1020RDB_PD bool "Support P1020RDB-PD" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM config TARGET_P1020UTM bool "Support P1020UTM" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1020 + imply CMD_EEPROM config TARGET_P1021RDB bool "Support P1021RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1021 + imply CMD_EEPROM config TARGET_P1024RDB bool "Support P1024RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1024 + imply CMD_EEPROM config TARGET_P1025RDB bool "Support P1025RDB" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P1025 + imply CMD_EEPROM config TARGET_P2020RDB bool "Support P2020RDB-PC" select SUPPORT_SPL select SUPPORT_TPL select ARCH_P2020 + imply CMD_EEPROM config TARGET_P1_TWR bool "Support p1_twr" @@ -211,6 +230,7 @@ config TARGET_T1024QDS select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_EEPROM config TARGET_T1023RDB bool "Support T1023RDB" @@ -218,6 +238,7 @@ config TARGET_T1023RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_EEPROM config TARGET_T1024RDB bool "Support T1024RDB" @@ -225,12 +246,14 @@ config TARGET_T1024RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + imply CMD_EEPROM config TARGET_T1040QDS bool "Support T1040QDS" select ARCH_T1040 select BOARD_LATE_INIT if CHAIN_OF_TRUST select PHYS_64BIT + imply CMD_EEPROM config TARGET_T1040RDB bool "Support T1040RDB" @@ -377,6 +400,7 @@ config ARCH_B4420 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_EEPROM config ARCH_B4860 bool @@ -402,6 +426,7 @@ config ARCH_B4860 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 select FSL_IFC + imply CMD_EEPROM config ARCH_BSC9131 bool @@ -415,6 +440,7 @@ config ARCH_BSC9131 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_IFC + imply CMD_EEPROM config ARCH_BSC9132 bool @@ -432,6 +458,7 @@ config ARCH_BSC9132 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_IFC + imply CMD_EEPROM config ARCH_C29X bool @@ -565,6 +592,7 @@ config ARCH_P1010 select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_IFC + imply CMD_EEPROM config ARCH_P1011 bool @@ -649,6 +677,7 @@ config ARCH_P1024 select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_EEPROM config ARCH_P1025 bool @@ -678,6 +707,7 @@ config ARCH_P2020 select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB select FSL_ELBC + imply CMD_EEPROM config ARCH_P2041 bool @@ -821,6 +851,7 @@ config ARCH_T1023 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC + imply CMD_EEPROM config ARCH_T1024 bool @@ -838,6 +869,7 @@ config ARCH_T1024 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC + imply CMD_EEPROM config ARCH_T1040 bool diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig index 38121c1427..77e8fd458e 100644 --- a/arch/powerpc/cpu/ppc4xx/Kconfig +++ b/arch/powerpc/cpu/ppc4xx/Kconfig @@ -137,6 +137,12 @@ config CMD_CHIP_CONFIG and control the CPU and peripehrals clocks. The programmed configuration is then used when the board boots. +config CMD_ECCTEST + bool "Enable the 'ecctest' command" + help + This command tests memory ECC by single and double error bit + injection. + source "board/amcc/acadia/Kconfig" source "board/amcc/bamboo/Kconfig" source "board/amcc/bubinga/Kconfig" diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 62ce816b13..76921eea9a 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -99,9 +99,7 @@ #define CONFIG_SPL_UBOOT_KEY_HASH NULL #endif /* ifdef CONFIG_SPL_BUILD */ -#define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_FSL_SEC_MON -#define CONFIG_SHA_PROG_HW_ACCEL #ifndef CONFIG_SPL_BUILD /* diff --git a/arch/powerpc/lib/Kconfig b/arch/powerpc/lib/Kconfig new file mode 100644 index 0000000000..987cec99cb --- /dev/null +++ b/arch/powerpc/lib/Kconfig @@ -0,0 +1,8 @@ +config CMD_IMMAP + bool "Enable various commands to dump IMMR information" + help + This enables various commands such as: + + siuinfo - print System Interface Unit (SIU) registers + memcinfo - print Memory Controller registers + sitinfo - print System Integration Timers (SIT) registers diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 4f68613a41..e09bd9a88a 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -33,9 +33,10 @@ obj-$(CONFIG_BAT_RW) += bat_rw.o obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-y += cache.o obj-y += extable.o +obj-$(CONFIG_CMD_IMMAP) += immap.o obj-y += interrupts.o obj-$(CONFIG_CMD_KGDB) += kgdb.o -obj-$(CONFIG_CMD_IDE) += ide.o +obj-$(CONFIG_IDE) += ide.o obj-y += stack.o obj-y += time.o diff --git a/arch/powerpc/lib/immap.c b/arch/powerpc/lib/immap.c new file mode 100644 index 0000000000..1414f9ad55 --- /dev/null +++ b/arch/powerpc/lib/immap.c @@ -0,0 +1,703 @@ +/* + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * MPC8xx/MPC8260 Internal Memory Map Functions + */ + +#include <common.h> +#include <command.h> + +#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) + +#if defined(CONFIG_8xx) +#include <asm/8xx_immap.h> +#include <commproc.h> +#include <asm/iopin_8xx.h> +#elif defined(CONFIG_MPC8260) +#include <asm/immap_8260.h> +#include <asm/cpm_8260.h> +#include <asm/iopin_8260.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +static void +unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + printf ("Sorry, but the '%s' command has not been implemented\n", + cmdtp->name); +} + +int +do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + +#if defined(CONFIG_8xx) + volatile sysconf8xx_t *sc = &immap->im_siu_conf; +#elif defined(CONFIG_MPC8260) + volatile sysconf8260_t *sc = &immap->im_siu_conf; +#endif + + printf ("SIUMCR= %08x SYPCR = %08x\n", sc->sc_siumcr, sc->sc_sypcr); +#if defined(CONFIG_8xx) + printf ("SWT = %08x\n", sc->sc_swt); + printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask); + printf ("SIEL = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec); + printf ("TESR = %08x SDCR = %08x\n", sc->sc_tesr, sc->sc_sdcr); +#elif defined(CONFIG_MPC8260) + printf ("BCR = %08x\n", sc->sc_bcr); + printf ("P_ACR = %02x P_ALRH= %08x P_ALRL= %08x\n", + sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl); + printf ("L_ACR = %02x L_ALRH= %08x L_ALRL= %08x\n", + sc->sc_lcl_acr, sc->sc_lcl_alrh, sc->sc_lcl_alrl); + printf ("PTESR1= %08x PTESR2= %08x\n", sc->sc_tescr1, sc->sc_tescr2); + printf ("LTESR1= %08x LTESR2= %08x\n", sc->sc_ltescr1, sc->sc_ltescr2); + printf ("PDTEA = %08x PDTEM = %02x\n", sc->sc_pdtea, sc->sc_pdtem); + printf ("LDTEA = %08x LDTEM = %02x\n", sc->sc_ldtea, sc->sc_ldtem); +#endif + return 0; +} + +int +do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + +#if defined(CONFIG_8xx) + volatile memctl8xx_t *memctl = &immap->im_memctl; + int nbanks = 8; +#elif defined(CONFIG_MPC8260) + volatile memctl8260_t *memctl = &immap->im_memctl; + int nbanks = 12; +#endif + volatile uint *p = &memctl->memc_br0; + int i; + + for (i = 0; i < nbanks; i++, p += 2) { + if (i < 10) { + printf ("BR%d = %08x OR%d = %08x\n", + i, p[0], i, p[1]); + } else { + printf ("BR%d = %08x OR%d = %08x\n", + i, p[0], i, p[1]); + } + } + + printf ("MAR = %08x", memctl->memc_mar); +#if defined(CONFIG_8xx) + printf (" MCR = %08x\n", memctl->memc_mcr); +#elif defined(CONFIG_MPC8260) + putc ('\n'); +#endif + printf ("MAMR = %08x MBMR = %08x", + memctl->memc_mamr, memctl->memc_mbmr); +#if defined(CONFIG_8xx) + printf ("\nMSTAT = %04x\n", memctl->memc_mstat); +#elif defined(CONFIG_MPC8260) + printf (" MCMR = %08x\n", memctl->memc_mcmr); +#endif + printf ("MPTPR = %04x MDR = %08x\n", + memctl->memc_mptpr, memctl->memc_mdr); +#if defined(CONFIG_MPC8260) + printf ("PSDMR = %08x LSDMR = %08x\n", + memctl->memc_psdmr, memctl->memc_lsdmr); + printf ("PURT = %02x PSRT = %02x\n", + memctl->memc_purt, memctl->memc_psrt); + printf ("LURT = %02x LSRT = %02x\n", + memctl->memc_lurt, memctl->memc_lsrt); + printf ("IMMR = %08x\n", memctl->memc_immr); +#endif + return 0; +} + +int +do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +#ifdef CONFIG_MPC8260 +int +do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} +#endif + +int +do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + +#if defined(CONFIG_8xx) + volatile car8xx_t *car = &immap->im_clkrst; +#elif defined(CONFIG_MPC8260) + volatile car8260_t *car = &immap->im_clkrst; +#endif + +#if defined(CONFIG_8xx) + printf ("SCCR = %08x\n", car->car_sccr); + printf ("PLPRCR= %08x\n", car->car_plprcr); + printf ("RSR = %08x\n", car->car_rsr); +#elif defined(CONFIG_MPC8260) + printf ("SCCR = %08x\n", car->car_sccr); + printf ("SCMR = %08x\n", car->car_scmr); + printf ("RSR = %08x\n", car->car_rsr); + printf ("RMR = %08x\n", car->car_rmr); +#endif + return 0; +} + +static int counter; + +static void +header(void) +{ + char *data = "\ + -------------------------------- --------------------------------\ + 00000000001111111111222222222233 00000000001111111111222222222233\ + 01234567890123456789012345678901 01234567890123456789012345678901\ + -------------------------------- --------------------------------\ + "; + int i; + + if (counter % 2) + putc('\n'); + counter = 0; + + for (i = 0; i < 4; i++, data += 79) + printf("%.79s\n", data); +} + +static void binary (char *label, uint value, int nbits) +{ + uint mask = 1 << (nbits - 1); + int i, second = (counter++ % 2); + + if (second) + putc (' '); + puts (label); + for (i = 32 + 1; i != nbits; i--) + putc (' '); + + while (mask != 0) { + if (value & mask) + putc ('1'); + else + putc ('0'); + mask >>= 1; + } + + if (second) + putc ('\n'); +} + +#if defined(CONFIG_8xx) +#define PA_NBITS 16 +#define PA_NB_ODR 8 +#define PB_NBITS 18 +#define PB_NB_ODR 16 +#define PC_NBITS 12 +#define PD_NBITS 13 +#elif defined(CONFIG_MPC8260) +#define PA_NBITS 32 +#define PA_NB_ODR 32 +#define PB_NBITS 28 +#define PB_NB_ODR 28 +#define PC_NBITS 32 +#define PD_NBITS 28 +#endif + +int +do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + +#if defined(CONFIG_8xx) + volatile iop8xx_t *iop = &immap->im_ioport; + volatile ushort *l, *r; +#elif defined(CONFIG_MPC8260) + volatile iop8260_t *iop = &immap->im_ioport; + volatile uint *l, *r; +#endif + volatile uint *R; + + counter = 0; + header (); + + /* + * Ports A & B + */ + +#if defined(CONFIG_8xx) + l = &iop->iop_padir; + R = &immap->im_cpm.cp_pbdir; +#elif defined(CONFIG_MPC8260) + l = &iop->iop_pdira; + R = &iop->iop_pdirb; +#endif + binary ("PA_DIR", *l++, PA_NBITS); + binary ("PB_DIR", *R++, PB_NBITS); + binary ("PA_PAR", *l++, PA_NBITS); + binary ("PB_PAR", *R++, PB_NBITS); +#if defined(CONFIG_MPC8260) + binary ("PA_SOR", *l++, PA_NBITS); + binary ("PB_SOR", *R++, PB_NBITS); +#endif + binary ("PA_ODR", *l++, PA_NB_ODR); + binary ("PB_ODR", *R++, PB_NB_ODR); + binary ("PA_DAT", *l++, PA_NBITS); + binary ("PB_DAT", *R++, PB_NBITS); + + header (); + + /* + * Ports C & D + */ + +#if defined(CONFIG_8xx) + l = &iop->iop_pcdir; + r = &iop->iop_pddir; +#elif defined(CONFIG_MPC8260) + l = &iop->iop_pdirc; + r = &iop->iop_pdird; +#endif + binary ("PC_DIR", *l++, PC_NBITS); + binary ("PD_DIR", *r++, PD_NBITS); + binary ("PC_PAR", *l++, PC_NBITS); + binary ("PD_PAR", *r++, PD_NBITS); +#if defined(CONFIG_8xx) + binary ("PC_SO ", *l++, PC_NBITS); + binary (" ", 0, 0); + r++; +#elif defined(CONFIG_MPC8260) + binary ("PC_SOR", *l++, PC_NBITS); + binary ("PD_SOR", *r++, PD_NBITS); + binary ("PC_ODR", *l++, PC_NBITS); + binary ("PD_ODR", *r++, PD_NBITS); +#endif + binary ("PC_DAT", *l++, PC_NBITS); + binary ("PD_DAT", *r++, PD_NBITS); +#if defined(CONFIG_8xx) + binary ("PC_INT", *l++, PC_NBITS); +#endif + + header (); + return 0; +} + +/* + * set the io pins + * this needs a clean up for smaller tighter code + * use *uint and set the address based on cmd + port + */ +int +do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + uint rcode = 0; + iopin_t iopin; + static uint port = 0; + static uint pin = 0; + static uint value = 0; + static enum { + DIR, + PAR, + SOR, + ODR, + DAT, +#if defined(CONFIG_8xx) + INT +#endif + } cmd = DAT; + + if (argc != 5) { + puts ("iopset PORT PIN CMD VALUE\n"); + return 1; + } + port = argv[1][0] - 'A'; + if (port > 3) + port -= 0x20; + if (port > 3) + rcode = 1; + pin = simple_strtol (argv[2], NULL, 10); + if (pin > 31) + rcode = 1; + + + switch (argv[3][0]) { + case 'd': + if (argv[3][1] == 'a') + cmd = DAT; + else if (argv[3][1] == 'i') + cmd = DIR; + else + rcode = 1; + break; + case 'p': + cmd = PAR; + break; + case 'o': + cmd = ODR; + break; + case 's': + cmd = SOR; + break; +#if defined(CONFIG_8xx) + case 'i': + cmd = INT; + break; +#endif + default: + printf ("iopset: unknown command %s\n", argv[3]); + rcode = 1; + } + if (argv[4][0] == '1') + value = 1; + else if (argv[4][0] == '0') + value = 0; + else + rcode = 1; + if (rcode == 0) { + iopin.port = port; + iopin.pin = pin; + iopin.flag = 0; + switch (cmd) { + case DIR: + if (value) + iopin_set_out (&iopin); + else + iopin_set_in (&iopin); + break; + case PAR: + if (value) + iopin_set_ded (&iopin); + else + iopin_set_gen (&iopin); + break; + case SOR: + if (value) + iopin_set_opt2 (&iopin); + else + iopin_set_opt1 (&iopin); + break; + case ODR: + if (value) + iopin_set_odr (&iopin); + else + iopin_set_act (&iopin); + break; + case DAT: + if (value) + iopin_set_high (&iopin); + else + iopin_set_low (&iopin); + break; +#if defined(CONFIG_8xx) + case INT: + if (value) + iopin_set_falledge (&iopin); + else + iopin_set_anyedge (&iopin); + break; +#endif + } + + } + return rcode; +} + +int +do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +int +do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +static void prbrg (int n, uint val) +{ + uint extc = (val >> 14) & 3; + uint cd = (val & CPM_BRG_CD_MASK) >> 1; + uint div16 = (val & CPM_BRG_DIV16) != 0; + +#if defined(CONFIG_8xx) + ulong clock = gd->cpu_clk; +#elif defined(CONFIG_MPC8260) + ulong clock = gd->arch.brg_clk; +#endif + + printf ("BRG%d:", n); + + if (val & CPM_BRG_RST) + puts (" RESET"); + else + puts (" "); + + if (val & CPM_BRG_EN) + puts (" ENABLED"); + else + puts (" DISABLED"); + + printf (" EXTC=%d", extc); + + if (val & CPM_BRG_ATB) + puts (" ATB"); + else + puts (" "); + + printf (" DIVIDER=%4d", cd); + if (extc == 0 && cd != 0) { + uint baudrate; + + if (div16) + baudrate = (clock / 16) / (cd + 1); + else + baudrate = clock / (cd + 1); + + printf ("=%6d bps", baudrate); + } else { + puts (" "); + } + + if (val & CPM_BRG_DIV16) + puts (" DIV16"); + else + puts (" "); + + putc ('\n'); +} + +int +do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + +#if defined(CONFIG_8xx) + volatile cpm8xx_t *cp = &immap->im_cpm; + volatile uint *p = &cp->cp_brgc1; +#elif defined(CONFIG_MPC8260) + volatile uint *p = &immap->im_brgc1; +#endif + int i = 1; + + while (i <= 4) + prbrg (i++, *p++); + +#if defined(CONFIG_MPC8260) + p = &immap->im_brgc5; + while (i <= 8) + prbrg (i++, *p++); +#endif + return 0; +} + +int +do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + +#if defined(CONFIG_8xx) + volatile i2c8xx_t *i2c = &immap->im_i2c; + volatile cpm8xx_t *cp = &immap->im_cpm; + volatile iic_t *iip = (iic_t *) & cp->cp_dparam[PROFF_IIC]; +#elif defined(CONFIG_MPC8260) + volatile i2c8260_t *i2c = &immap->im_i2c; + volatile iic_t *iip; + uint dpaddr; + + dpaddr = immap->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)]; + if (dpaddr == 0) + iip = NULL; + else + iip = (iic_t *) & immap->im_dprambase[dpaddr]; +#endif + + printf ("I2MOD = %02x I2ADD = %02x\n", i2c->i2c_i2mod, i2c->i2c_i2add); + printf ("I2BRG = %02x I2COM = %02x\n", i2c->i2c_i2brg, i2c->i2c_i2com); + printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr); + + if (iip == NULL) + puts ("i2c parameter ram not allocated\n"); + else { + printf ("RBASE = %08x TBASE = %08x\n", + iip->iic_rbase, iip->iic_tbase); + printf ("RFCR = %02x TFCR = %02x\n", + iip->iic_rfcr, iip->iic_tfcr); + printf ("MRBLR = %04x\n", iip->iic_mrblr); + printf ("RSTATE= %08x RDP = %08x\n", + iip->iic_rstate, iip->iic_rdp); + printf ("RBPTR = %04x RBC = %04x\n", + iip->iic_rbptr, iip->iic_rbc); + printf ("RXTMP = %08x\n", iip->iic_rxtmp); + printf ("TSTATE= %08x TDP = %08x\n", + iip->iic_tstate, iip->iic_tdp); + printf ("TBPTR = %04x TBC = %04x\n", + iip->iic_tbptr, iip->iic_tbc); + printf ("TXTMP = %08x\n", iip->iic_txtmp); + } + return 0; +} + +int +do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +int +do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +int +do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +int +do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +int +do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +int +do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unimplemented (cmdtp, flag, argc, argv); + return 0; +} + +/***************************************************/ + +U_BOOT_CMD( + siuinfo, 1, 1, do_siuinfo, + "print System Interface Unit (SIU) registers", + "" +); + +U_BOOT_CMD( + memcinfo, 1, 1, do_memcinfo, + "print Memory Controller registers", + "" +); + +U_BOOT_CMD( + sitinfo, 1, 1, do_sitinfo, + "print System Integration Timers (SIT) registers", + "" +); + +#ifdef CONFIG_MPC8260 +U_BOOT_CMD( + icinfo, 1, 1, do_icinfo, + "print Interrupt Controller registers", + "" +); +#endif + +U_BOOT_CMD( + carinfo, 1, 1, do_carinfo, + "print Clocks and Reset registers", + "" +); + +U_BOOT_CMD( + iopinfo, 1, 1, do_iopinfo, + "print I/O Port registers", + "" +); + +U_BOOT_CMD( + iopset, 5, 0, do_iopset, + "set I/O Port registers", + "PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1" +); + +U_BOOT_CMD( + dmainfo, 1, 1, do_dmainfo, + "print SDMA/IDMA registers", + "" +); + +U_BOOT_CMD( + fccinfo, 1, 1, do_fccinfo, + "print FCC registers", + "" +); + +U_BOOT_CMD( + brginfo, 1, 1, do_brginfo, + "print Baud Rate Generator (BRG) registers", + "" +); + +U_BOOT_CMD( + i2cinfo, 1, 1, do_i2cinfo, + "print I2C registers", + "" +); + +U_BOOT_CMD( + sccinfo, 1, 1, do_sccinfo, + "print SCC registers", + "" +); + +U_BOOT_CMD( + smcinfo, 1, 1, do_smcinfo, + "print SMC registers", + "" +); + +U_BOOT_CMD( + spiinfo, 1, 1, do_spiinfo, + "print Serial Peripheral Interface (SPI) registers", + "" +); + +U_BOOT_CMD( + muxinfo, 1, 1, do_muxinfo, + "print CPM Multiplexing registers", + "" +); + +U_BOOT_CMD( + siinfo, 1, 1, do_siinfo, + "print Serial Interface (SI) registers", + "" +); + +U_BOOT_CMD( + mccinfo, 1, 1, do_mccinfo, + "print MCC registers", + "" +); + +#endif |