3 files changed, 6 insertions, 18 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
index 31b7dd50a9..5dbbf6186f 100644
--- a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
@@ -377,7 +377,6 @@ unsigned long sunxi_dram_init(void)
 		    MCTL_CR_BANK(1) | MCTL_CR_RANK(1));
 
 	/* Detect and set page size */
-	mctl_mem_fill();
 	for (columns = 7; columns < 20; columns++) {
 		if (mctl_mem_matches(1 << columns))
 			break;
diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun8i.c b/arch/arm/cpu/armv7/sunxi/dram_sun8i.c
index aa6445edd1..3d7964d1af 100644
--- a/arch/arm/cpu/armv7/sunxi/dram_sun8i.c
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun8i.c
@@ -289,7 +289,6 @@ unsigned long sunxi_dram_init(void)
 		writel(0x000310f4 | MCTL_CR_PAGE_SIZE(page_size),
 		       &mctl_com->cr);
 		setbits_le32(&mctl_com->swonr, 0x0003ffff);
-		mctl_mem_fill();
 		for (rows = 11; rows < 16; rows++) {
 			offset = 1 << (rows + columns + bus);
 			if (mctl_mem_matches(offset))
diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h
index 8d78029a96..7ff43e6d3a 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -24,8 +24,6 @@
 #include <asm/arch/dram_sun4i.h>
 #endif
 
-#define MCTL_MEM_FILL_MATCH_COUNT 64
-
 unsigned long sunxi_dram_init(void);
 
 /*
@@ -42,24 +40,16 @@ static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val)
 }
 
 /*
- * Fill beginning of DRAM with "random" data for mctl_mem_matches()
- */
-static inline void mctl_mem_fill(void)
-{
-	int i;
-
-	for (i = 0; i < MCTL_MEM_FILL_MATCH_COUNT; i++)
-		writel(0xaa55aa55 + i, CONFIG_SYS_SDRAM_BASE + i * 4);
-}
-
-/*
  * Test if memory at offset offset matches memory at begin of DRAM
  */
 static inline bool mctl_mem_matches(u32 offset)
 {
-	return memcmp((u32 *)CONFIG_SYS_SDRAM_BASE,
-		      (u32 *)(CONFIG_SYS_SDRAM_BASE + offset),
-		      MCTL_MEM_FILL_MATCH_COUNT * 4) == 0;
+	/* Try to write different values to RAM at two addresses */
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset);
+	/* Check if the same value is actually observed when reading back */
+	return readl(CONFIG_SYS_SDRAM_BASE) ==
+	       readl(CONFIG_SYS_SDRAM_BASE + offset);
 }
 
 #endif /* _SUNXI_DRAM_H */