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-rw-r--r--arch/arm/cpu/arm11/Makefile4
-rw-r--r--arch/arm/cpu/arm11/sctlr.S25
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c2
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu_init.c10
-rw-r--r--arch/powerpc/dts/p2041.dtsi9
-rw-r--r--arch/powerpc/dts/p3041.dtsi9
-rw-r--r--arch/powerpc/dts/p5040.dtsi9
-rw-r--r--arch/powerpc/dts/t102x.dtsi9
-rw-r--r--arch/powerpc/dts/t104x.dtsi9
-rw-r--r--arch/powerpc/dts/t4240.dtsi9
10 files changed, 84 insertions, 11 deletions
diff --git a/arch/arm/cpu/arm11/Makefile b/arch/arm/cpu/arm11/Makefile
index 5d721fce12..5dfa01ae8d 100644
--- a/arch/arm/cpu/arm11/Makefile
+++ b/arch/arm/cpu/arm11/Makefile
@@ -4,3 +4,7 @@
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y = cpu.o
+
+ifneq ($(CONFIG_SPL_BUILD),y)
+obj-$(CONFIG_EFI_LOADER) += sctlr.o
+endif
diff --git a/arch/arm/cpu/arm11/sctlr.S b/arch/arm/cpu/arm11/sctlr.S
new file mode 100644
index 0000000000..74a7fc4a25
--- /dev/null
+++ b/arch/arm/cpu/arm11/sctlr.S
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Routines to access the system control register
+ *
+ * Copyright (c) 2019 Heinrich Schuchardt
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * void allow_unaligned(void) - allow unaligned access
+ *
+ * This routine sets the enable unaligned data support flag and clears the
+ * aligned flag in the system control register.
+ * After calling this routine unaligned access does no longer leads to a
+ * data abort or undefined behavior but is handled by the CPU.
+ * For details see the "ARM Architecture Reference Manual" for ARMv6.
+ */
+ENTRY(allow_unaligned)
+ mrc p15, 0, r0, c1, c0, 0 @ load system control register
+ orr r0, r0, #1 << 22 @ set unaligned data support flag
+ bic r0, r0, #2 @ clear aligned flag
+ mcr p15, 0, r0, c1, c0, 0 @ write system control register
+ bx lr @ return
+ENDPROC(allow_unaligned)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index f0df88c565..adfa51b6be 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -844,7 +844,7 @@ int board_late_init(void)
* check if gd->env_addr is default_environment; then setenv bootcmd
* and mcinitcmd.
*/
-#if !defined(CONFIG_ENV_ADDR) || defined(ENV_IS_EMBEDDED)
+#ifdef CONFIG_SYS_RELOC_GD_ENV_ADDR
if (gd->env_addr == (ulong)&default_environment[0]) {
#else
if (gd->env_addr + gd->reloc_off == (ulong)&default_environment[0]) {
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index c2b2ef2041..13691f3836 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -1023,16 +1023,6 @@ void arch_preboot_os(void)
mtmsr(msr);
}
-#if defined(CONFIG_SATA) && defined(CONFIG_FSL_SATA)
-int sata_initialize(void)
-{
- if (is_serdes_configured(SATA1) || is_serdes_configured(SATA2))
- return __sata_initialize();
-
- return 1;
-}
-#endif
-
void cpu_secondary_init_r(void)
{
#ifdef CONFIG_U_QE
diff --git a/arch/powerpc/dts/p2041.dtsi b/arch/powerpc/dts/p2041.dtsi
index 55f7adc50e..239439dd4d 100644
--- a/arch/powerpc/dts/p2041.dtsi
+++ b/arch/powerpc/dts/p2041.dtsi
@@ -59,6 +59,15 @@
device_type = "open-pic";
clock-frequency = <0x0>;
};
+
+ sata: sata@220000 {
+ compatible = "fsl,pq-sata-v2";
+ reg = <0x220000 0x1000>;
+ interrupts = <68 0x2 0 0>;
+ sata-offset = <0x1000>;
+ sata-number = <2>;
+ sata-fpdma = <0>;
+ };
};
pcie@ffe200000 {
diff --git a/arch/powerpc/dts/p3041.dtsi b/arch/powerpc/dts/p3041.dtsi
index 197896d35a..23bde81418 100644
--- a/arch/powerpc/dts/p3041.dtsi
+++ b/arch/powerpc/dts/p3041.dtsi
@@ -59,6 +59,15 @@
device_type = "open-pic";
clock-frequency = <0x0>;
};
+
+ sata: sata@220000 {
+ compatible = "fsl,pq-sata-v2";
+ reg = <0x220000 0x1000>;
+ interrupts = <68 0x2 0 0>;
+ sata-offset = <0x1000>;
+ sata-number = <2>;
+ sata-fpdma = <0>;
+ };
};
pcie@ffe200000 {
diff --git a/arch/powerpc/dts/p5040.dtsi b/arch/powerpc/dts/p5040.dtsi
index 8ab123dca4..7b8218acc3 100644
--- a/arch/powerpc/dts/p5040.dtsi
+++ b/arch/powerpc/dts/p5040.dtsi
@@ -58,6 +58,15 @@
device_type = "open-pic";
clock-frequency = <0x0>;
};
+
+ sata: sata@220000 {
+ compatible = "fsl,pq-sata-v2";
+ reg = <0x220000 0x1000>;
+ interrupts = <68 0x2 0 0>;
+ sata-offset = <0x1000>;
+ sata-number = <2>;
+ sata-fpdma = <0>;
+ };
};
pcie@ffe200000 {
diff --git a/arch/powerpc/dts/t102x.dtsi b/arch/powerpc/dts/t102x.dtsi
index c49fd21088..7d3f7c53ab 100644
--- a/arch/powerpc/dts/t102x.dtsi
+++ b/arch/powerpc/dts/t102x.dtsi
@@ -48,6 +48,15 @@
device_type = "open-pic";
clock-frequency = <0x0>;
};
+
+ sata: sata@220000 {
+ compatible = "fsl,pq-sata-v2";
+ reg = <0x220000 0x1000>;
+ interrupts = <68 0x2 0 0>;
+ sata-offset = <0x1000>;
+ sata-number = <2>;
+ sata-fpdma = <0>;
+ };
};
pcie@ffe240000 {
diff --git a/arch/powerpc/dts/t104x.dtsi b/arch/powerpc/dts/t104x.dtsi
index 59989677a2..fe6cc3cf14 100644
--- a/arch/powerpc/dts/t104x.dtsi
+++ b/arch/powerpc/dts/t104x.dtsi
@@ -58,6 +58,15 @@
device_type = "open-pic";
clock-frequency = <0x0>;
};
+
+ sata: sata@220000 {
+ compatible = "fsl,pq-sata-v2";
+ reg = <0x220000 0x1000>;
+ interrupts = <68 0x2 0 0>;
+ sata-offset = <0x1000>;
+ sata-number = <2>;
+ sata-fpdma = <0>;
+ };
};
pcie@ffe240000 {
diff --git a/arch/powerpc/dts/t4240.dtsi b/arch/powerpc/dts/t4240.dtsi
index fc34974c7f..3bda2fa780 100644
--- a/arch/powerpc/dts/t4240.dtsi
+++ b/arch/powerpc/dts/t4240.dtsi
@@ -98,6 +98,15 @@
device_type = "open-pic";
clock-frequency = <0x0>;
};
+
+ sata: sata@220000 {
+ compatible = "fsl,pq-sata-v2";
+ reg = <0x220000 0x1000>;
+ interrupts = <68 0x2 0 0>;
+ sata-offset = <0x1000>;
+ sata-number = <2>;
+ sata-fpdma = <0>;
+ };
};
pcie@ffe240000 {