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-rw-r--r--arch/arm/dts/stm32mp151.dtsi43
-rw-r--r--arch/arm/dts/stm32mp157c-ev1.dts16
-rw-r--r--arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi1
-rw-r--r--arch/arm/mach-stm32mp/bsec.c86
-rw-r--r--arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c5
-rw-r--r--arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c100
6 files changed, 143 insertions, 108 deletions
diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
index 0d97f56fca..39d9e545ed 100644
--- a/arch/arm/dts/stm32mp151.dtsi
+++ b/arch/arm/dts/stm32mp151.dtsi
@@ -1328,23 +1328,38 @@
dma-requests = <48>;
};
- fmc: nand-controller@58002000 {
- compatible = "st,stm32mp15-fmc2";
- reg = <0x58002000 0x1000>,
- <0x80000000 0x1000>,
- <0x88010000 0x1000>,
- <0x88020000 0x1000>,
- <0x81000000 0x1000>,
- <0x89010000 0x1000>,
- <0x89020000 0x1000>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
- <&mdma1 20 0x10 0x12000a08 0x0 0x0>,
- <&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
- dma-names = "tx", "rx", "ecc";
+ fmc: memory-controller@58002000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "st,stm32mp1-fmc2-ebi";
+ reg = <0x58002000 0x1000>;
clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>;
status = "disabled";
+
+ ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
+ <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
+ <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
+ <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
+ <4 0 0x80000000 0x10000000>; /* NAND */
+
+ nand-controller@4,0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32mp1-fmc2-nfc";
+ reg = <4 0x00000000 0x1000>,
+ <4 0x08010000 0x1000>,
+ <4 0x08020000 0x1000>,
+ <4 0x01000000 0x1000>,
+ <4 0x09010000 0x1000>,
+ <4 0x09020000 0x1000>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
+ <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
+ <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
+ dma-names = "tx", "rx", "ecc";
+ status = "disabled";
+ };
};
qspi: spi@58003000 {
diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts
index b19056557e..46f81ce92e 100644
--- a/arch/arm/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/dts/stm32mp157c-ev1.dts
@@ -157,14 +157,16 @@
pinctrl-0 = <&fmc_pins_a>;
pinctrl-1 = <&fmc_sleep_pins_a>;
status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
- nand@0 {
- reg = <0>;
- nand-on-flash-bbt;
- #address-cells = <1>;
- #size-cells = <1>;
+ nand-controller@4,0 {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
};
};
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index f96de9e7a3..92345b7ba3 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -18,6 +18,7 @@
mmc1 = &sdmmc2;
spi0 = &qspi;
usb0 = &usbotg_hs;
+ ethernet1 = &ksz8851;
};
config {
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 0c56b440f5..a9b9bd0902 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -74,7 +74,6 @@ static bool bsec_read_lock(u32 address, u32 otp)
return !!(readl(address + bank) & bit);
}
-#ifndef CONFIG_TFABOOT
/**
* bsec_check_error() - Check status of one otp
* @base: base address of bsec IP
@@ -279,7 +278,6 @@ static int bsec_program_otp(long base, u32 val, u32 otp)
return ret;
}
-#endif /* CONFIG_TFABOOT */
/* BSEC MISC driver *******************************************************/
struct stm32mp_bsec_platdata {
@@ -288,15 +286,17 @@ struct stm32mp_bsec_platdata {
static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
{
-#ifdef CONFIG_TFABOOT
- return stm32_smc(STM32_SMC_BSEC,
- STM32_SMC_READ_OTP,
- otp, 0, val);
-#else
- struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
+ struct stm32mp_bsec_platdata *plat;
u32 tmp_data = 0;
int ret;
+ if (IS_ENABLED(CONFIG_TFABOOT))
+ return stm32_smc(STM32_SMC_BSEC,
+ STM32_SMC_READ_OTP,
+ otp, 0, val);
+
+ plat = dev_get_platdata(dev);
+
/* read current shadow value */
ret = bsec_read_shadow(plat->base, &tmp_data, otp);
if (ret)
@@ -313,21 +313,22 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
/* restore shadow value */
ret = bsec_write_shadow(plat->base, tmp_data, otp);
+
return ret;
-#endif
}
static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp)
{
-#ifdef CONFIG_TFABOOT
- return stm32_smc(STM32_SMC_BSEC,
- STM32_SMC_READ_SHADOW,
- otp, 0, val);
-#else
- struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
+ struct stm32mp_bsec_platdata *plat;
+
+ if (IS_ENABLED(CONFIG_TFABOOT))
+ return stm32_smc(STM32_SMC_BSEC,
+ STM32_SMC_READ_SHADOW,
+ otp, 0, val);
+
+ plat = dev_get_platdata(dev);
return bsec_read_shadow(plat->base, val, otp);
-#endif
}
static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp)
@@ -342,33 +343,38 @@ static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp)
static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp)
{
-#ifdef CONFIG_TFABOOT
- return stm32_smc_exec(STM32_SMC_BSEC,
- STM32_SMC_PROG_OTP,
- otp, val);
-#else
- struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
+ struct stm32mp_bsec_platdata *plat;
+
+ if (IS_ENABLED(CONFIG_TFABOOT))
+ return stm32_smc_exec(STM32_SMC_BSEC,
+ STM32_SMC_PROG_OTP,
+ otp, val);
+
+ plat = dev_get_platdata(dev);
return bsec_program_otp(plat->base, val, otp);
-#endif
+
}
static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
{
-#ifdef CONFIG_TFABOOT
- return stm32_smc_exec(STM32_SMC_BSEC,
- STM32_SMC_WRITE_SHADOW,
- otp, val);
-#else
- struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
+ struct stm32mp_bsec_platdata *plat;
+
+ if (IS_ENABLED(CONFIG_TFABOOT))
+ return stm32_smc_exec(STM32_SMC_BSEC,
+ STM32_SMC_WRITE_SHADOW,
+ otp, val);
+
+ plat = dev_get_platdata(dev);
return bsec_write_shadow(plat->base, val, otp);
-#endif
}
static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp)
{
-#ifdef CONFIG_TFABOOT
+ if (!IS_ENABLED(CONFIG_TFABOOT))
+ return -ENOTSUPP;
+
if (val == 1)
return stm32_smc_exec(STM32_SMC_BSEC,
STM32_SMC_WRLOCK_OTP,
@@ -377,9 +383,6 @@ static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp)
return 0; /* nothing to do */
return -EINVAL;
-#else
- return -ENOTSUPP;
-#endif
}
static int stm32mp_bsec_read(struct udevice *dev, int offset,
@@ -481,18 +484,21 @@ static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev)
static int stm32mp_bsec_probe(struct udevice *dev)
{
-#if !defined(CONFIG_TFABOOT) && !defined(CONFIG_SPL_BUILD)
int otp;
- struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
+ struct stm32mp_bsec_platdata *plat;
/*
* update unlocked shadow for OTP cleared by the rom code
* only executed in U-Boot proper when TF-A is not used
*/
- for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
- if (!bsec_read_SR_lock(plat->base, otp))
- bsec_shadow_register(plat->base, otp);
-#endif
+
+ if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) {
+ plat = dev_get_platdata(dev);
+
+ for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
+ if (!bsec_read_SR_lock(plat->base, otp))
+ bsec_shadow_register(plat->base, otp);
+ }
return 0;
}
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
index cbf0120adc..49dd25b28f 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
@@ -14,7 +14,6 @@ struct stm32prog_data *stm32prog_data;
static void enable_vidconsole(void)
{
-#ifdef CONFIG_DM_VIDEO
char *stdname;
char buf[64];
@@ -35,7 +34,6 @@ static void enable_vidconsole(void)
snprintf(buf, sizeof(buf), "%s,vidconsole", stdname);
env_set("stderr", buf);
}
-#endif
}
static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -86,7 +84,8 @@ static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, int argc,
"script@1");
}
- enable_vidconsole();
+ if (IS_ENABLED(CONFIG_DM_VIDEO))
+ enable_vidconsole();
data = (struct stm32prog_data *)malloc(sizeof(*data));
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index e4199dbaa5..ec3355d816 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -544,10 +544,8 @@ static int init_device(struct stm32prog_data *data,
{
struct mmc *mmc = NULL;
struct blk_desc *block_dev = NULL;
-#ifdef CONFIG_MTD
struct mtd_info *mtd = NULL;
char mtd_id[16];
-#endif
int part_id;
int ret;
u64 first_addr = 0, last_addr = 0;
@@ -557,8 +555,11 @@ static int init_device(struct stm32prog_data *data,
const char *part_name;
switch (dev->target) {
-#ifdef CONFIG_MMC
case STM32PROG_MMC:
+ if (!IS_ENABLED(CONFIG_MMC)) {
+ stm32prog_err("unknown device type = %d", dev->target);
+ return -ENODEV;
+ }
mmc = find_mmc_device(dev->dev_id);
if (!mmc || mmc_init(mmc)) {
stm32prog_err("mmc device %d not found", dev->dev_id);
@@ -589,11 +590,13 @@ static int init_device(struct stm32prog_data *data,
first_addr, last_addr);
pr_debug(" full_update = %d\n", dev->full_update);
break;
-#endif
-#ifdef CONFIG_MTD
case STM32PROG_NOR:
case STM32PROG_NAND:
case STM32PROG_SPI_NAND:
+ if (!IS_ENABLED(CONFIG_MTD)) {
+ stm32prog_err("unknown device type = %d", dev->target);
+ return -ENODEV;
+ }
get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
pr_debug("%s\n", mtd_id);
@@ -612,7 +615,6 @@ static int init_device(struct stm32prog_data *data,
first_addr, last_addr);
dev->mtd = mtd;
break;
-#endif
case STM32PROG_RAM:
first_addr = gd->bd->bi_dram[0].start;
last_addr = first_addr + gd->bd->bi_dram[0].size;
@@ -744,8 +746,7 @@ static int init_device(struct stm32prog_data *data,
part_found = true;
}
-#ifdef CONFIG_MTD
- if (mtd) {
+ if (IS_ENABLED(CONFIG_MTD) && mtd) {
char mtd_part_id[32];
struct part_info *mtd_part;
struct mtd_device *mtd_dev;
@@ -766,7 +767,7 @@ static int init_device(struct stm32prog_data *data,
part_name = mtd_part->name;
part_found = true;
}
-#endif
+
if (!part_found) {
stm32prog_err("%s (0x%x): Invalid partition",
part->name, part->id);
@@ -873,9 +874,8 @@ static int treat_partition_list(struct stm32prog_data *data)
return 0;
}
-static int create_partitions(struct stm32prog_data *data)
+static int create_gpt_partitions(struct stm32prog_data *data)
{
-#ifdef CONFIG_MMC
int offset = 0;
const int buflen = SZ_8K;
char *buf;
@@ -991,7 +991,6 @@ static int create_partitions(struct stm32prog_data *data)
run_command("mtd list", 0);
#endif
free(buf);
-#endif
return 0;
}
@@ -1070,28 +1069,35 @@ static int stm32prog_alt_add(struct stm32prog_data *data,
offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
" %d;", part->part_id);
}
+ ret = -ENODEV;
switch (part->target) {
-#ifdef CONFIG_MMC
case STM32PROG_MMC:
- sprintf(dfustr, "mmc");
- sprintf(devstr, "%d", part->dev_id);
+ if (IS_ENABLED(CONFIG_MMC)) {
+ ret = 0;
+ sprintf(dfustr, "mmc");
+ sprintf(devstr, "%d", part->dev_id);
+ }
break;
-#endif
-#ifdef CONFIG_MTD
case STM32PROG_NAND:
case STM32PROG_NOR:
case STM32PROG_SPI_NAND:
- sprintf(dfustr, "mtd");
- get_mtd_by_target(devstr, part->target, part->dev_id);
+ if (IS_ENABLED(CONFIG_MTD)) {
+ ret = 0;
+ sprintf(dfustr, "mtd");
+ get_mtd_by_target(devstr, part->target, part->dev_id);
+ }
break;
-#endif
case STM32PROG_RAM:
+ ret = 0;
sprintf(dfustr, "ram");
sprintf(devstr, "0");
break;
default:
+ break;
+ }
+ if (ret) {
stm32prog_err("invalid target: %d", part->target);
- return -ENODEV;
+ return ret;
}
pr_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
ret = dfu_alt_add(dfu, dfustr, devstr, buf);
@@ -1213,13 +1219,14 @@ int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
long *size)
{
-#ifndef CONFIG_ARM_SMCCC
- stm32prog_err("OTP update not supported");
-
- return -1;
-#else
int result = 0;
+ if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
+ stm32prog_err("OTP update not supported");
+
+ return -1;
+ }
+
pr_debug("%s: %x %lx\n", __func__, offset, *size);
/* alway read for first packet */
if (!offset) {
@@ -1255,19 +1262,19 @@ end_otp_read:
pr_debug("%s: result %i\n", __func__, result);
return result;
-#endif
}
int stm32prog_otp_start(struct stm32prog_data *data)
{
-#ifndef CONFIG_ARM_SMCCC
- stm32prog_err("OTP update not supported");
-
- return -1;
-#else
int result = 0;
struct arm_smccc_res res;
+ if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
+ stm32prog_err("OTP update not supported");
+
+ return -1;
+ }
+
if (!data->otp_part) {
stm32prog_err("start OTP without data");
return -1;
@@ -1302,7 +1309,6 @@ int stm32prog_otp_start(struct stm32prog_data *data)
pr_debug("%s: result %i\n", __func__, result);
return result;
-#endif
}
int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
@@ -1538,19 +1544,20 @@ static int part_delete(struct stm32prog_data *data,
struct stm32prog_part_t *part)
{
int ret = 0;
-#ifdef CONFIG_MMC
unsigned long blks, blks_offset, blks_size;
struct blk_desc *block_dev = NULL;
- #endif
-#ifdef CONFIG_MTD
char cmdbuf[40];
char devstr[10];
-#endif
printf("Erasing %s ", part->name);
switch (part->target) {
-#ifdef CONFIG_MMC
case STM32PROG_MMC:
+ if (!IS_ENABLED(CONFIG_MMC)) {
+ ret = -1;
+ stm32prog_err("%s (0x%x): erase invalid",
+ part->name, part->id);
+ break;
+ }
printf("on mmc %d: ", part->dev->dev_id);
block_dev = mmc_get_blk_desc(part->dev->mmc);
blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
@@ -1576,11 +1583,15 @@ static int part_delete(struct stm32prog_data *data,
part->name, part->id);
}
break;
-#endif
-#ifdef CONFIG_MTD
case STM32PROG_NOR:
case STM32PROG_NAND:
case STM32PROG_SPI_NAND:
+ if (!IS_ENABLED(CONFIG_MTD)) {
+ ret = -1;
+ stm32prog_err("%s (0x%x): erase invalid",
+ part->name, part->id);
+ break;
+ }
get_mtd_by_target(devstr, part->target, part->dev->dev_id);
printf("on %s: ", devstr);
sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
@@ -1591,7 +1602,6 @@ static int part_delete(struct stm32prog_data *data,
part->name, part->id, cmdbuf);
}
break;
-#endif
case STM32PROG_RAM:
printf("on ram: ");
memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
@@ -1639,9 +1649,11 @@ static void stm32prog_devices_init(struct stm32prog_data *data)
goto error;
}
- ret = create_partitions(data);
- if (ret)
- goto error;
+ if (IS_ENABLED(CONFIG_MMC)) {
+ ret = create_gpt_partitions(data);
+ if (ret)
+ goto error;
+ }
/* delete partition GPT or MTD */
for (i = 0; i < data->part_nb; i++) {
generated by cgit (git 2.34.1) at 2025-01-24 14:33:54 +0000