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-rw-r--r--arch/arm/include/asm/arch-imx/cpu.h5
-rw-r--r--arch/arm/include/asm/mach-imx/sys_proto.h9
-rw-r--r--arch/arm/mach-imx/cpu.c12
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c34
4 files changed, 57 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index e9c0078922..75ff991248 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -41,6 +41,11 @@
#define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */
#define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */
#define MXC_CPU_IMX8MP 0x182/* dummy ID */
+#define MXC_CPU_IMX8MP7 0x183 /* dummy ID */
+#define MXC_CPU_IMX8MP6 0x184 /* dummy ID */
+#define MXC_CPU_IMX8MP5 0x185 /* dummy ID */
+#define MXC_CPU_IMX8MPL 0x186 /* dummy ID */
+#define MXC_CPU_IMX8MPD 0x187 /* dummy ID */
#define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */
#define MXC_CPU_IMX8QM 0x91 /* dummy ID */
#define MXC_CPU_IMX8QXP 0x92 /* dummy ID */
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 0bc705df17..ab94024c9b 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -66,7 +66,14 @@ struct bd_info;
#define is_imx8mnl() (is_cpu_type(MXC_CPU_IMX8MNL))
#define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL))
#define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL))
-#define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP))
+#define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP) || is_cpu_type(MXC_CPU_IMX8MPD) || \
+ is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP7) || \
+ is_cpu_type(MXC_CPU_IMX8MP6) || is_cpu_type(MXC_CPU_IMX8MP5))
+#define is_imx8mpd() (is_cpu_type(MXC_CPU_IMX8MPD))
+#define is_imx8mpl() (is_cpu_type(MXC_CPU_IMX8MPL))
+#define is_imx8mp7() (is_cpu_type(MXC_CPU_IMX8MP7))
+#define is_imx8mp6() (is_cpu_type(MXC_CPU_IMX8MP6))
+#define is_imx8mp5() (is_cpu_type(MXC_CPU_IMX8MP5))
#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index f2070c9714..b89d27ffd2 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -96,7 +96,17 @@ const char *get_imx_type(u32 imxtype)
{
switch (imxtype) {
case MXC_CPU_IMX8MP:
- return "8MP"; /* Quad-core version of the imx8mp */
+ return "8MP[8]"; /* Quad-core version of the imx8mp */
+ case MXC_CPU_IMX8MPD:
+ return "8MP Dual[3]"; /* Dual-core version of the imx8mp */
+ case MXC_CPU_IMX8MPL:
+ return "8MP Lite[4]"; /* Quad-core Lite version of the imx8mp */
+ case MXC_CPU_IMX8MP7:
+ return "8MP[7]"; /* Quad-core version of the imx8mp, VPU fused */
+ case MXC_CPU_IMX8MP6:
+ return "8MP[6]"; /* Quad-core version of the imx8mp, NPU fused */
+ case MXC_CPU_IMX8MP5:
+ return "8MP[5]"; /* Quad-core version of the imx8mp, ISP fused */
case MXC_CPU_IMX8MN:
return "8MNano Quad"; /* Quad-core version */
case MXC_CPU_IMX8MND:
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 9caf08e86c..c103bc3ad1 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -211,6 +211,38 @@ static u32 get_cpu_variant_type(u32 type)
return MXC_CPU_IMX8MNL;
break;
}
+ } else if (type == MXC_CPU_IMX8MP) {
+ u32 value0 = readl(&fuse->tester3);
+ u32 flag = 0;
+
+ if ((value0 & 0xc0000) == 0x80000)
+ return MXC_CPU_IMX8MPD;
+
+ /* vpu disabled */
+ if ((value0 & 0x43000000) == 0x43000000)
+ flag = 1;
+
+ /* npu disabled*/
+ if ((value & 0x8) == 0x8)
+ flag |= (1 << 1);
+
+ /* isp disabled */
+ if ((value & 0x3) == 0x3)
+ flag |= (1 << 2);
+
+ switch (flag) {
+ case 7:
+ return MXC_CPU_IMX8MPL;
+ case 6:
+ return MXC_CPU_IMX8MP5;
+ case 2:
+ return MXC_CPU_IMX8MP6;
+ case 1:
+ return MXC_CPU_IMX8MP7;
+ default:
+ break;
+ }
+
}
return type;
@@ -228,7 +260,7 @@ u32 get_cpu_rev(void)
/* iMX8MP */
if (major_low == 0x43) {
- return (MXC_CPU_IMX8MP << 12) | reg;
+ type = get_cpu_variant_type(MXC_CPU_IMX8MP);
} else if (major_low == 0x42) {
/* iMX8MN */
type = get_cpu_variant_type(MXC_CPU_IMX8MN);