diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/armada-xp-theadorable.dts | 6 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/dram.c | 10 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/cpu.h | 4 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl | 1 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-quark/acpi/global_nvs.asl | 1 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl | 1 |
6 files changed, 12 insertions, 11 deletions
diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts index 7087ccfc2f..965c38426c 100644 --- a/arch/arm/dts/armada-xp-theadorable.dts +++ b/arch/arm/dts/armada-xp-theadorable.dts @@ -134,7 +134,7 @@ u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <1>; - compatible = "n25q128a13", "jedec,spi-nor"; + compatible = "n25q128a13", "jedec,spi-nor", "spi-flash"; reg = <0>; /* Chip select 0 */ spi-max-frequency = <27777777>; }; @@ -151,11 +151,11 @@ spi1: spi@10680 { status = "okay"; - fpga@2 { + fpga@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spi-generic-device"; - reg = <2>; /* Chip select 2 */ + reg = <0>; /* Chip select 0 */ spi-max-frequency = <27777777>; }; }; diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c index 68383d06a2..fa8c799a46 100644 --- a/arch/arm/mach-mvebu/dram.c +++ b/arch/arm/mach-mvebu/dram.c @@ -33,7 +33,9 @@ struct sdram_addr_dec { #define REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2) #define REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24) -#define SDRAM_SIZE_MAX 0xc0000000 +#ifndef MVEBU_SDRAM_SIZE_MAX +#define MVEBU_SDRAM_SIZE_MAX 0xc0000000 +#endif #define SCRUB_MAGIC 0xbeefdead @@ -275,8 +277,8 @@ int dram_init(void) * address space left for the internal registers etc. */ size += mvebu_sdram_bs(i); - if (size > SDRAM_SIZE_MAX) - size = SDRAM_SIZE_MAX; + if (size > MVEBU_SDRAM_SIZE_MAX) + size = MVEBU_SDRAM_SIZE_MAX; } for (; i < CONFIG_NR_DRAM_BANKS; i++) { @@ -312,7 +314,7 @@ int dram_init_banksize(void) /* Clip the banksize to 1GiB if it exceeds the max size */ size += gd->bd->bi_dram[i].size; - if (size > SDRAM_SIZE_MAX) + if (size > MVEBU_SDRAM_SIZE_MAX) mvebu_sdram_bs_set(i, 0x40000000); } diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index d1042100a8..85d7dd1610 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -68,10 +68,12 @@ enum { MVEBU_SOC_UNKNOWN, }; +#define MVEBU_SDRAM_SIZE_MAX 0xc0000000 + /* * Default Device Address MAP BAR values */ -#define MBUS_PCI_MEM_BASE 0xE8000000 +#define MBUS_PCI_MEM_BASE MVEBU_SDRAM_SIZE_MAX #define MBUS_PCI_MEM_SIZE (128 << 20) #define MBUS_PCI_IO_BASE 0xF1100000 #define MBUS_PCI_IO_SIZE (64 << 10) diff --git a/arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl b/arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl index 9b8d1895ee..aaf87f4735 100644 --- a/arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl +++ b/arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl @@ -8,7 +8,6 @@ OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE) Field(GNVS, ByteAcc, NoLock, Preserve) { - Offset (0x00), PCNT, 8, /* processor count */ IURE, 8, /* internal UART enabled */ } diff --git a/arch/x86/include/asm/arch-quark/acpi/global_nvs.asl b/arch/x86/include/asm/arch-quark/acpi/global_nvs.asl index 44b9f12c7c..61602173f8 100644 --- a/arch/x86/include/asm/arch-quark/acpi/global_nvs.asl +++ b/arch/x86/include/asm/arch-quark/acpi/global_nvs.asl @@ -8,6 +8,5 @@ OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE) Field(GNVS, ByteAcc, NoLock, Preserve) { - Offset (0x00), PCNT, 8, /* processor count */ } diff --git a/arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl b/arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl index a6296c2cb6..895b807e96 100644 --- a/arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl +++ b/arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl @@ -10,6 +10,5 @@ OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE) Field(GNVS, ByteAcc, NoLock, Preserve) { - Offset (0x00), PCNT, 8, /* processor count */ } |