diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-vf610/imx-regs.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-vf610/iomux-vf610.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-imx/ddrmc-vf610.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-imx/imx8/cpu.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-imx/imx8m/clock.c | 4 |
5 files changed, 12 insertions, 7 deletions
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h index 08ba8e94f8..f71fbf4e73 100644 --- a/arch/arm/include/asm/arch-vf610/imx-regs.h +++ b/arch/arm/include/asm/arch-vf610/imx-regs.h @@ -200,7 +200,8 @@ #define DDRMC_CR78_Q_FULLNESS(v) (((v) & 0x7) << 24) #define DDRMC_CR78_BUR_ON_FLY_BIT(v) ((v) & 0xf) #define DDRMC_CR79_CTLUPD_AREF(v) (((v) & 0x1) << 24) -#define DDRMC_CR82_INT_MASK 0x10000000 +#define DDRMC_CR80_MC_INIT_COMPLETE (1 << 8) +#define DDRMC_CR82_INT_MASK (1 << 28) #define DDRMC_CR87_ODT_WR_MAPCS0(v) ((v) << 24) #define DDRMC_CR87_ODT_RD_MAPCS0(v) ((v) << 16) #define DDRMC_CR88_TODTL_CMD(v) (((v) & 0x1f) << 16) @@ -239,7 +240,7 @@ #define DDRMC_CR132_RDLAT_ADJ(v) ((v) & 0x3f) #define DDRMC_CR137_PHYCTL_DL(v) (((v) & 0xf) << 16) #define DDRMC_CR138_PHY_WRLV_MXDL(v) (((v) & 0xffff) << 16) -#define DDRMC_CR138_PHYDRAM_CK_EN(v) (((v) & 0x8) << 8) +#define DDRMC_CR138_PHYDRAM_CK_EN(v) (((v) & 0x7) << 8) #define DDRMC_CR139_PHY_WRLV_RESPLAT(v) (((v) & 0xff) << 24) #define DDRMC_CR139_PHY_WRLV_LOAD(v) (((v) & 0xff) << 16) #define DDRMC_CR139_PHY_WRLV_DLL(v) (((v) & 0xff) << 8) diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h index c0eeaa7e7d..01bc2998b8 100644 --- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h +++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h @@ -244,6 +244,8 @@ enum { VF610_PAD_DDR_WE__DDR_WE_B = IOMUX_PAD(0x02d0, 0x02d0, 0, __NA_, 0, VF610_DDR_PAD_CTRL), VF610_PAD_DDR_ODT1__DDR_ODT_0 = IOMUX_PAD(0x02d4, 0x02d4, 0, __NA_, 0, VF610_DDR_PAD_CTRL), VF610_PAD_DDR_ODT0__DDR_ODT_1 = IOMUX_PAD(0x02d8, 0x02d8, 0, __NA_, 0, VF610_DDR_PAD_CTRL), + VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 = IOMUX_PAD(0x02dc, 0x02dc, 0, __NA_, 0, VF610_DDR_PAD_CTRL), + VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2 = IOMUX_PAD(0x02e0, 0x02e0, 0, __NA_, 0, VF610_DDR_PAD_CTRL), }; #endif /* __IOMUX_VF610_H__ */ diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c index 3d7da1c25e..fa948f7812 100644 --- a/arch/arm/mach-imx/ddrmc-vf610.c +++ b/arch/arm/mach-imx/ddrmc-vf610.c @@ -61,6 +61,8 @@ void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count) VF610_PAD_DDR_WE__DDR_WE_B, VF610_PAD_DDR_ODT1__DDR_ODT_0, VF610_PAD_DDR_ODT0__DDR_ODT_1, + VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1, + VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2, VF610_PAD_DDR_RESETB, }; @@ -188,7 +190,6 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings, DDRMC_CR77_SWAP_EN, &ddrmr->cr[77]); writel(DDRMC_CR78_Q_FULLNESS(timings->q_fullness) | DDRMC_CR78_BUR_ON_FLY_BIT(12), &ddrmr->cr[78]); - writel(DDRMC_CR79_CTLUPD_AREF(0), &ddrmr->cr[79]); writel(DDRMC_CR82_INT_MASK, &ddrmr->cr[82]); @@ -231,6 +232,7 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings, /* all inits done, start the DDR controller */ writel(DDRMC_CR00_DRAM_CLASS_DDR3 | DDRMC_CR00_START, &ddrmr->cr[0]); - while (!(readl(&ddrmr->cr[80]) && 0x100)) + while (!(readl(&ddrmr->cr[80]) & DDRMC_CR80_MC_INIT_COMPLETE)) udelay(10); + writel(DDRMC_CR80_MC_INIT_COMPLETE, &ddrmr->cr[81]); } diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index f093f34ca5..7599afe720 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -573,7 +573,7 @@ int cpu_imx_get_desc(struct udevice *dev, char *buf, int size) if (size < 100) return -ENOSPC; - snprintf(buf, size, "CPU: Freescale i.MX8%s Rev%s %s at %u MHz\n", + snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz\n", plat->type, plat->rev, plat->name, plat->freq_mhz); return 0; diff --git a/arch/arm/mach-imx/imx8m/clock.c b/arch/arm/mach-imx/imx8m/clock.c index 3766d988ba..289b9417aa 100644 --- a/arch/arm/mach-imx/imx8m/clock.c +++ b/arch/arm/mach-imx/imx8m/clock.c @@ -250,9 +250,9 @@ static u32 get_root_src_clk(enum clk_root_src root_src) case OSC_25M_CLK: return 25000000; case OSC_27M_CLK: - return 25000000; + return 27000000; case OSC_32K_CLK: - return 32000; + return 32768; case ARM_PLL_CLK: return decode_frac_pll(root_src); case SYSTEM_PLL1_800M_CLK: |