summaryrefslogtreecommitdiff
path: root/board/amcc/katmai
diff options
context:
space:
mode:
Diffstat (limited to 'board/amcc/katmai')
-rw-r--r--board/amcc/katmai/cmd_katmai.c105
-rw-r--r--board/amcc/katmai/init.S12
-rw-r--r--board/amcc/katmai/katmai.c36
-rw-r--r--board/amcc/katmai/katmai.h65
4 files changed, 65 insertions, 153 deletions
diff --git a/board/amcc/katmai/cmd_katmai.c b/board/amcc/katmai/cmd_katmai.c
index 684f6a5863..439be4fa9d 100644
--- a/board/amcc/katmai/cmd_katmai.c
+++ b/board/amcc/katmai/cmd_katmai.c
@@ -27,6 +27,9 @@
#include <i2c.h>
#include <asm/byteorder.h>
+#define CONFIG_STRESS /* enable 667 MHz CPU freq selection */
+#define DEBUG
+
static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
uchar chip;
@@ -49,55 +52,28 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
else
chip = IIC0_ALT_BOOTPROM_ADDR;
- do {
- printf("enter sys clock frequency 33 or 66 Mhz or quit to abort\n");
- nbytes = readline (" ? ");
-
- if (strcmp(console_buffer, "quit") == 0)
- return 0;
-
- if ((strcmp(console_buffer, "33") != 0) &
- (strcmp(console_buffer, "66") != 0))
- nbytes=0;
-
- strcpy(sysClock, console_buffer);
-
- } while (nbytes == 0);
+ /* on Katmai SysClk is always 33MHz */
+ strcpy(sysClock, "33");
do {
- if (strcmp(sysClock, "66") == 0) {
- printf("enter cpu clock frequency 400, 533 Mhz or quit to abort\n");
- } else {
#ifdef CONFIG_STRESS
- printf("enter cpu clock frequency 400, 500, 533, 667 Mhz or quit to abort\n");
+ printf("enter cpu clock frequency 400, 500, 533, 667 Mhz or quit to abort\n");
#else
- printf("enter cpu clock frequency 400, 500, 533 Mhz or quit to abort\n");
+ printf("enter cpu clock frequency 400, 500, 533 Mhz or quit to abort\n");
#endif
- }
nbytes = readline (" ? ");
if (strcmp(console_buffer, "quit") == 0)
return 0;
- if (strcmp(sysClock, "66") == 0) {
- if ((strcmp(console_buffer, "400") != 0) &
- (strcmp(console_buffer, "533") != 0)
-#ifdef CONFIG_STRESS
- & (strcmp(console_buffer, "667") != 0)
-#endif
- ) {
- nbytes = 0;
- }
- } else {
- if ((strcmp(console_buffer, "400") != 0) &
- (strcmp(console_buffer, "500") != 0) &
- (strcmp(console_buffer, "533") != 0)
+ if ((strcmp(console_buffer, "400") != 0) &&
+ (strcmp(console_buffer, "500") != 0) &&
+ (strcmp(console_buffer, "533") != 0)
#ifdef CONFIG_STRESS
- & (strcmp(console_buffer, "667") != 0)
+ && (strcmp(console_buffer, "667") != 0)
#endif
- ) {
- nbytes = 0;
- }
+ ) {
+ nbytes = 0;
}
strcpy(cpuClock, console_buffer);
@@ -124,13 +100,13 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 0;
if (strcmp(cpuClock, "400") == 0) {
- if ((strcmp(console_buffer, "100") != 0) &
+ if ((strcmp(console_buffer, "100") != 0) &&
(strcmp(console_buffer, "133") != 0))
nbytes = 0;
}
#ifdef CONFIG_STRESS
if (strcmp(cpuClock, "667") == 0) {
- if ((strcmp(console_buffer, "133") != 0) &
+ if ((strcmp(console_buffer, "133") != 0) &&
(strcmp(console_buffer, "166") != 0))
nbytes = 0;
}
@@ -147,9 +123,9 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if (strcmp(console_buffer, "quit") == 0)
return 0;
- if ((strcmp(console_buffer, "33") != 0) &
- (strcmp(console_buffer, "66") != 0) &
- (strcmp(console_buffer, "100") != 0) &
+ if ((strcmp(console_buffer, "33") != 0) &&
+ (strcmp(console_buffer, "66") != 0) &&
+ (strcmp(console_buffer, "100") != 0) &&
(strcmp(console_buffer, "133") != 0)) {
nbytes = 0;
}
@@ -176,11 +152,11 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
} while (nbytes == 0);
if (strcmp(sysClock, "33") == 0) {
- if ((strcmp(cpuClock, "400") == 0) &
+ if ((strcmp(cpuClock, "400") == 0) &&
(strcmp(plbClock, "100") == 0))
data = 0x8678c206;
- if ((strcmp(cpuClock, "400") == 0) &
+ if ((strcmp(cpuClock, "400") == 0) &&
(strcmp(plbClock, "133") == 0))
data = 0x8678c2c6;
@@ -189,42 +165,16 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if ((strcmp(cpuClock, "533") == 0))
data = 0x87790252;
-
#ifdef CONFIG_STRESS
- if ((strcmp(cpuClock, "667") == 0) &
+ if ((strcmp(cpuClock, "667") == 0) &&
(strcmp(plbClock, "133") == 0))
data = 0x87794256;
- if ((strcmp(cpuClock, "667") == 0) &
+ if ((strcmp(cpuClock, "667") == 0) &&
(strcmp(plbClock, "166") == 0))
data = 0x87794206;
-
-#endif
- }
- if (strcmp(sysClock, "66") == 0) {
- if ((strcmp(cpuClock, "400") == 0) &
- (strcmp(plbClock, "100") == 0))
- data = 0x84706206;
-
- if ((strcmp(cpuClock, "400") == 0) &
- (strcmp(plbClock, "133") == 0))
- data = 0x847062c6;
-
- if ((strcmp(cpuClock, "533") == 0))
- data = 0x85708206;
-
-#ifdef CONFIG_STRESS
- if ((strcmp(cpuClock, "667") == 0) &
- (strcmp(plbClock, "133") == 0))
- data = 0x8570a256;
-
- if ((strcmp(cpuClock, "667") == 0) &
- (strcmp(plbClock, "166") == 0))
- data = 0x8570a206;
-
#endif
}
-
#ifdef DEBUG
printf(" pin strap0 to write in i2c = %x\n", data);
#endif /* DEBUG */
@@ -233,19 +183,20 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
printf("Error writing strap0 in %s\n", argv[2]);
if (strcmp(pcixClock, "33") == 0)
- data = 0x00000701;
+ data = 0x000007E1;
if (strcmp(pcixClock, "66") == 0)
- data = 0x00000601;
+ data = 0x000006E1;
if (strcmp(pcixClock, "100") == 0)
- data = 0x00000501;
+ data = 0x000005E1;
if (strcmp(pcixClock, "133") == 0)
- data = 0x00000401;
+ data = 0x000004E1;
if (strcmp(plbClock, "166") == 0)
- data |= 0x05950000;
+/* data |= 0x05950000; */ /* this set's DDR2 clock == PLB clock */
+ data |= 0x05A50000; /* this set's DDR2 clock == 2 * PLB clock */
else
data |= 0x05A50000;
diff --git a/board/amcc/katmai/init.S b/board/amcc/katmai/init.S
index f5900bcb7b..5202ae694c 100644
--- a/board/amcc/katmai/init.S
+++ b/board/amcc/katmai/init.S
@@ -46,6 +46,11 @@
.globl tlbtabA
tlbtabA:
tlbtab_start
+
+ /*
+ * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+ * speed up boot process. It is patched after relocation to enable SA_I
+ */
tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_R|AC_W|AC_X|SA_G)
/*
@@ -81,6 +86,11 @@ tlbtabA:
.globl tlbtabB
tlbtabB:
tlbtab_start
+
+ /*
+ * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+ * speed up boot process. It is patched after relocation to enable SA_I
+ */
tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_R|AC_W|AC_X|SA_G)
/*
@@ -93,7 +103,7 @@ tlbtabB:
tlbentry(CFG_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_ACE_BASE, SZ_1K, 0xE0000000, 4,AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_ACE_BASE, SZ_1K, CFG_ACE_BASE, 4,AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I)
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index 8704925a9c..286bdc1f21 100644
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -27,8 +27,8 @@
#include <asm/processor.h>
#include <i2c.h>
#include <asm-ppc/io.h>
+#include <asm-ppc/gpio.h>
-#include "katmai.h"
#include "../cpu/ppc4xx/440spe_pcie.h"
#undef PCIE_ENDPOINT
@@ -40,7 +40,6 @@ void ppc440spe_setup_pcie(struct pci_controller *hose, int port);
int board_early_init_f (void)
{
unsigned long mfr;
- unsigned long pfc;
/*----------------------------------------------------------------------+
* Interrupt controller setup for the Katmai 440SPe Evaluation board.
@@ -228,15 +227,11 @@ int board_early_init_f (void)
mfr &= ~SDR0_MFR_ECS_MASK;
/* mtsdr(sdr_mfr, mfr); */
- /*
- * Setup GPIO signalling per defines in katmai.h
- */
- pfc = PFC0_KATMAI;
- mtsdr(SDR0_PFC0, pfc);
+ mtsdr(SDR0_PFC0, CFG_PFC0);
- out32(GPIO0_OR_ADDR, GPIO_OR_KATMAI);
- out32(GPIO0_ODR_ADDR, GPIO_ODR_KATMAI);
- out32(GPIO0_TCR_ADDR, GPIO_TCR_KATMAI);
+ out32(GPIO0_OR, CFG_GPIO_OR);
+ out32(GPIO0_ODR, CFG_GPIO_ODR);
+ out32(GPIO0_TCR, CFG_GPIO_TCR);
return 0;
}
@@ -378,6 +373,23 @@ int is_pci_host(struct pci_controller *hose)
return 1;
}
+int katmai_pcie_card_present(int port)
+{
+ u32 val;
+
+ val = in32(GPIO0_IR);
+ switch (port) {
+ case 0:
+ return !(val & GPIO_VAL(CFG_GPIO_PCIE_PRESENT0));
+ case 1:
+ return !(val & GPIO_VAL(CFG_GPIO_PCIE_PRESENT1));
+ case 2:
+ return !(val & GPIO_VAL(CFG_GPIO_PCIE_PRESENT2));
+ default:
+ return 0;
+ }
+}
+
static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
void pcie_setup_hoses(void)
@@ -391,6 +403,10 @@ void pcie_setup_hoses(void)
*/
bus = 1;
for (i = 0; i <= 2; i++) {
+ /* Check for katmai card presence */
+ if (!katmai_pcie_card_present(i))
+ continue;
+
#ifdef PCIE_ENDPOINT
if (ppc440spe_init_pcie_endport(i)) {
#else
diff --git a/board/amcc/katmai/katmai.h b/board/amcc/katmai/katmai.h
deleted file mode 100644
index 9d5b793f13..0000000000
--- a/board/amcc/katmai/katmai.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2007
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __KATMAI_H_
-#define __KATMAI_H_
-
-/*----------------------------------------------------------------------------
- * XX
- * XXXX XX XXX XXX XXXX
- * XX XX XX XX XX XX
- * XX XXX XX XX XX XX XX
- * XX XX XXXXX XX XX XX
- * XXXX XX XXXX XXXX
- * XXXX
- *
- * The 440SPe provices 32 bits of GPIO. By default all GPIO pins
- * are disabled, and must be explicitly enabled by setting a
- * bit in the SDR0_PFC0 indirect DCR. Each GPIO maps 1-to-1 with the
- * corresponding bit in the SDR0_PFC0 register (note that bit numbers
- * reflect the PowerPC convention where bit 0 is the most-significant
- * bit).
- *
- * Katmai specific:
- * RS232_RX_EN# is held HIGH during reset by hardware, keeping the
- * RS232_CTS, DSR & DCD signals coming from the MAX3411 (U26) in
- * Hi-Z condition. This prevents contention between the MAX3411 (U26)
- * and 74CBTLV3125PG (U2) during reset.
- *
- * RS232_RX_EN# is connected as GPIO pin 30. Once the processor
- * is released from reset, this pin must be configured as an output and
- * then driven high to enable the receive signals from the UART transciever.
- *----------------------------------------------------------------------------*/
-#define GPIO_ENABLE(gpio) (0x80000000 >> (gpio))
-
-#define PFC0_KATMAI GPIO_ENABLE(30)
-#define GPIO_OR_KATMAI GPIO_ENABLE(30) /* Drive all outputs low except GPIO 30 */
-#define GPIO_TCR_KATMAI GPIO_ENABLE(30)
-#define GPIO_ODR_KATMAI 0 /* Disable open drain for all outputs */
-
-#define GPIO0_OR_ADDR (CFG_PERIPHERAL_BASE + 0x700)
-#define GPIO0_TCR_ADDR (CFG_PERIPHERAL_BASE + 0x704)
-#define GPIO0_ODR_ADDR (CFG_PERIPHERAL_BASE + 0x718)
-#define GPIO0_IR_ADDR (CFG_PERIPHERAL_BASE + 0x71C)
-
-#endif /* __KATMAI_H_ */
generated by cgit (git 2.34.1) at 2025-02-23 05:12:38 +0000