diff options
Diffstat (limited to 'board/boundary')
| -rw-r--r-- | board/boundary/nitrogen6x/README.mx6qsabrelite | 72 | ||||
| -rw-r--r-- | board/boundary/nitrogen6x/nitrogen6x.c | 46 |
2 files changed, 80 insertions, 38 deletions
diff --git a/board/boundary/nitrogen6x/README.mx6qsabrelite b/board/boundary/nitrogen6x/README.mx6qsabrelite new file mode 100644 index 0000000000..12a9c856cf --- /dev/null +++ b/board/boundary/nitrogen6x/README.mx6qsabrelite @@ -0,0 +1,72 @@ +U-Boot for the Freescale i.MX6q SabreLite board + +This file contains information for the port of U-Boot to the Freescale +i.MX6q SabreLite board. + +1. Boot source, boot from SD card +--------------------------------- + +The recent mainline U-Boot for the Freescale i.MX6q SabreLite board supports +boot from SD card only. However, by default, the SabreLite +boards boot from the SPI NOR flash. These boards need to be reflashed with +a small SD card loader to support boot from SD card. This small SD card loader +will be flashed into the SPI NOR. The board will still boot from SPI NOR, but +the loader will in turn request the BootROM to load the U-Boot from SD card. + +The SD card loader is available from + +https://wiki.linaro.org/Boards/MX6QSabreLite + +under a open-source 3-clause BSD license. + +To update the SPI-NOR on the SabreLite board without the Freescale +manufacturing tool use the following procedure: + +1. Write this SD card loader onto a large SD card using: + + sudo dd if=iMX6DQ_SPI_to_uSDHC3.bin of=/dev/sXx + +Note: Replace sXx with the device representing the SD card in your system. + +Note: This writes SD card loader at address 0 + +2. Put this SD card into the slot for the large SD card (SD3 on the bottom of +the board). Make sure SW1 switch is at position "00", so that it can boot +from the fuses. + +3. Power-up the SabreLite, press 'space' to enter command mode in the U-Boot +(the default one the board is shipped with, starting from the SPI NOR) and +enter the following commands: + + MX6Q SABRELITE U-Boot > mmc dev 0 + MX6Q SABRELITE U-Boot > mmc read 0x10800000 0 200 + MX6Q SABRELITE U-Boot > sf probe + MX6Q SABRELITE U-Boot > sf erase 0 0x40000 + MX6Q SABRELITE U-Boot > sf write 0x10800000 0 0x40000 + +4. done. + +In case you somehow do not succeed with this procedure you will have to use +the Freescale manufacturing tool in order to reflash the SPI-NOR. + +Note: The board now boots from full size SD3 on the bottom of the board. NOT + the micro SD4/BOOT slot on the top of the board. I.e. you have to use + full size SD cards. + +This information is taken from + +https://wiki.linaro.org/Boards/MX6QSabreLite + +2. Build +-------- + +To build U-Boot for the SabreLite board: + + make mx6qsabrelite_config + make + +To copy the resulting u-boot.imx to the SD card: + + sudo dd if=u-boot.imx of=/dev/sXx bs=512 seek=2&&sudo sync + +Note: Replace sXx with the device representing the SD card in your system. diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 1a29b6f4bd..79ab44904e 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -461,25 +461,12 @@ struct display_info_t { static int detect_hdmi(struct display_info_t const *dev) { struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; - return readb(&hdmi->phy_stat0) & HDMI_PHY_HPD; + return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; } -static void enable_hdmi(struct display_info_t const *dev) +static void do_enable_hdmi(struct display_info_t const *dev) { - struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; - u8 reg; - printf("%s: setup HDMI monitor\n", __func__); - reg = readb(&hdmi->phy_conf0); - reg |= HDMI_PHY_CONF0_PDZ_MASK; - writeb(reg, &hdmi->phy_conf0); - - udelay(3000); - reg |= HDMI_PHY_CONF0_ENTMDS_MASK; - writeb(reg, &hdmi->phy_conf0); - udelay(3000); - reg |= HDMI_PHY_CONF0_GEN2_TXPWRON_MASK; - writeb(reg, &hdmi->phy_conf0); - writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz); + imx_enable_hdmi_phy(); } static int detect_i2c(struct display_info_t const *dev) @@ -512,7 +499,7 @@ static struct display_info_t const displays[] = {{ .addr = 0, .pixfmt = IPU_PIX_FMT_RGB24, .detect = detect_hdmi, - .enable = enable_hdmi, + .enable = do_enable_hdmi, .mode = { .name = "HDMI", .refresh = 60, @@ -637,25 +624,15 @@ static void setup_display(void) struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; - struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; - int reg; + enable_ipu_clock(); + imx_setup_hdmi(); /* Turn on LDB0,IPU,IPU DI0 clocks */ reg = __raw_readl(&mxc_ccm->CCGR3); - reg |= MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET - |MXC_CCM_CCGR3_LDB_DI0_MASK; + reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; writel(reg, &mxc_ccm->CCGR3); - /* Turn on HDMI PHY clock */ - reg = __raw_readl(&mxc_ccm->CCGR2); - reg |= MXC_CCM_CCGR2_HDMI_TX_IAHBCLK_MASK - |MXC_CCM_CCGR2_HDMI_TX_ISFRCLK_MASK; - writel(reg, &mxc_ccm->CCGR2); - - /* clear HDMI PHY reset */ - writeb(HDMI_MC_PHYRSTZ_DEASSERT, &hdmi->mc_phyrstz); - /* set PFD1_FRAC to 0x13 == 455 MHz (480*18)/0x13 */ writel(ANATOP_PFD_480_PFD1_FRAC_MASK, &anatop->pfd_480_clr); writel(0x13<<ANATOP_PFD_480_PFD1_FRAC_SHIFT, &anatop->pfd_480_set); @@ -673,15 +650,8 @@ static void setup_display(void) writel(reg, &mxc_ccm->cscmr2); reg = readl(&mxc_ccm->chsccdr); - reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK - |MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK - |MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); reg |= (CHSCCDR_CLK_SEL_LDB_DI0 - <<MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET) - |(CHSCCDR_PODF_DIVIDE_BY_3 - <<MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) - |(CHSCCDR_IPU_PRE_CLK_540M_PFD - <<MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET); + <<MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); writel(reg, &mxc_ccm->chsccdr); reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |