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-rw-r--r--board/broadcom/bcmns3/Kconfig15
-rw-r--r--board/broadcom/bcmns3/Makefile5
-rw-r--r--board/broadcom/bcmns3/fit/keys/dev.crt21
-rw-r--r--board/broadcom/bcmns3/fit/keys/dev.key28
-rw-r--r--board/broadcom/bcmns3/fit/multi.its59
-rw-r--r--board/broadcom/bcmns3/ns3.c217
6 files changed, 345 insertions, 0 deletions
diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig
new file mode 100644
index 0000000000..8ce21f980d
--- /dev/null
+++ b/board/broadcom/bcmns3/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_BCMNS3
+
+config SYS_BOARD
+ default "bcmns3"
+
+config SYS_VENDOR
+ default "broadcom"
+
+config SYS_SOC
+ default "bcmns3"
+
+config SYS_CONFIG_NAME
+ default "bcm_ns3"
+
+endif
diff --git a/board/broadcom/bcmns3/Makefile b/board/broadcom/bcmns3/Makefile
new file mode 100644
index 0000000000..3404260148
--- /dev/null
+++ b/board/broadcom/bcmns3/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2020 Broadcom.
+
+obj-y := ns3.o
diff --git a/board/broadcom/bcmns3/fit/keys/dev.crt b/board/broadcom/bcmns3/fit/keys/dev.crt
new file mode 100644
index 0000000000..75b75db95c
--- /dev/null
+++ b/board/broadcom/bcmns3/fit/keys/dev.crt
@@ -0,0 +1,21 @@
+-----BEGIN CERTIFICATE-----
+MIIDXTCCAkWgAwIBAgIJAJgq/5aiJttEMA0GCSqGSIb3DQEBCwUAMEUxCzAJBgNV
+BAYTAkFVMRMwEQYDVQQIDApTb21lLVN0YXRlMSEwHwYDVQQKDBhJbnRlcm5ldCBX
+aWRnaXRzIFB0eSBMdGQwHhcNMTgwOTE5MDkzMzEwWhcNMTgxMDE5MDkzMzEwWjBF
+MQswCQYDVQQGEwJBVTETMBEGA1UECAwKU29tZS1TdGF0ZTEhMB8GA1UECgwYSW50
+ZXJuZXQgV2lkZ2l0cyBQdHkgTHRkMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIB
+CgKCAQEAzeMQ92YqrejtMCfxjDyHvDW34ATozXSlWsudR+AyCSuJVAIoHEenVh+/
+PuT0+/EMiwsUnLXYBeOsIXDW3k3eHgm88ccb+0g9J6mlHqMaN0tXP+Ua2GFEk2Wv
+5Bj5QynorOPoaWL/ecWus2Bvkmyt2pvIpaTjmkUKZ9al3z8WyS6wFlFitXyOWFcK
+7Xkl43cOHxYAfbny5loWYDCgpkV+dgYZOoCEmL+Y9HfrQ+uBKGducpzNKeQjX9bn
+UT9cleCtHZx0uY4wSGNgfmUMy7oUyVZhFpmjlcfjcfNFcBcoVF6StluoL6v1KRbH
+4xJDD/UCn2Uk0S6Zpd7TRc26faOtfwIDAQABo1AwTjAdBgNVHQ4EFgQUZk/KKaWG
+p4BtksPdQ8FLzWL/gAIwHwYDVR0jBBgwFoAUZk/KKaWGp4BtksPdQ8FLzWL/gAIw
+DAYDVR0TBAUwAwEB/zANBgkqhkiG9w0BAQsFAAOCAQEAPNveTvOC2bw91cUN1e+B
+95qFp2Xd5XGiV35F10dT3VN/Iv2dzHlThq7xaJGkA53lHIXgLUUfnDTHJmoluw+t
+UCpG8OWCxM0FbT8ZnXR4SmHK8k4yb7iZa7iu+Ey5B6F3247gJpEl+1iYxus0lqQW
+E9dTwMf1YP9Jdf+dRoLKAAI0n5J1PMuseQkGdlRBNUcEg+kXqBSz5hq0xkuPRtey
+GiAvpg3G93ft84Q4ov7IjAhJkY7whm6WktisU8mFPru3e9EouxjVtAvu6s9gQThm
+pvn6hSL2/3gEOP3v9yBsH6//SOgNdVBGZIdX+HkvD8NZLftbIrDaeL/IfKUm/zXB
+zA==
+-----END CERTIFICATE-----
diff --git a/board/broadcom/bcmns3/fit/keys/dev.key b/board/broadcom/bcmns3/fit/keys/dev.key
new file mode 100644
index 0000000000..55b7033e9f
--- /dev/null
+++ b/board/broadcom/bcmns3/fit/keys/dev.key
@@ -0,0 +1,28 @@
+-----BEGIN PRIVATE KEY-----
+MIIEvwIBADANBgkqhkiG9w0BAQEFAASCBKkwggSlAgEAAoIBAQDN4xD3Ziqt6O0w
+J/GMPIe8NbfgBOjNdKVay51H4DIJK4lUAigcR6dWH78+5PT78QyLCxSctdgF46wh
+cNbeTd4eCbzxxxv7SD0nqaUeoxo3S1c/5RrYYUSTZa/kGPlDKeis4+hpYv95xa6z
+YG+SbK3am8ilpOOaRQpn1qXfPxbJLrAWUWK1fI5YVwrteSXjdw4fFgB9ufLmWhZg
+MKCmRX52Bhk6gISYv5j0d+tD64EoZ25ynM0p5CNf1udRP1yV4K0dnHS5jjBIY2B+
+ZQzLuhTJVmEWmaOVx+Nx80VwFyhUXpK2W6gvq/UpFsfjEkMP9QKfZSTRLpml3tNF
+zbp9o61/AgMBAAECggEBAJ/TZClZk0ob5nyalWVS29/cJ5hs1zgfE/nu1HKmdNEv
+jdS8M9z4Nsuhq3msjQ1Da4RInsCkXUT9H3N6QCKkeggBcT6TXYJs6qRuijLFVKWW
+A+4i8PsGTxDJQIimZmGgF/KWnaWp5z7lmZ+//fzCBxgMFO+Zl+H7NH+1XmB2fj6/
+bfgnxLbiIqq/2oVJfdjA1Zs2ie3SE5U2hPNiE6TIajFS0PxUOGrojsSQ8z+gfqs3
+hyqo9msAqNQciT79vyXp+3HsxZo9rq5Tk5OtCEfgu0GED/d4/FHbDrZT3TorVYXr
+Z3dADxvnnJfBdlQIMetCy/X8z2vKRRXaoWpqg1aiFVECgYEA7Ap5D4nvOie2NXgI
+gMPzuYtpH4uF/cZMLGxTKZ3NG4RH6oVUdd4whETXfzBJdnJbIXDTphoHxjUhpGh8
+Ga+U1iqjp9c6Nd8ueVp/c5T1bD8/2RG0QM4iWgPbZDKtj1MqRg7vwAfpJ3kOIc/5
+bKJ4jAopNJMChL6vAZ9+ShPsRqkCgYEA30vbj6K7/giclJnyWkluQTqS8X/XjdAf
+F5PkCBHGJnYxkDSzWPq7O5E1wYqTAou1U6nNNoUvZZdpRvo39NSrMCaagQ7GE+xA
+j/h7tinD/lPlvoW9N4f4ddqWzsmf7I8OGZtP4IwVi9Pms+zPtrQ7TvuPT4UHTH2E
+eE1hlJtic+cCgYEA6oKdNGr+WvEJfqX7DLOiej2f+89LGI7jL1+QYFB/b09FhCNj
+fpd57G/ZCmyXEC8di2PlY6mI/8vZ2NZWNc7UONO0NRUIqG1MZxUae2MLUrikXq3Q
+QHKMfpJGbo5LEZK29VPxrwAtDSKgf8d5MA1bZwbRWYKVhf1NMnebqU2R+cECgYEA
+kOTKXhP85MR1xj928XtAnfcCLs8D8jOgWU5P46SU7ZQ4aRipYA2ivO5m8WWYK0i4
+qsc+MCiQLt3nJHVtJeNyCdai3yfVBEyDQGi+7d+AHGIYbF6f/46tfNwQi7JtobTa
+M2eCl3SO7qLbytjZl/avnXrC7Zimuc2gzed4cFO7uPUCgYAo66MLtRWLdHqPDTaa
+WhSQZkdKfZxlWNP6XIpBgHnYDIQGZddrjv+zZVFRxLCduh1v8xybbSDKwRkGuXVb
+eTQHP2Nc5XsOopCSsDP0v0dUxaOu14C0jJJG2E+EhJsWJ2Eua7o40LEIX2WY7N7f
+UqR3bLO5Qh/1OOwJj5WbpzkMwA==
+-----END PRIVATE KEY-----
diff --git a/board/broadcom/bcmns3/fit/multi.its b/board/broadcom/bcmns3/fit/multi.its
new file mode 100644
index 0000000000..a0ff4bc908
--- /dev/null
+++ b/board/broadcom/bcmns3/fit/multi.its
@@ -0,0 +1,59 @@
+/*
+ * U-Boot uImage source file with multiple kernels, ramdisks and FDT blobs
+ */
+
+/dts-v1/;
+
+/ {
+ description = "Various kernels, ramdisks and FDT blobs";
+ #address-cells = <1>;
+
+ images {
+ kernel {
+ description = "Linux kernel Image";
+ data = /incbin/("./Image");
+ type = "kernel";
+ arch = "arm64";
+ os = "linux";
+ compression = "none";
+ load = <0x80080000>;
+ entry = <0x80080000>;
+ hash-1 {
+ algo = "sha1";
+ };
+ signature {
+ algo = "sha1,rsa2048";
+ key-name-hint = "dev";
+ };
+ };
+
+ fdt-ns3 {
+ description = "FDT Blob";
+ data = /incbin/("./dt-blob.bin");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ hash-1 {
+ algo = "sha1";
+ };
+ signature {
+ algo = "sha1,rsa2048";
+ key-name-hint = "dev";
+ };
+ };
+ };
+
+ configurations {
+ default = "config-ns3";
+ config-ns3 {
+ description = "FIT1 configuration";
+ kernel = "kernel";
+ fdt = "fdt-ns3";
+ signature {
+ algo = "sha1,rsa2048";
+ key-name-hint = "dev";
+ sign-images = "fdt", "kernel";
+ };
+ };
+ };
+};
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
new file mode 100644
index 0000000000..0357cd0e32
--- /dev/null
+++ b/board/broadcom/bcmns3/ns3.c
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom.
+ *
+ */
+
+#include <common.h>
+#include <fdt_support.h>
+#include <asm/io.h>
+#include <asm/gic-v3.h>
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+#include <asm/arch-bcmns3/bl33_info.h>
+#include <dt-bindings/memory/bcm-ns3-mc.h>
+
+/* Default reset-level = 3 and strap-val = 0 */
+#define L3_RESET 30
+
+#define BANK_OFFSET(bank) ((u64)BCM_NS3_DDR_INFO_BASE + 8 + ((bank) * 16))
+
+/*
+ * ns3_dram_bank - DDR bank details
+ *
+ * @start: DDR bank start address
+ * @len: DDR bank length
+ */
+struct ns3_dram_bank {
+ u64 start[BCM_NS3_MAX_NR_BANKS];
+ u64 len[BCM_NS3_MAX_NR_BANKS];
+};
+
+/*
+ * ns3_dram_hdr - DDR header info
+ *
+ * @sig: DDR info signature
+ * @bank: DDR bank details
+ */
+struct ns3_dram_hdr {
+ u32 sig;
+ struct ns3_dram_bank bank;
+};
+
+static struct mm_region ns3_mem_map[] = {
+ {
+ .virt = 0x0UL,
+ .phys = 0x0UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = BCM_NS3_MEM_START,
+ .phys = BCM_NS3_MEM_START,
+ .size = BCM_NS3_MEM_LEN,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ .virt = BCM_NS3_BANK_1_MEM_START,
+ .phys = BCM_NS3_BANK_1_MEM_START,
+ .size = BCM_NS3_BANK_1_MEM_LEN,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = ns3_mem_map;
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Force the bl33_info to the data-section, as .bss will not be valid
+ * when save_boot_params is invoked.
+ */
+struct bl33_info *bl33_info __section(".data");
+
+/*
+ * Run modulo 256 checksum calculation and return the calculated checksum
+ */
+static u8 checksum_calc(u8 *p, unsigned int len)
+{
+ unsigned int i;
+ u8 chksum = 0;
+
+ for (i = 0; i < len; i++)
+ chksum += p[i];
+
+ return chksum;
+}
+
+/*
+ * This function parses the memory layout information from a reserved area in
+ * DDR, and then fix up the FDT before passing it to Linux.
+ *
+ * In the case of error, do nothing and the default memory layout in DT will
+ * be used
+ */
+static int mem_info_parse_fixup(void *fdt)
+{
+ struct ns3_dram_hdr hdr;
+ u32 *p32, i, nr_banks;
+ u64 *p64;
+
+ /* validate signature */
+ p32 = (u32 *)BCM_NS3_DDR_INFO_BASE;
+ hdr.sig = *p32;
+ if (hdr.sig != BCM_NS3_DDR_INFO_SIG) {
+ printf("DDR info signature 0x%x invalid\n", hdr.sig);
+ return -EINVAL;
+ }
+
+ /* run checksum test to validate data */
+ if (checksum_calc((u8 *)p32, BCM_NS3_DDR_INFO_LEN) != 0) {
+ printf("Checksum on DDR info failed\n");
+ return -EINVAL;
+ }
+
+ /* parse information for each bank */
+ nr_banks = 0;
+ for (i = 0; i < BCM_NS3_MAX_NR_BANKS; i++) {
+ /* skip banks with a length of zero */
+ p64 = (u64 *)BANK_OFFSET(i);
+ if (*(p64 + 1) == 0)
+ continue;
+
+ hdr.bank.start[i] = *p64;
+ hdr.bank.len[i] = *(p64 + 1);
+
+ printf("mem[%u] 0x%llx - 0x%llx\n", i, hdr.bank.start[i],
+ hdr.bank.start[i] + hdr.bank.len[i] - 1);
+ nr_banks++;
+ }
+
+ if (!nr_banks) {
+ printf("No DDR banks detected\n");
+ return -ENOMEM;
+ }
+
+ return fdt_fixup_memory_banks(fdt, hdr.bank.start, hdr.bank.len,
+ nr_banks);
+}
+
+int board_init(void)
+{
+ /* Setup memory using "memory" node from DTB */
+ if (fdtdec_setup_mem_size_base() != 0)
+ return -EINVAL;
+ fdtdec_setup_memory_banksize();
+
+ if (bl33_info->version != BL33_INFO_VERSION)
+ printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ /*
+ * Mark ram base as the last 16MB of 2GB DDR, which is 0xFF00_0000.
+ * So that relocation happens with in the last 16MB memory.
+ */
+ gd->ram_base = (phys_size_t)(BCM_NS3_MEM_END - SZ_16M);
+ gd->ram_size = (unsigned long)SZ_16M;
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = (BCM_NS3_MEM_END - SZ_16M);
+ gd->bd->bi_dram[0].size = SZ_16M;
+
+ return 0;
+}
+
+/* Limit RAM used by U-Boot to the DDR first bank End region */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ return BCM_NS3_MEM_END;
+}
+
+void reset_cpu(ulong level)
+{
+ u32 reset_level, strap_val;
+
+ /* Default reset type is L3 reset */
+ if (!level) {
+ /*
+ * Encoding: U-Boot reset command expects decimal argument,
+ * Boot strap val: Bits[3:0]
+ * reset level: Bits[7:4]
+ */
+ strap_val = L3_RESET % 10;
+ level = L3_RESET / 10;
+ reset_level = level % 10;
+ psci_system_reset2(reset_level, strap_val);
+ } else {
+ /* U-Boot cmd "reset" with any arg will trigger L1 reset */
+ psci_system_reset();
+ }
+}
+
+#ifdef CONFIG_OF_BOARD_SETUP
+int ft_board_setup(void *fdt, struct bd_info *bd)
+{
+ gic_lpi_tables_init();
+
+ return mem_info_parse_fixup(fdt);
+}
+#endif /* CONFIG_OF_BOARD_SETUP */