summaryrefslogtreecommitdiff
path: root/board/compulab
diff options
context:
space:
mode:
Diffstat (limited to 'board/compulab')
-rw-r--r--board/compulab/cm_t35/Kconfig12
-rw-r--r--board/compulab/cm_t35/MAINTAINERS6
-rw-r--r--board/compulab/cm_t35/Makefile8
-rw-r--r--board/compulab/cm_t35/cm_t35.c513
-rw-r--r--board/compulab/cm_t54/Kconfig12
-rw-r--r--board/compulab/cm_t54/MAINTAINERS6
-rw-r--r--board/compulab/cm_t54/Makefile8
-rw-r--r--board/compulab/cm_t54/cm_t54.c261
-rw-r--r--board/compulab/cm_t54/mux.c94
-rw-r--r--board/compulab/cm_t54/spl.c65
10 files changed, 0 insertions, 985 deletions
diff --git a/board/compulab/cm_t35/Kconfig b/board/compulab/cm_t35/Kconfig
deleted file mode 100644
index d87741f146..0000000000
--- a/board/compulab/cm_t35/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_CM_T35
-
-config SYS_BOARD
- default "cm_t35"
-
-config SYS_VENDOR
- default "compulab"
-
-config SYS_CONFIG_NAME
- default "cm_t35"
-
-endif
diff --git a/board/compulab/cm_t35/MAINTAINERS b/board/compulab/cm_t35/MAINTAINERS
deleted file mode 100644
index fc5d73f04c..0000000000
--- a/board/compulab/cm_t35/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CM_T35 BOARD
-M: Igor Grinberg <grinberg@compulab.co.il>
-S: Maintained
-F: board/compulab/cm_t35/
-F: include/configs/cm_t35.h
-F: configs/cm_t35_defconfig
diff --git a/board/compulab/cm_t35/Makefile b/board/compulab/cm_t35/Makefile
deleted file mode 100644
index 929c53c144..0000000000
--- a/board/compulab/cm_t35/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2011 - 2013 CompuLab, Ltd. <www.compulab.co.il>
-#
-# Authors: Nikita Kiryanov <nikita@compulab.co.il>
-# Igor Grinberg <grinberg@compulab.co.il>
-
-obj-y += cm_t35.o
diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c
deleted file mode 100644
index 4b67df4f1a..0000000000
--- a/board/compulab/cm_t35/cm_t35.c
+++ /dev/null
@@ -1,513 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2011 - 2013 CompuLab, Ltd. <www.compulab.co.il>
- *
- * Authors: Mike Rapoport <mike@compulab.co.il>
- * Igor Grinberg <grinberg@compulab.co.il>
- *
- * Derived from omap3evm and Beagle Board by
- * Manikandan Pillai <mani.pillai@ti.com>
- * Richard Woodruff <r-woodruff2@ti.com>
- * Syed Mohammed Khasim <x0khasim@ti.com>
- */
-
-#include <common.h>
-#include <env.h>
-#include <init.h>
-#include <status_led.h>
-#include <netdev.h>
-#include <net.h>
-#include <i2c.h>
-#include <usb.h>
-#include <mmc.h>
-#include <splash.h>
-#include <twl4030.h>
-#include <linux/compiler.h>
-#include <linux/delay.h>
-
-#include <asm/io.h>
-#include <linux/errno.h>
-#include <asm/arch/mem.h>
-#include <asm/arch/mux.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/mach-types.h>
-#include <asm/ehci-omap.h>
-#include <asm/gpio.h>
-
-#include "../common/common.h"
-#include "../common/eeprom.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const omap3_sysinfo sysinfo = {
- DDR_DISCRETE,
- "CM-T3x board",
- "NAND",
-};
-
-#ifdef CONFIG_SPL_BUILD
-/*
- * Routine: get_board_mem_timings
- * Description: If we use SPL then there is no x-loader nor config header
- * so we have to setup the DDR timings ourself on both banks.
- */
-void get_board_mem_timings(struct board_sdrc_timings *timings)
-{
- timings->mr = MICRON_V_MR_165;
- timings->mcfg = MICRON_V_MCFG_200(256 << 20); /* raswidth 14 needed */
- timings->ctrla = MICRON_V_ACTIMA_165;
- timings->ctrlb = MICRON_V_ACTIMB_165;
- timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
-}
-#endif
-
-struct splash_location splash_locations[] = {
- {
- .name = "nand",
- .storage = SPLASH_STORAGE_NAND,
- .flags = SPLASH_STORAGE_RAW,
- .offset = 0x100000,
- },
-};
-
-int splash_screen_prepare(void)
-{
- return splash_source_load(splash_locations,
- ARRAY_SIZE(splash_locations));
-}
-
-/*
- * Routine: board_init
- * Description: hardware init.
- */
-int board_init(void)
-{
- gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
-
- /* board id for Linux */
- if (get_cpu_family() == CPU_OMAP34XX)
- gd->bd->bi_arch_number = MACH_TYPE_CM_T35;
- else
- gd->bd->bi_arch_number = MACH_TYPE_CM_T3730;
-
- /* boot param addr */
- gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
-
-#if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE)
- status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON);
-#endif
-
- return 0;
-}
-
-/*
- * Routine: get_board_rev
- * Description: read system revision
- */
-u32 get_board_rev(void)
-{
- return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
-};
-
-int misc_init_r(void)
-{
- cl_print_pcb_info();
- omap_die_id_display();
-
- return 0;
-}
-
-/*
- * Routine: set_muxconf_regs
- * Description: Setting up the configuration Mux registers specific to the
- * hardware. Many pins need to be moved from protect to primary
- * mode.
- */
-static void cm_t3x_set_common_muxconf(void)
-{
- /* SDRC */
- MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)); /*SDRC_D0*/
- MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)); /*SDRC_D1*/
- MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)); /*SDRC_D2*/
- MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)); /*SDRC_D3*/
- MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)); /*SDRC_D4*/
- MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)); /*SDRC_D5*/
- MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)); /*SDRC_D6*/
- MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)); /*SDRC_D7*/
- MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)); /*SDRC_D8*/
- MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)); /*SDRC_D9*/
- MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)); /*SDRC_D10*/
- MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)); /*SDRC_D11*/
- MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)); /*SDRC_D12*/
- MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)); /*SDRC_D13*/
- MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)); /*SDRC_D14*/
- MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)); /*SDRC_D15*/
- MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)); /*SDRC_D16*/
- MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)); /*SDRC_D17*/
- MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)); /*SDRC_D18*/
- MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)); /*SDRC_D19*/
- MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)); /*SDRC_D20*/
- MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)); /*SDRC_D21*/
- MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)); /*SDRC_D22*/
- MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)); /*SDRC_D23*/
- MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)); /*SDRC_D24*/
- MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)); /*SDRC_D25*/
- MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)); /*SDRC_D26*/
- MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)); /*SDRC_D27*/
- MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)); /*SDRC_D28*/
- MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)); /*SDRC_D29*/
- MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)); /*SDRC_D30*/
- MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)); /*SDRC_D31*/
- MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)); /*SDRC_CLK*/
- MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)); /*SDRC_DQS0*/
- MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)); /*SDRC_DQS1*/
- MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)); /*SDRC_DQS2*/
- MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)); /*SDRC_DQS3*/
- MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); /*SDRC_CKE0*/
- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)); /*SDRC_CKE1*/
-
- /* GPMC */
- MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); /*GPMC_A1*/
- MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); /*GPMC_A2*/
- MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); /*GPMC_A3*/
- MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); /*GPMC_A4*/
- MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); /*GPMC_A5*/
- MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); /*GPMC_A6*/
- MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); /*GPMC_A7*/
- MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); /*GPMC_A8*/
- MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); /*GPMC_A9*/
- MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); /*GPMC_A10*/
- MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); /*GPMC_D0*/
- MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); /*GPMC_D1*/
- MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); /*GPMC_D2*/
- MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); /*GPMC_D3*/
- MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); /*GPMC_D4*/
- MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); /*GPMC_D5*/
- MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); /*GPMC_D6*/
- MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); /*GPMC_D7*/
- MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); /*GPMC_D8*/
- MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); /*GPMC_D9*/
- MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); /*GPMC_D10*/
- MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); /*GPMC_D11*/
- MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); /*GPMC_D12*/
- MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); /*GPMC_D13*/
- MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); /*GPMC_D14*/
- MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); /*GPMC_D15*/
- MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); /*GPMC_nCS0*/
-
- /* SB-T35 Ethernet */
- MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); /*GPMC_nCS4*/
-
- /* DVI enable */
- MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | DIS | M4));/*GPMC_nCS3*/
-
- /* DataImage backlight */
- MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | DIS | M4));/*GPIO_58*/
-
- /* CM-T3x Ethernet */
- MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M0)); /*GPMC_nCS5*/
- MUX_VAL(CP(GPMC_CLK), (IEN | PTD | DIS | M4)); /*GPIO_59*/
- MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)); /*nADV_ALE*/
- MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)); /*nOE*/
- MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)); /*nWE*/
- MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); /*nBE0_CLE*/
- MUX_VAL(CP(GPMC_NBE1), (IDIS | PTD | DIS | M4)); /*GPIO_61*/
- MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)); /*nWP*/
- MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)); /*WAIT0*/
-
- /* DSS */
- MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)); /*DSS_PCLK*/
- MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)); /*DSS_HSYNC*/
- MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)); /*DSS_VSYNC*/
- MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)); /*DSS_ACBIAS*/
- MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)); /*DSS_DATA6*/
- MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)); /*DSS_DATA7*/
- MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)); /*DSS_DATA8*/
- MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)); /*DSS_DATA9*/
- MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)); /*DSS_DATA10*/
- MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)); /*DSS_DATA11*/
- MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)); /*DSS_DATA12*/
- MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)); /*DSS_DATA13*/
- MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)); /*DSS_DATA14*/
- MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)); /*DSS_DATA15*/
- MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)); /*DSS_DATA16*/
- MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)); /*DSS_DATA17*/
-
- /* serial interface */
- MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)); /*UART3_RX*/
- MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)); /*UART3_TX*/
-
- /* mUSB */
- MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)); /*HSUSB0_CLK*/
- MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)); /*HSUSB0_STP*/
- MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)); /*HSUSB0_DIR*/
- MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)); /*HSUSB0_NXT*/
- MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA0*/
- MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA1*/
- MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA2*/
- MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA3*/
- MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA4*/
- MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA5*/
- MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA6*/
- MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)); /*HSUSB0_DATA7*/
-
- /* USB EHCI */
- MUX_VAL(CP(ETK_D0_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT0*/
- MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT1*/
- MUX_VAL(CP(ETK_D2_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT2*/
- MUX_VAL(CP(ETK_D7_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT3*/
- MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT4*/
- MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT5*/
- MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT6*/
- MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT7*/
- MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DIR*/
- MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_NXT*/
- MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)); /*HSUSB1_CLK*/
- MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | DIS | M3)); /*HSUSB1_STP*/
-
- MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DT0*/
- MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DT1*/
- MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)); /*HSUSB2_DT2*/
- MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)); /*HSUSB2_DT3*/
- MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)); /*HSUSB2_DT4*/
- MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)); /*HSUSB2_DT5*/
- MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)); /*HSUSB2_DT6*/
- MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)); /*HSUSB2_DT7*/
- MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DIR*/
- MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_NXT*/
- MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)); /*HSUSB2_CLK*/
- MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | DIS | M3)); /*HSUSB2_STP*/
-
- /* SB_T35_USB_HUB_RESET_GPIO */
- MUX_VAL(CP(CAM_WEN), (IDIS | PTD | DIS | M4)); /*GPIO_167*/
-
- /* I2C1 */
- MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)); /*I2C1_SCL*/
- MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)); /*I2C1_SDA*/
- /* I2C2 */
- MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); /*I2C2_SCL*/
- MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); /*I2C2_SDA*/
- /* I2C3 */
- MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); /*I2C3_SCL*/
- MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); /*I2C3_SDA*/
-
- /* control and debug */
- MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)); /*SYS_32K*/
- MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)); /*SYS_CLKREQ*/
- MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); /*SYS_nIRQ*/
- MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); /*OFF_MODE*/
- MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); /*CLKOUT1*/
- MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTU | DIS | M4)); /*green LED*/
- MUX_VAL(CP(JTAG_NTRST), (IEN | PTD | DIS | M0)); /*JTAG_NTRST*/
- MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)); /*JTAG_TCK*/
- MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)); /*JTAG_TMS*/
- MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)); /*JTAG_TDI*/
-
- /* MMC1 */
- MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); /*MMC1_CLK*/
- MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); /*MMC1_CMD*/
- MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); /*MMC1_DAT0*/
- MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); /*MMC1_DAT1*/
- MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); /*MMC1_DAT2*/
- MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); /*MMC1_DAT3*/
-
- /* SPI */
- MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M1)); /*MCSPI4_CLK*/
- MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M1)); /*MCSPI4_SIMO*/
- MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M1)); /*MCSPI4_SOMI*/
- MUX_VAL(CP(MCBSP1_FSX), (IEN | PTU | EN | M1)); /*MCSPI4_CS0*/
-
- /* display controls */
- MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | DIS | M4)); /*GPIO_157*/
-}
-
-static void cm_t35_set_muxconf(void)
-{
- /* DSS */
- MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)); /*DSS_DATA0*/
- MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)); /*DSS_DATA1*/
- MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)); /*DSS_DATA2*/
- MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)); /*DSS_DATA3*/
- MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)); /*DSS_DATA4*/
- MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)); /*DSS_DATA5*/
-
- MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)); /*DSS_DATA18*/
- MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)); /*DSS_DATA19*/
- MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)); /*DSS_DATA20*/
- MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)); /*DSS_DATA21*/
- MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)); /*DSS_DATA22*/
- MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)); /*DSS_DATA23*/
-
- /* MMC1 */
- MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M0)); /*MMC1_DAT4*/
- MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M0)); /*MMC1_DAT5*/
- MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M0)); /*MMC1_DAT6*/
- MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M0)); /*MMC1_DAT7*/
-}
-
-static void cm_t3730_set_muxconf(void)
-{
- /* DSS */
- MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M3)); /*DSS_DATA0*/
- MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M3)); /*DSS_DATA1*/
- MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M3)); /*DSS_DATA2*/
- MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M3)); /*DSS_DATA3*/
- MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M3)); /*DSS_DATA4*/
- MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M3)); /*DSS_DATA5*/
-
- MUX_VAL(CP(SYS_BOOT0), (IDIS | PTD | DIS | M3)); /*DSS_DATA18*/
- MUX_VAL(CP(SYS_BOOT1), (IDIS | PTD | DIS | M3)); /*DSS_DATA19*/
- MUX_VAL(CP(SYS_BOOT3), (IDIS | PTD | DIS | M3)); /*DSS_DATA20*/
- MUX_VAL(CP(SYS_BOOT4), (IDIS | PTD | DIS | M3)); /*DSS_DATA21*/
- MUX_VAL(CP(SYS_BOOT5), (IDIS | PTD | DIS | M3)); /*DSS_DATA22*/
- MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)); /*DSS_DATA23*/
-}
-
-void set_muxconf_regs(void)
-{
- cm_t3x_set_common_muxconf();
-
- if (get_cpu_family() == CPU_OMAP34XX)
- cm_t35_set_muxconf();
- else
- cm_t3730_set_muxconf();
-}
-
-#if defined(CONFIG_MMC)
-#define SB_T35_WP_GPIO 59
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- u8 val;
-
- if (twl4030_i2c_read_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO, &val))
- return -1;
-
- return !(val & 1);
-}
-
-int board_mmc_init(bd_t *bis)
-{
- return omap_mmc_init(0, 0, 0, -1, SB_T35_WP_GPIO);
-}
-#endif
-
-#if defined(CONFIG_MMC)
-void board_mmc_power_init(void)
-{
- twl4030_power_mmc_init(0);
-}
-#endif
-
-#ifdef CONFIG_SYS_I2C_OMAP24XX
-/*
- * Routine: reset_net_chip
- * Description: reset the Ethernet controller via TPS65930 GPIO
- */
-static int cm_t3x_reset_net_chip(int gpio)
-{
- /* Set GPIO1 of TPS65930 as output */
- twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x03,
- 0x02);
- /* Send a pulse on the GPIO pin */
- twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x0C,
- 0x02);
- udelay(1);
- twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x09,
- 0x02);
- mdelay(40);
- twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x0C,
- 0x02);
- mdelay(1);
- return 0;
-}
-#else
-static inline int cm_t3x_reset_net_chip(int gpio) { return 0; }
-#endif
-
-#ifdef CONFIG_SMC911X
-/*
- * Routine: handle_mac_address
- * Description: prepare MAC address for on-board Ethernet.
- */
-static int handle_mac_address(void)
-{
- unsigned char enetaddr[6];
- int rc;
-
- rc = eth_env_get_enetaddr("ethaddr", enetaddr);
- if (rc)
- return 0;
-
- rc = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS);
- if (rc)
- return rc;
-
- if (!is_valid_ethaddr(enetaddr))
- return -1;
-
- return eth_env_set_enetaddr("ethaddr", enetaddr);
-}
-
-/*
- * Routine: board_eth_init
- * Description: initialize module and base-board Ethernet chips
- */
-#define SB_T35_SMC911X_BASE (CONFIG_SMC911X_BASE + SZ_16M)
-int board_eth_init(bd_t *bis)
-{
- int rc = 0, rc1 = 0;
-
- rc1 = handle_mac_address();
- if (rc1)
- printf("No MAC address found! ");
-
- rc1 = cl_omap3_smc911x_init(0, 5, CONFIG_SMC911X_BASE,
- cm_t3x_reset_net_chip, -EINVAL);
- if (rc1 > 0)
- rc++;
-
- rc1 = cl_omap3_smc911x_init(1, 4, SB_T35_SMC911X_BASE, NULL, -EINVAL);
- if (rc1 > 0)
- rc++;
-
- return rc;
-}
-#endif
-
-#ifdef CONFIG_USB_EHCI_OMAP
-struct omap_usbhs_board_data usbhs_bdata = {
- .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
- .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
- .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
-};
-
-#define SB_T35_USB_HUB_RESET_GPIO 167
-int ehci_hcd_init(int index, enum usb_init_type init,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
- u8 val;
- int offset;
-
- cl_usb_hub_init(SB_T35_USB_HUB_RESET_GPIO, "sb-t35 hub rst");
-
- offset = TWL4030_BASEADD_GPIO + TWL4030_GPIO_GPIODATADIR1;
- twl4030_i2c_read_u8(TWL4030_CHIP_GPIO, offset, &val);
- /* Set GPIO6 and GPIO7 of TPS65930 as output */
- val |= 0xC0;
- twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, offset, val);
- offset = TWL4030_BASEADD_GPIO + TWL4030_GPIO_SETGPIODATAOUT1;
- /* Take both PHYs out of reset */
- twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, offset, 0xC0);
- udelay(1);
-
- return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
-}
-
-int ehci_hcd_stop(void)
-{
- cl_usb_hub_deinit(SB_T35_USB_HUB_RESET_GPIO);
- return omap_ehci_hcd_stop();
-}
-#endif /* CONFIG_USB_EHCI_OMAP */
diff --git a/board/compulab/cm_t54/Kconfig b/board/compulab/cm_t54/Kconfig
deleted file mode 100644
index 52d38804df..0000000000
--- a/board/compulab/cm_t54/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_CM_T54
-
-config SYS_BOARD
- default "cm_t54"
-
-config SYS_VENDOR
- default "compulab"
-
-config SYS_CONFIG_NAME
- default "cm_t54"
-
-endif
diff --git a/board/compulab/cm_t54/MAINTAINERS b/board/compulab/cm_t54/MAINTAINERS
deleted file mode 100644
index 461fe098c0..0000000000
--- a/board/compulab/cm_t54/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CM_T54 BOARD
-M: Dmitry Lifshitz <lifshitz@compulab.co.il>
-S: Maintained
-F: board/compulab/cm_t54/
-F: include/configs/cm_t54.h
-F: configs/cm_t54_defconfig
diff --git a/board/compulab/cm_t54/Makefile b/board/compulab/cm_t54/Makefile
deleted file mode 100644
index a907074414..0000000000
--- a/board/compulab/cm_t54/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2014 Compulab Ltd - http://compulab.co.il/
-#
-# Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
-
-obj-y += cm_t54.o
-obj-$(CONFIG_SPL_BUILD) += mux.o spl.o
diff --git a/board/compulab/cm_t54/cm_t54.c b/board/compulab/cm_t54/cm_t54.c
deleted file mode 100644
index 413f3c9c8f..0000000000
--- a/board/compulab/cm_t54/cm_t54.c
+++ /dev/null
@@ -1,261 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Board functions for Compulab CM-T54 board
- *
- * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-
-#include <common.h>
-#include <env.h>
-#include <fdt_support.h>
-#include <net.h>
-#include <usb.h>
-#include <mmc.h>
-#include <palmas.h>
-#include <spl.h>
-#include <linux/delay.h>
-
-#include <asm/gpio.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/ehci.h>
-#include <asm/ehci-omap.h>
-
-#include "../common/eeprom.h"
-
-#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
-#define DIE_ID_REG_OFFSET 0x200
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if !defined(CONFIG_SPL_BUILD)
-inline void set_muxconf_regs(void){};
-#endif
-
-const struct omap_sysinfo sysinfo = {
- "Board: CM-T54\n"
-};
-
-/*
- * Routine: board_init
- * Description: hardware init.
- */
-int board_init(void)
-{
- gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
-
- return 0;
-}
-
-/*
- * Routine: cm_t54_palmas_regulator_set
- * Description: select voltage and turn on/off Palmas PMIC regulator.
- */
-static int cm_t54_palmas_regulator_set(u8 vreg, u8 vval, u8 creg, u8 cval)
-{
- int err;
-
- /* Setup voltage */
- err = palmas_i2c_write_u8(TWL603X_CHIP_P1, vreg, vval);
- if (err) {
- printf("cm_t54: could not set regulator 0x%02x voltage : %d\n",
- vreg, err);
- return err;
- }
-
- /* Turn on/off regulator */
- err = palmas_i2c_write_u8(TWL603X_CHIP_P1, creg, cval);
- if (err) {
- printf("cm_t54: could not turn on/off regulator 0x%02x : %d\n",
- creg, err);
- return err;
- }
-
- return 0;
-}
-
-/*
- * Routine: mmc_get_env_part
- * Description: setup environment storage device partition.
- */
-#ifdef CONFIG_SYS_MMC_ENV_PART
-uint mmc_get_env_part(struct mmc *mmc)
-{
- u32 bootmode = gd->arch.omap_boot_mode;
- uint bootpart = CONFIG_SYS_MMC_ENV_PART;
-
- /*
- * If booted from eMMC boot partition then force eMMC
- * FIRST boot partition to be env storage
- */
- if (bootmode == BOOT_DEVICE_MMC2)
- bootpart = 1;
-
- return bootpart;
-}
-#endif
-
-#if defined(CONFIG_MMC)
-#define SB_T54_CD_GPIO 228
-#define SB_T54_WP_GPIO 229
-
-int board_mmc_init(bd_t *bis)
-{
- int ret0, ret1;
-
- ret0 = omap_mmc_init(0, 0, 0, SB_T54_CD_GPIO, SB_T54_WP_GPIO);
- if (ret0)
- printf("cm_t54: failed to initialize mmc0\n");
-
- ret1 = omap_mmc_init(1, 0, 0, -1, -1);
- if (ret1)
- printf("cm_t54: failed to initialize mmc1\n");
-
- if (ret0 && ret1)
- return -1;
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_USB_HOST_ETHER
-
-int ft_board_setup(void *blob, bd_t *bd)
-{
- uint8_t enetaddr[6];
-
- /* MAC addr */
- if (eth_env_get_enetaddr("usbethaddr", enetaddr)) {
- fdt_find_and_setprop(blob, "/smsc95xx@0", "mac-address",
- enetaddr, 6, 1);
- }
-
- return 0;
-}
-
-static void generate_mac_addr(uint8_t *enetaddr)
-{
- int reg;
-
- reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
-
- /*
- * create a fake MAC address from the processor ID code.
- * first byte is 0x02 to signify locally administered.
- */
- enetaddr[0] = 0x02;
- enetaddr[1] = readl(reg + 0x10) & 0xff;
- enetaddr[2] = readl(reg + 0xC) & 0xff;
- enetaddr[3] = readl(reg + 0x8) & 0xff;
- enetaddr[4] = readl(reg) & 0xff;
- enetaddr[5] = (readl(reg) >> 8) & 0xff;
-}
-
-/*
- * Routine: handle_mac_address
- * Description: prepare MAC address for on-board Ethernet.
- */
-static int handle_mac_address(void)
-{
- uint8_t enetaddr[6];
- int ret;
-
- ret = eth_env_get_enetaddr("usbethaddr", enetaddr);
- if (ret)
- return 0;
-
- ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS);
- if (ret || !is_valid_ethaddr(enetaddr))
- generate_mac_addr(enetaddr);
-
- if (!is_valid_ethaddr(enetaddr))
- return -1;
-
- return eth_env_set_enetaddr("usbethaddr", enetaddr);
-}
-
-int board_eth_init(bd_t *bis)
-{
- return handle_mac_address();
-}
-#endif
-
-#ifdef CONFIG_USB_EHCI_HCD
-static struct omap_usbhs_board_data usbhs_bdata = {
- .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
- .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
- .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
-};
-
-static void setup_host_clocks(bool enable)
-{
- int usbhost_clk = OPTFCLKEN_HSIC60M_P3_CLK |
- OPTFCLKEN_HSIC480M_P3_CLK |
- OPTFCLKEN_HSIC60M_P2_CLK |
- OPTFCLKEN_HSIC480M_P2_CLK |
- OPTFCLKEN_UTMI_P3_CLK |
- OPTFCLKEN_UTMI_P2_CLK;
-
- int usbtll_clk = OPTFCLKEN_USB_CH1_CLK_ENABLE |
- OPTFCLKEN_USB_CH2_CLK_ENABLE;
-
- int usbhub_clk = CKOBUFFER_CLK_ENABLE_MASK;
-
- if (enable) {
- /* Enable port 2 and 3 clocks*/
- setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk);
- /* Enable port 2 and 3 usb host ports tll clocks*/
- setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk);
- /* Request FREF_XTAL_CLK clock for HSIC USB Hub */
- setbits_le32((*ctrl)->control_ckobuffer, usbhub_clk);
- } else {
- clrbits_le32((*ctrl)->control_ckobuffer, usbhub_clk);
- clrbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk);
- clrbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk);
- }
-}
-
-int ehci_hcd_init(int index, enum usb_init_type init,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
- int ret;
-
- /* VCC_3V3_ETH */
- cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_3V3, SMPS9_CTRL,
- SMPS_MODE_SLP_AUTO | SMPS_MODE_ACT_AUTO);
-
- setup_host_clocks(true);
-
- ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
- if (ret < 0)
- printf("cm_t54: Failed to initialize ehci : %d\n", ret);
-
- return ret;
-}
-
-int ehci_hcd_stop(void)
-{
- int ret = omap_ehci_hcd_stop();
-
- setup_host_clocks(false);
-
- cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_OFF,
- SMPS9_CTRL, SMPS_MODE_SLP_AUTO);
-
- return ret;
-}
-
-void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
-{
- /* The LAN9730 needs to be reset after the port power has been set. */
- if (port == 3) {
- gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
- udelay(10);
- gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
- }
-}
-#endif
-
diff --git a/board/compulab/cm_t54/mux.c b/board/compulab/cm_t54/mux.c
deleted file mode 100644
index ea90bc6e34..0000000000
--- a/board/compulab/cm_t54/mux.c
+++ /dev/null
@@ -1,94 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Pinmux configuration for Compulab CM-T54 board
- *
- * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-
-#ifndef _CM_T54_MUX_DATA_H
-#define _CM_T54_MUX_DATA_H
-
-#include <common.h>
-#include <asm/arch/mux_omap5.h>
-#include <asm/arch/sys_proto.h>
-
-const struct pad_conf_entry core_padconf_array_essential[] = {
- /* MMC1 - SD CARD */
- {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */
- {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */
- {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0 */
- {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1 */
- {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2 */
- {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3 */
-
- /* SD CARD CD and WP GPIOs*/
- {TIMER5_PWM_EVT, (PTU | IEN | M6)}, /* GPIO8_228 */
- {TIMER6_PWM_EVT, (PTU | IEN | M6)}, /* GPIO8_229 */
-
- /* MMC2 - eMMC */
- {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */
- {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */
- {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */
- {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */
- {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */
- {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */
- {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */
- {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */
- {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */
- {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */
-
- /* UART4 */
- {I2C5_SCL, (PTU | IEN | M2)}, /* UART4_RX */
- {I2C5_SDA, (M2)}, /* UART4_TX */
-
- /* Led */
- {HSI2_CAFLAG, (PTU | M6)}, /* GPIO3_80 */
-
- /* I2C1 */
- {I2C1_PMIC_SCL, (PTU | IEN | M0)}, /* I2C1_PMIC_SCL */
- {I2C1_PMIC_SDA, (PTU | IEN | M0)}, /* I2C1_PMIC_SDA */
-
- /* USBB2, USBB3 */
- {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */
- {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */
- {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE */
- {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */
-
- /* USB Hub and USB Eth reset GPIOs */
- {HSI2_CAREADY, (PTD | M6)}, /* GPIO3_76 */
- {HSI2_ACDATA, (PTD | M6)}, /* GPIO3_83 */
-
- /* I2C4 */
- {I2C4_SCL, (PTU | IEN | M0)}, /* I2C4_SCL */
- {I2C4_SDA, (PTU | IEN | M0)}, /* I2C4_SDA */
-};
-
-const struct pad_conf_entry wkup_padconf_array_essential[] = {
- {SR_PMIC_SCL, (PTU | IEN | M0)}, /* SR_PMIC_SCL */
- {SR_PMIC_SDA, (PTU | IEN | M0)}, /* SR_PMIC_SDA */
- {SYS_32K, (IEN | M0)}, /* SYS_32K */
-
- /* USB Hub clock */
- {FREF_CLK1_OUT, (PTD | IEN | M0)}, /* FREF_CLK1_OUT */
-};
-
-/*
- * Routine: set_muxconf_regs
- * Description: setup board pinmux configuration.
- */
-void set_muxconf_regs(void)
-{
- do_set_mux((*ctrl)->control_padconf_core_base,
- core_padconf_array_essential,
- sizeof(core_padconf_array_essential) /
- sizeof(struct pad_conf_entry));
-
- do_set_mux((*ctrl)->control_padconf_wkup_base,
- wkup_padconf_array_essential,
- sizeof(wkup_padconf_array_essential) /
- sizeof(struct pad_conf_entry));
-}
-
-#endif /* _CM_T54_MUX_DATA_H */
diff --git a/board/compulab/cm_t54/spl.c b/board/compulab/cm_t54/spl.c
deleted file mode 100644
index 9daec634cc..0000000000
--- a/board/compulab/cm_t54/spl.c
+++ /dev/null
@@ -1,65 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SPL specific code for Compulab CM-T54 board
- *
- * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
- *
- * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
- */
-
-#include <asm/emif.h>
-
-const struct emif_regs emif_regs_ddr3_532_mhz_cm_t54 = {
-#if defined(CONFIG_DRAM_1G) || defined(CONFIG_DRAM_512M)
- .sdram_config_init = 0x618522B2,
- .sdram_config = 0x618522B2,
-#elif defined(CONFIG_DRAM_2G)
- .sdram_config_init = 0x618522BA,
- .sdram_config = 0x618522BA,
-#endif
- .sdram_config2 = 0x0,
- .ref_ctrl = 0x00001040,
- .sdram_tim1 = 0xEEEF36F3,
- .sdram_tim2 = 0x348F7FDA,
- .sdram_tim3 = 0x027F88A8,
- .read_idle_ctrl = 0x00050000,
- .zq_config = 0x1007190B,
- .temp_alert_config = 0x00000000,
-
- .emif_ddr_phy_ctlr_1_init = 0x0030400B,
- .emif_ddr_phy_ctlr_1 = 0x0034400B,
- .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
- .emif_ddr_ext_phy_ctrl_2 = 0x00000000,
- .emif_ddr_ext_phy_ctrl_3 = 0x00000000,
- .emif_ddr_ext_phy_ctrl_4 = 0x00000000,
- .emif_ddr_ext_phy_ctrl_5 = 0x4350D435,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
- .emif_rd_wr_lvl_ctl = 0x00000000,
- .emif_rd_wr_exec_thresh = 0x40000305,
-};
-
-const struct dmm_lisa_map_regs lisa_map_cm_t54 = {
- .dmm_lisa_map_0 = 0x0,
- .dmm_lisa_map_1 = 0x0,
-
-#ifdef CONFIG_DRAM_2G
- .dmm_lisa_map_2 = 0x80740300,
-#elif defined(CONFIG_DRAM_1G)
- .dmm_lisa_map_2 = 0x80640300,
-#elif defined(CONFIG_DRAM_512M)
- .dmm_lisa_map_2 = 0x80500100,
-#endif
- .dmm_lisa_map_3 = 0x00000000,
- .is_ma_present = 0x1,
-};
-
-void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
-{
- *regs = &emif_regs_ddr3_532_mhz_cm_t54;
-}
-
-void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
-{
- *dmm_lisa_regs = &lisa_map_cm_t54;
-}
generated by cgit (git 2.34.1) at 2025-01-08 08:21:48 +0000