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-rw-r--r--board/freescale/ls1046ardb/Kconfig2
-rw-r--r--board/freescale/ls1046ardb/MAINTAINERS10
-rw-r--r--board/freescale/ls1046ardb/Makefile4
-rw-r--r--board/freescale/ls1046ardb/ls1046ardb.c35
4 files changed, 42 insertions, 9 deletions
diff --git a/board/freescale/ls1046ardb/Kconfig b/board/freescale/ls1046ardb/Kconfig
index a62255c78d..b9f2ed7e4b 100644
--- a/board/freescale/ls1046ardb/Kconfig
+++ b/board/freescale/ls1046ardb/Kconfig
@@ -12,5 +12,5 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "ls1046ardb"
-
+source "board/freescale/common/Kconfig"
endif
diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS
index ff42bef090..79a2290974 100644
--- a/board/freescale/ls1046ardb/MAINTAINERS
+++ b/board/freescale/ls1046ardb/MAINTAINERS
@@ -7,3 +7,13 @@ F: include/configs/ls1046ardb.h
F: configs/ls1046ardb_qspi_defconfig
F: configs/ls1046ardb_sdcard_defconfig
F: configs/ls1046ardb_emmc_defconfig
+
+LS1046A_SECURE_BOOT BOARD
+M: Ruchika Gupta <ruchika.gupta@nxp.com>
+S: Maintained
+F: configs/ls1046ardb_SECURE_BOOT_defconfig
+F: configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+
+M: Sumit Garg <sumit.garg@nxp.com>
+S: Maintained
+F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046ardb/Makefile b/board/freescale/ls1046ardb/Makefile
index 348eb76ea7..b92ed0b3ec 100644
--- a/board/freescale/ls1046ardb/Makefile
+++ b/board/freescale/ls1046ardb/Makefile
@@ -4,7 +4,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += cpld.o
obj-y += ddr.o
obj-y += ls1046ardb.o
+ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
+obj-y += cpld.o
+endif
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 02b6c4c375..1dd5e69882 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -21,9 +21,18 @@
#include <fsl_esdhc.h>
#include <power/mc34vr500_pmic.h>
#include "cpld.h"
+#include <fsl_sec.h>
DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f(void)
+{
+ fsl_lsch2_early_init_f();
+
+ return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
int checkboard(void)
{
static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
@@ -56,13 +65,6 @@ int checkboard(void)
return 0;
}
-int board_early_init_f(void)
-{
- fsl_lsch2_early_init_f();
-
- return 0;
-}
-
int board_init(void)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
@@ -71,6 +73,24 @@ int board_init(void)
enable_layerscape_ns_access();
#endif
+#ifdef CONFIG_SECURE_BOOT
+ /*
+ * In case of Secure Boot, the IBR configures the SMMU
+ * to allow only Secure transactions.
+ * SMMU must be reset in bypass mode.
+ * Set the ClientPD bit and Clear the USFCFG Bit
+ */
+ u32 val;
+ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_SCR0, val);
+ val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+ out_le32(SMMU_NSCR0, val);
+#endif
+
+#ifdef CONFIG_FSL_CAAM
+ sec_init();
+#endif
+
#ifdef CONFIG_FSL_LS_PPA
ppa_init();
#endif
@@ -161,3 +181,4 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0;
}
+#endif