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-rw-r--r--board/freescale/common/pfuze.c3
-rw-r--r--board/freescale/ls2080a/MAINTAINERS2
-rw-r--r--board/freescale/mpc8572ds/MAINTAINERS2
-rw-r--r--board/freescale/mx25pdk/MAINTAINERS2
-rw-r--r--board/freescale/mx28evk/MAINTAINERS2
-rw-r--r--board/freescale/mx53ard/MAINTAINERS2
-rw-r--r--board/freescale/mx53smd/MAINTAINERS2
-rw-r--r--board/freescale/mx6qsabreauto/MAINTAINERS2
-rw-r--r--board/freescale/mx6qsabreauto/mx6qsabreauto.c87
-rw-r--r--board/freescale/mx6sabresd/MAINTAINERS2
-rw-r--r--board/freescale/mx6sabresd/mx6sabresd.c36
-rw-r--r--board/freescale/mx6slevk/MAINTAINERS2
-rw-r--r--board/freescale/mx6sxsabresd/MAINTAINERS2
-rw-r--r--board/freescale/mx6sxsabresd/mx6sxsabresd.c10
-rw-r--r--board/freescale/qemu-ppce500/qemu-ppce500.c2
15 files changed, 106 insertions, 52 deletions
diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c
index 783c46d882..69afa83562 100644
--- a/board/freescale/common/pfuze.c
+++ b/board/freescale/common/pfuze.c
@@ -13,7 +13,8 @@
int pfuze_mode_init(struct pmic *p, u32 mode)
{
unsigned char offset, i, switch_num;
- u32 id, ret;
+ u32 id;
+ int ret;
pmic_reg_read(p, PFUZE100_DEVICEID, &id);
id = id & 0xf;
diff --git a/board/freescale/ls2080a/MAINTAINERS b/board/freescale/ls2080a/MAINTAINERS
index 03ca168f15..975ea2da48 100644
--- a/board/freescale/ls2080a/MAINTAINERS
+++ b/board/freescale/ls2080a/MAINTAINERS
@@ -1,5 +1,5 @@
LS2080A BOARD
-M: York Sun <yorksun@freescale.com>
+M: York Sun <york.sun@nxp.com>
S: Maintained
F: board/freescale/ls2080a/
F: include/configs/ls2080a_emu.h
diff --git a/board/freescale/mpc8572ds/MAINTAINERS b/board/freescale/mpc8572ds/MAINTAINERS
index 4c9b968cd0..46c2903a0c 100644
--- a/board/freescale/mpc8572ds/MAINTAINERS
+++ b/board/freescale/mpc8572ds/MAINTAINERS
@@ -1,5 +1,5 @@
MPC8572DS BOARD
-M: York Sun <yorksun@freescale.com>
+M: York Sun <york.sun@nxp.com>
S: Maintained
F: board/freescale/mpc8572ds/
F: include/configs/MPC8572DS.h
diff --git a/board/freescale/mx25pdk/MAINTAINERS b/board/freescale/mx25pdk/MAINTAINERS
index 63221765c7..fa4651e2df 100644
--- a/board/freescale/mx25pdk/MAINTAINERS
+++ b/board/freescale/mx25pdk/MAINTAINERS
@@ -1,5 +1,5 @@
MX25PDK BOARD
-M: Fabio Estevam <fabio.estevam@freescale.com>
+M: Fabio Estevam <fabio.estevam@nxp.com>
S: Maintained
F: board/freescale/mx25pdk/
F: include/configs/mx25pdk.h
diff --git a/board/freescale/mx28evk/MAINTAINERS b/board/freescale/mx28evk/MAINTAINERS
index 1caf5fb22a..a98a70558a 100644
--- a/board/freescale/mx28evk/MAINTAINERS
+++ b/board/freescale/mx28evk/MAINTAINERS
@@ -1,5 +1,5 @@
MX28EVK BOARD
-M: Fabio Estevam <fabio.estevam@freescale.com>
+M: Fabio Estevam <fabio.estevam@nxp.com>
S: Maintained
F: board/freescale/mx28evk/
F: include/configs/mx28evk.h
diff --git a/board/freescale/mx53ard/MAINTAINERS b/board/freescale/mx53ard/MAINTAINERS
index 7cc0e5e222..fa81afe9a3 100644
--- a/board/freescale/mx53ard/MAINTAINERS
+++ b/board/freescale/mx53ard/MAINTAINERS
@@ -1,5 +1,5 @@
MX53ARD BOARD
-M: Fabio Estevam <fabio.estevam@freescale.com>
+M: Fabio Estevam <fabio.estevam@nxp.com>
S: Maintained
F: board/freescale/mx53ard/
F: include/configs/mx53ard.h
diff --git a/board/freescale/mx53smd/MAINTAINERS b/board/freescale/mx53smd/MAINTAINERS
index 8830321495..17ec376f2a 100644
--- a/board/freescale/mx53smd/MAINTAINERS
+++ b/board/freescale/mx53smd/MAINTAINERS
@@ -1,5 +1,5 @@
MX53SMD BOARD
-M: Fabio Estevam <fabio.estevam@freescale.com>
+M: Fabio Estevam <fabio.estevam@nxp.com>
S: Maintained
F: board/freescale/mx53smd/
F: include/configs/mx53smd.h
diff --git a/board/freescale/mx6qsabreauto/MAINTAINERS b/board/freescale/mx6qsabreauto/MAINTAINERS
index 75a8862ef6..687f68c2f9 100644
--- a/board/freescale/mx6qsabreauto/MAINTAINERS
+++ b/board/freescale/mx6qsabreauto/MAINTAINERS
@@ -1,5 +1,5 @@
MX6QSABREAUTO BOARD
-M: Fabio Estevam <fabio.estevam@freescale.com>
+M: Fabio Estevam <fabio.estevam@nxp.com>
M: Peng Fan <Peng.Fan@freescale.com>
S: Maintained
F: board/freescale/mx6qsabreauto/
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 7c0e90ad0b..c2e9c5739b 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -412,14 +412,44 @@ u32 get_board_rev(void)
}
#if defined(CONFIG_VIDEO_IPUV3)
+static void disable_lvds(struct display_info_t const *dev)
+{
+ struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+ clrbits_le32(&iomux->gpr[2],
+ IOMUXC_GPR2_LVDS_CH0_MODE_MASK |
+ IOMUXC_GPR2_LVDS_CH1_MODE_MASK);
+}
+
static void do_enable_hdmi(struct display_info_t const *dev)
{
+ disable_lvds(dev);
imx_enable_hdmi_phy();
}
struct display_info_t const displays[] = {{
.bus = -1,
.addr = 0,
+ .pixfmt = IPU_PIX_FMT_RGB666,
+ .detect = NULL,
+ .enable = NULL,
+ .mode = {
+ .name = "Hannstar-XGA",
+ .refresh = 60,
+ .xres = 1024,
+ .yres = 768,
+ .pixclock = 15385,
+ .left_margin = 220,
+ .right_margin = 40,
+ .upper_margin = 21,
+ .lower_margin = 7,
+ .hsync_len = 60,
+ .vsync_len = 10,
+ .sync = FB_SYNC_EXT,
+ .vmode = FB_VMODE_NONINTERLACED
+} }, {
+ .bus = -1,
+ .addr = 0,
.pixfmt = IPU_PIX_FMT_RGB24,
.detect = detect_hdmi,
.enable = do_enable_hdmi,
@@ -440,18 +470,69 @@ struct display_info_t const displays[] = {{
} } };
size_t display_count = ARRAY_SIZE(displays);
+iomux_v3_cfg_t const backlight_pads[] = {
+ MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+};
+
+static void setup_iomux_backlight(void)
+{
+ gpio_direction_output(IMX_GPIO_NR(2, 9), 1);
+ imx_iomux_v3_setup_multiple_pads(backlight_pads,
+ ARRAY_SIZE(backlight_pads));
+}
+
static void setup_display(void)
{
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
int reg;
+ setup_iomux_backlight();
enable_ipu_clock();
imx_setup_hdmi();
+ /* Turn on LDB_DI0 and LDB_DI1 clocks */
+ reg = readl(&mxc_ccm->CCGR3);
+ reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK;
+ writel(reg, &mxc_ccm->CCGR3);
+
+ /* Set LDB_DI0 and LDB_DI1 clk select to 3b'011 */
+ reg = readl(&mxc_ccm->cs2cdr);
+ reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
+ MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
+ reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
+ (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
+ writel(reg, &mxc_ccm->cs2cdr);
+
+ reg = readl(&mxc_ccm->cscmr2);
+ reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV;
+ writel(reg, &mxc_ccm->cscmr2);
+
reg = readl(&mxc_ccm->chsccdr);
reg |= (CHSCCDR_CLK_SEL_LDB_DI0
<< MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+ reg |= (CHSCCDR_CLK_SEL_LDB_DI0 <<
+ MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET);
writel(reg, &mxc_ccm->chsccdr);
+
+ reg = IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW |
+ IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
+ IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
+ IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
+ IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
+ IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
+ IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 |
+ IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED;
+ writel(reg, &iomux->gpr[2]);
+
+ reg = readl(&iomux->gpr[3]);
+ reg &= ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK |
+ IOMUXC_GPR3_HDMI_MUX_CTL_MASK);
+ reg |= (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
+ IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET) |
+ (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
+ IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET);
+ writel(reg, &iomux->gpr[3]);
}
#endif /* CONFIG_VIDEO_IPUV3 */
@@ -467,9 +548,6 @@ int overwrite_console(void)
int board_early_init_f(void)
{
setup_iomux_uart();
-#ifdef CONFIG_VIDEO_IPUV3
- setup_display();
-#endif
#ifdef CONFIG_NAND_MXS
setup_gpmi_nand();
@@ -494,6 +572,9 @@ int board_init(void)
gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
imx_iomux_v3_setup_multiple_pads(port_exp, ARRAY_SIZE(port_exp));
+#ifdef CONFIG_VIDEO_IPUV3
+ setup_display();
+#endif
setup_iomux_eimnor();
return 0;
}
diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS
index 0011ec7b49..add23143a3 100644
--- a/board/freescale/mx6sabresd/MAINTAINERS
+++ b/board/freescale/mx6sabresd/MAINTAINERS
@@ -1,5 +1,5 @@
MX6SABRESD BOARD
-M: Fabio Estevam <fabio.estevam@freescale.com>
+M: Fabio Estevam <fabio.estevam@nxp.com>
S: Maintained
F: board/freescale/mx6sabresd/
F: include/configs/mx6sabresd.h
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 581c9d5560..d20953d2ca 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -94,8 +94,9 @@ static void setup_iomux_enet(void)
/* Reset AR8031 PHY */
gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
- udelay(500);
+ mdelay(10);
gpio_set_value(IMX_GPIO_NR(1, 25), 1);
+ udelay(100);
}
static iomux_v3_cfg_t const usdhc2_pads[] = {
@@ -340,39 +341,6 @@ int board_mmc_init(bd_t *bis)
}
#endif
-int mx6_rgmii_rework(struct phy_device *phydev)
-{
- unsigned short val;
-
- /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-
- val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
- val &= 0xffe3;
- val |= 0x18;
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
- /* introduce tx clock delay */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
- val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
- val |= 0x0100;
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
- return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
- mx6_rgmii_rework(phydev);
-
- if (phydev->drv->config)
- phydev->drv->config(phydev);
-
- return 0;
-}
-
#if defined(CONFIG_VIDEO_IPUV3)
static void disable_lvds(struct display_info_t const *dev)
{
diff --git a/board/freescale/mx6slevk/MAINTAINERS b/board/freescale/mx6slevk/MAINTAINERS
index f4e74ba725..2e25433828 100644
--- a/board/freescale/mx6slevk/MAINTAINERS
+++ b/board/freescale/mx6slevk/MAINTAINERS
@@ -1,5 +1,5 @@
MX6SLEVK BOARD
-M: Fabio Estevam <fabio.estevam@freescale.com>
+M: Fabio Estevam <fabio.estevam@nxp.com>
M: Peng Fan <Peng.Fan@freescale.com>
S: Maintained
F: board/freescale/mx6slevk/
diff --git a/board/freescale/mx6sxsabresd/MAINTAINERS b/board/freescale/mx6sxsabresd/MAINTAINERS
index c0f5d9c8e4..1dcec67545 100644
--- a/board/freescale/mx6sxsabresd/MAINTAINERS
+++ b/board/freescale/mx6sxsabresd/MAINTAINERS
@@ -1,5 +1,5 @@
MX6SXSABRESD BOARD
-M: Fabio Estevam <fabio.estevam@freescale.com>
+M: Fabio Estevam <fabio.estevam@nxp.com>
S: Maintained
F: board/freescale/mx6sxsabresd/
F: include/configs/mx6sxsabresd.h
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index 3ee46629ee..56dc0208c7 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -150,11 +150,15 @@ static int setup_fec(void)
{
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
- int reg;
+ int reg, ret;
/* Use 125MHz anatop loopback REF_CLK1 for ENET1 */
clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, 0);
+ ret = enable_fec_anatop_clock(0, ENET_125MHZ);
+ if (ret)
+ return ret;
+
imx_iomux_v3_setup_multiple_pads(phy_control_pads,
ARRAY_SIZE(phy_control_pads));
@@ -163,14 +167,14 @@ static int setup_fec(void)
/* Reset AR8031 PHY */
gpio_direction_output(IMX_GPIO_NR(2, 7) , 0);
- udelay(500);
+ mdelay(10);
gpio_set_value(IMX_GPIO_NR(2, 7), 1);
reg = readl(&anatop->pll_enet);
reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE;
writel(reg, &anatop->pll_enet);
- return enable_fec_anatop_clock(0, ENET_125MHZ);
+ return 0;
}
int board_eth_init(bd_t *bis)
diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c
index a0fca0d880..6cb5692eda 100644
--- a/board/freescale/qemu-ppce500/qemu-ppce500.c
+++ b/board/freescale/qemu-ppce500/qemu-ppce500.c
@@ -81,7 +81,7 @@ static int pci_map_region(void *fdt, int pci_node, int range_id,
ulong map_addr;
int r;
- r = fdt_read_range(fdt, pci_node, 0, NULL, &addr, &size);
+ r = fdt_read_range(fdt, pci_node, range_id, NULL, &addr, &size);
if (r)
return r;
generated by cgit (git 2.34.1) at 2025-01-21 08:58:21 +0000