diff options
Diffstat (limited to 'board/freescale')
-rw-r--r-- | board/freescale/ls1021aqds/ls1021aqds.c | 21 | ||||
-rw-r--r-- | board/freescale/ls1021atwr/ls1021atwr.c | 25 |
2 files changed, 29 insertions, 17 deletions
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 691e993650..f2dda22df6 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -197,6 +197,20 @@ int board_early_init_f(void) out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN); #endif + /* + * Enable snoop requests and DVM message requests for + * Slave insterface S4 (A7 core cluster) + */ + out_le32(&cci->slave[4].snoop_ctrl, + CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN); + + /* + * Set CCI-400 Slave interface S1, S2 Shareable Override Register + * All transactions are treated as non-shareable + */ + out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + /* Workaround for the issue that DDR could not respond to * barrier transaction which is generated by executing DSB/ISB * instruction. Set CCI-400 control override register to @@ -508,13 +522,6 @@ int board_init(void) /* Set CCI-400 control override register to * enable barrier transaction */ out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); - /* - * Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register - * All transactions are treated as non-shareable - */ - out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 027b67e6d5..bc8b00686c 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -263,6 +263,7 @@ int config_serdes_mux(void) int board_early_init_f(void) { struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; #ifdef CONFIG_TSEC_ENET out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); @@ -281,6 +282,20 @@ int board_early_init_f(void) out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); #endif + /* + * Enable snoop requests and DVM message requests for + * Slave insterface S4 (A7 core cluster) + */ + out_le32(&cci->slave[4].snoop_ctrl, + CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN); + + /* + * Set CCI-400 Slave interface S1, S2 Shareable Override Register + * All transactions are treated as non-shareable + */ + out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + return 0; } @@ -405,16 +420,6 @@ struct smmu_stream_id dev_stream_id[] = { int board_init(void) { - struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; - - /* - * Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register - * All transactions are treated as non-shareable - */ - out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); - #ifndef CONFIG_SYS_FSL_NO_SERDES fsl_serdes_init(); #ifndef CONFIG_QSPI_BOOT |