diff options
Diffstat (limited to 'board/google')
| -rw-r--r-- | board/google/Kconfig | 43 | ||||
| -rw-r--r-- | board/google/chromebook_link/Kconfig | 3 | ||||
| -rw-r--r-- | board/google/chromebox_panther/Kconfig | 3 |
3 files changed, 49 insertions, 0 deletions
diff --git a/board/google/Kconfig b/board/google/Kconfig new file mode 100644 index 0000000000..302f68e75e --- /dev/null +++ b/board/google/Kconfig @@ -0,0 +1,43 @@ +# +# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +if VENDOR_GOOGLE + +choice + prompt "Mainboard model" + +config TARGET_CHROMEBOOK_LINK + bool "Chromebook link" + help + This is the Chromebook Pixel released in 2013. It uses an Intel + i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of + SDRAM. It has a Panther Point platform controller hub, PCIe + WiFi and Bluetooth. It also includes a 720p webcam, USB SD + reader, microphone and speakers, display port and 32GB SATA + solid state drive. There is a Chrome OS EC connected on LPC, + and it provides a 2560x1700 high resolution touch-enabled LCD + display. + +config TARGET_CHROMEBOX_PANTHER + bool "Chromebox panther (not available)" + select n + help + Note: At present this must be used with coreboot. See README.x86 + for instructions. + + This is the Asus Chromebox CN60 released in 2014. It uses an Intel + Haswell Celeron 2955U Dual Core CPU with 2GB of SDRAM. It has a + Lynx Point platform controller hub, PCIe WiFi and Bluetooth. It also + includes a USB SD reader, four USB3 ports, display port and HDMI + video output and a 16GB SATA solid state drive. There is no Chrome + OS EC on this model. + +endchoice + +source "board/google/chromebook_link/Kconfig" +source "board/google/chromebox_panther/Kconfig" + +endif diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index ea454721c5..9c8d0205a1 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default "chromebook_link" +config SYS_TEXT_BASE + default 0xfff00000 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_RESET_VECTOR diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig index 11df55a13c..e3604ebe31 100644 --- a/board/google/chromebox_panther/Kconfig +++ b/board/google/chromebox_panther/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default "chromebox_panther" +config SYS_TEXT_BASE + default 0xfff00000 + # Panther actually uses haswell, not ivybridge, so this is just a placeholder config BOARD_SPECIFIC_OPTIONS # dummy def_bool y |