diff options
Diffstat (limited to 'board/intel')
| -rw-r--r-- | board/intel/Kconfig | 8 | ||||
| -rw-r--r-- | board/intel/edison/Kconfig | 26 | ||||
| -rw-r--r-- | board/intel/edison/MAINTAINERS | 6 | ||||
| -rw-r--r-- | board/intel/edison/Makefile | 7 | ||||
| -rw-r--r-- | board/intel/edison/config.mk | 18 | ||||
| -rw-r--r-- | board/intel/edison/edison.c | 104 | ||||
| -rw-r--r-- | board/intel/edison/start.S | 13 |
7 files changed, 182 insertions, 0 deletions
diff --git a/board/intel/Kconfig b/board/intel/Kconfig index 4d341aa799..d7d950e877 100644 --- a/board/intel/Kconfig +++ b/board/intel/Kconfig @@ -35,6 +35,13 @@ config TARGET_CROWNBAY Intel Platform Controller Hub EG20T, other system components and peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS. +config TARGET_EDISON + bool "Edison" + help + This is the Intel Edison Compute Module. It contains a dual core Intel + Atom Tangier CPU, 1 GB RAM integrated on package. There is also 4 GB + eMMC flash on board, Wi-Fi, Bluetooth 4 and USB controllers. + config TARGET_GALILEO bool "Galileo" help @@ -64,6 +71,7 @@ endchoice source "board/intel/bayleybay/Kconfig" source "board/intel/cougarcanyon2/Kconfig" source "board/intel/crownbay/Kconfig" +source "board/intel/edison/Kconfig" source "board/intel/galileo/Kconfig" source "board/intel/minnowmax/Kconfig" diff --git a/board/intel/edison/Kconfig b/board/intel/edison/Kconfig new file mode 100644 index 0000000000..4ff9d5adec --- /dev/null +++ b/board/intel/edison/Kconfig @@ -0,0 +1,26 @@ +if TARGET_EDISON + +config SYS_BOARD + default "edison" + +config SYS_VENDOR + default "intel" + +config SYS_SOC + default "tangier" + +config SYS_CONFIG_NAME + default "edison" + +config SYS_TEXT_BASE + default 0x01101000 + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select X86_LOAD_FROM_32_BIT + select INTEL_MID + select INTEL_TANGIER + select BOARD_LATE_INIT + select MD5 + +endif diff --git a/board/intel/edison/MAINTAINERS b/board/intel/edison/MAINTAINERS new file mode 100644 index 0000000000..4bc4a00c8a --- /dev/null +++ b/board/intel/edison/MAINTAINERS @@ -0,0 +1,6 @@ +Intel Edison Board +M: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +S: Maintained +F: board/intel/edison +F: include/configs/edison.h +F: configs/edison_defconfig diff --git a/board/intel/edison/Makefile b/board/intel/edison/Makefile new file mode 100644 index 0000000000..dde159435b --- /dev/null +++ b/board/intel/edison/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (c) 2017 Intel Corporation +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += start.o edison.o diff --git a/board/intel/edison/config.mk b/board/intel/edison/config.mk new file mode 100644 index 0000000000..465133fd77 --- /dev/null +++ b/board/intel/edison/config.mk @@ -0,0 +1,18 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. All rights reserved. +# Copyright (c) 2017 Intel Corporation +# +# SPDX-License-Identifier: GPL-2.0 BSD-3-Clause +# + +# Add 4096 bytes of zeroes to u-boot.bin +quiet_cmd_mkalign_eds = EDSALGN $@ +cmd_mkalign_eds = \ + dd if=$^ of=$@ bs=4k seek=1 2>/dev/null && \ + mv $@ $^ + +ALL-y += u-boot-align.bin +u-boot-align.bin: u-boot.bin + $(call if_changed,mkalign_eds) + +HOSTCFLAGS_autoconf.mk.dep = -Wno-variadic-macros diff --git a/board/intel/edison/edison.c b/board/intel/edison/edison.c new file mode 100644 index 0000000000..a1a7d4d7c8 --- /dev/null +++ b/board/intel/edison/edison.c @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <dwc3-uboot.h> +#include <mmc.h> +#include <u-boot/md5.h> +#include <usb.h> +#include <watchdog.h> + +#include <linux/usb/gadget.h> + +#include <asm/cache.h> +#include <asm/scu.h> +#include <asm/u-boot-x86.h> + +DECLARE_GLOBAL_DATA_PTR; + +static struct dwc3_device dwc3_device_data = { + .maximum_speed = USB_SPEED_HIGH, + .base = CONFIG_SYS_USB_OTG_BASE, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 0, +}; + +int usb_gadget_handle_interrupts(int controller_index) +{ + dwc3_uboot_handle_interrupt(controller_index); + WATCHDOG_RESET(); + return 0; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + if (index == 0 && init == USB_INIT_DEVICE) + return dwc3_uboot_init(&dwc3_device_data); + return -EINVAL; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + if (index == 0 && init == USB_INIT_DEVICE) { + dwc3_uboot_exit(index); + return 0; + } + return -EINVAL; +} + +static void assign_serial(void) +{ + struct mmc *mmc = find_mmc_device(0); + unsigned char ssn[16]; + char usb0addr[18]; + char serial[33]; + int i; + + if (!mmc) + return; + + md5((unsigned char *)mmc->cid, sizeof(mmc->cid), ssn); + + snprintf(usb0addr, sizeof(usb0addr), "02:00:86:%02x:%02x:%02x", + ssn[13], ssn[14], ssn[15]); + setenv("usb0addr", usb0addr); + + for (i = 0; i < 16; i++) + snprintf(&serial[2 * i], 3, "%02x", ssn[i]); + setenv("serial#", serial); + +#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE) + saveenv(); +#endif +} + +static void assign_hardware_id(void) +{ + struct ipc_ifwi_version v; + char hardware_id[4]; + int ret; + + ret = scu_ipc_command(IPCMSG_GET_FW_REVISION, 1, NULL, 0, (u32 *)&v, 4); + if (ret < 0) + printf("Can't retrieve hardware revision\n"); + + snprintf(hardware_id, sizeof(hardware_id), "%02X", v.hardware_id); + setenv("hardware_id", hardware_id); + +#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE) + saveenv(); +#endif +} + +int board_late_init(void) +{ + if (!getenv("serial#")) + assign_serial(); + + if (!getenv("hardware_id")) + assign_hardware_id(); + + return 0; +} diff --git a/board/intel/edison/start.S b/board/intel/edison/start.S new file mode 100644 index 0000000000..932fe6c24b --- /dev/null +++ b/board/intel/edison/start.S @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2008 + * Graeme Russ, graeme.russ@gmail.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* board early intialization */ +.globl early_board_init +early_board_init: + /* No 32-bit board specific initialisation */ + jmp early_board_init_ret |