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-rw-r--r--board/nvidia/common/board.c24
-rw-r--r--board/nvidia/dts/tegra20-seaboard.dts33
-rw-r--r--board/nvidia/harmony/harmony.c5
-rw-r--r--board/nvidia/seaboard/seaboard.c5
4 files changed, 61 insertions, 6 deletions
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 2c7cd0d401..76ec6876e2 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -26,10 +26,12 @@
#include <linux/compiler.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
+#include <asm/arch/display.h>
#include <asm/arch/emc.h>
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/pmu.h>
+#include <asm/arch/pwm.h>
#include <asm/arch/tegra.h>
#include <asm/arch/usb.h>
#include <asm/arch-tegra/board.h>
@@ -119,6 +121,13 @@ int board_init(void)
pin_mux_spi();
spi_init();
#endif
+#ifdef CONFIG_PWM_TEGRA
+ if (pwm_init(gd->fdt_blob))
+ debug("%s: Failed to init pwm\n", __func__);
+#endif
+#ifdef CONFIG_LCD
+ tegra_lcd_check_next_stage(gd->fdt_blob, 0);
+#endif
/* boot param addr */
gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
@@ -144,6 +153,9 @@ int board_init(void)
pin_mux_usb();
board_usb_init(gd->fdt_blob);
#endif
+#ifdef CONFIG_LCD
+ tegra_lcd_check_next_stage(gd->fdt_blob, 0);
+#endif
#ifdef CONFIG_TEGRA_NAND
pin_mux_nand();
@@ -174,7 +186,19 @@ int board_early_init_f(void)
/* Initialize periph GPIOs */
gpio_early_init();
gpio_early_init_uart();
+#ifdef CONFIG_LCD
+ tegra_lcd_early_init(gd->fdt_blob);
+#endif
return 0;
}
#endif /* EARLY_INIT */
+
+int board_late_init(void)
+{
+#ifdef CONFIG_LCD
+ /* Make sure we finish initing the LCD */
+ tegra_lcd_check_next_stage(gd->fdt_blob, 1);
+#endif
+ return 0;
+}
diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts
index 25a63a05d0..dd98ca48e9 100644
--- a/board/nvidia/dts/tegra20-seaboard.dts
+++ b/board/nvidia/dts/tegra20-seaboard.dts
@@ -163,4 +163,37 @@
compatible = "hynix,hy27uf4g2b", "nand-flash";
};
};
+
+ host1x {
+ status = "okay";
+ dc@54200000 {
+ status = "okay";
+ rgb {
+ status = "okay";
+ nvidia,panel = <&lcd_panel>;
+ };
+ };
+ };
+
+ lcd_panel: panel {
+ /* Seaboard has 1366x768 */
+ clock = <70600000>;
+ xres = <1366>;
+ yres = <768>;
+ left-margin = <58>;
+ right-margin = <58>;
+ hsync-len = <58>;
+ lower-margin = <4>;
+ upper-margin = <4>;
+ vsync-len = <4>;
+ hsync-active-high;
+ nvidia,bits-per-pixel = <16>;
+ nvidia,pwm = <&pwm 2 0>;
+ nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
+ nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
+ nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
+ nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
+ nvidia,panel-timings = <400 4 203 17 15>;
+ };
+
};
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index c7590ac6cf..93430edd3b 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -64,9 +64,8 @@ int board_mmc_init(bd_t *bd)
pin_mux_mmc();
debug("board_mmc_init: init SD slot J26\n");
- /* init dev 0, SD slot J26, with 4-bit bus */
- /* The board has an 8-bit bus, but 8-bit doesn't work yet */
- tegra_mmc_init(0, 4, GPIO_PI6, GPIO_PH2);
+ /* init dev 0, SD slot J26, with 8-bit bus */
+ tegra_mmc_init(0, 8, GPIO_PI6, GPIO_PH2);
debug("board_mmc_init: init SD slot J5\n");
/* init dev 2, SD slot J5, with 4-bit bus */
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index c412c077da..3e33da0afc 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -71,9 +71,8 @@ int board_mmc_init(bd_t *bd)
pin_mux_mmc();
debug("board_mmc_init: init eMMC\n");
- /* init dev 0, eMMC chip, with 4-bit bus */
- /* The board has an 8-bit bus, but 8-bit doesn't work yet */
- tegra_mmc_init(0, 4, -1, -1);
+ /* init dev 0, eMMC chip, with 8-bit bus */
+ tegra_mmc_init(0, 8, -1, -1);
debug("board_mmc_init: init SD slot\n");
/* init dev 1, SD slot, with 4-bit bus */