diff options
Diffstat (limited to 'board/sunxi')
| -rw-r--r-- | board/sunxi/Kconfig | 17 | ||||
| -rw-r--r-- | board/sunxi/ahci.c | 2 | ||||
| -rw-r--r-- | board/sunxi/board.c | 10 | ||||
| -rw-r--r-- | board/sunxi/gmac.c | 45 |
4 files changed, 74 insertions, 0 deletions
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index c3f865d298..246cd9a1a7 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -21,7 +21,10 @@ config MACH_SUN6I config MACH_SUN7I bool "sun7i (Allwinner A20)" select CPU_V7 + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT select SUPPORT_SPL + select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT config MACH_SUN8I bool "sun8i (Allwinner A23)" @@ -213,4 +216,18 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config VIDEO + boolean "Enable graphical uboot console on HDMI" + default y + ---help--- + Say Y here to add support for using a cfb console on the HDMI output + found on most sunxi devices. + +config USB_KEYBOARD + boolean "Enable USB keyboard support" + default y + ---help--- + Say Y here to add support for using a USB keyboard (typically used + in combination with a graphical console on HDMI). + endif diff --git a/board/sunxi/ahci.c b/board/sunxi/ahci.c index 5e123285b0..b7f0dda205 100644 --- a/board/sunxi/ahci.c +++ b/board/sunxi/ahci.c @@ -76,6 +76,8 @@ void scsi_init(void) #ifdef CONFIG_SATAPWR gpio_request(CONFIG_SATAPWR, "satapwr"); gpio_direction_output(CONFIG_SATAPWR, 1); + /* Give attached sata device time to power-up to avoid link timeouts */ + mdelay(500); #endif if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index e6ec5b8fc1..4c1c69a6ae 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -24,6 +24,7 @@ #endif #include <asm/arch/clock.h> #include <asm/arch/cpu.h> +#include <asm/arch/display.h> #include <asm/arch/dram.h> #include <asm/arch/gpio.h> #include <asm/arch/mmc.h> @@ -237,3 +238,12 @@ int misc_init_r(void) return 0; } #endif + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_VIDEO_DT_SIMPLEFB + return sunxi_simplefb_setup(blob); +#endif +} +#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index 051aca01a8..571bc9e0ab 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -13,7 +13,12 @@ int sunxi_gmac_initialize(bd_t *bis) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; /* Set up clock gating */ +#ifndef CONFIG_MACH_SUN6I setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC); +#else + setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC); + setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_GMAC); +#endif /* Set MII clock */ #ifdef CONFIG_RGMII @@ -33,6 +38,7 @@ int sunxi_gmac_initialize(bd_t *bis) setbits_le32(&ccm->gmac_clk_cfg, 0x3 << 10); #endif +#ifndef CONFIG_MACH_SUN6I /* Configure pin mux settings for GMAC */ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) { #ifdef CONFIG_RGMII @@ -43,9 +49,48 @@ int sunxi_gmac_initialize(bd_t *bis) sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC); sunxi_gpio_set_drv(pin, 3); } +#elif defined CONFIG_RGMII + /* Configure sun6i RGMII mode pin mux settings */ + for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } + for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } + for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(20); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } + for (pin = SUNXI_GPA(25); pin <= SUNXI_GPA(27); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } +#elif defined CONFIG_GMII + /* Configure sun6i GMII mode pin mux settings */ + for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(27); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 2); + } +#else + /* Configure sun6i MII mode pin mux settings */ + for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + for (pin = SUNXI_GPA(8); pin <= SUNXI_GPA(9); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + for (pin = SUNXI_GPA(11); pin <= SUNXI_GPA(14); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(24); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); +#endif #ifdef CONFIG_RGMII return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII); +#elif defined CONFIG_GMII + return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_GMII); #else return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII); #endif |