diff options
Diffstat (limited to 'board/sunxi')
-rw-r--r-- | board/sunxi/Kconfig | 353 | ||||
-rw-r--r-- | board/sunxi/MAINTAINERS | 29 | ||||
-rw-r--r-- | board/sunxi/Makefile | 47 | ||||
-rw-r--r-- | board/sunxi/ahci.c | 3 | ||||
-rw-r--r-- | board/sunxi/board.c | 54 | ||||
-rw-r--r-- | board/sunxi/dram_sun4i_408_1024_iow8.c | 31 | ||||
-rw-r--r-- | board/sunxi/gmac.c | 47 |
7 files changed, 520 insertions, 44 deletions
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 28df187840..6a4d764b7c 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -1,12 +1,204 @@ -if TARGET_SUN4I || TARGET_SUN5I || TARGET_SUN6I || TARGET_SUN7I || TARGET_SUN8I +if ARCH_SUNXI + +choice + prompt "Sunxi SoC Variant" + +config MACH_SUN4I + bool "sun4i (Allwinner A10)" + select CPU_V7 + select SUPPORT_SPL + +config MACH_SUN5I + bool "sun5i (Allwinner A13)" + select CPU_V7 + select SUPPORT_SPL + +config MACH_SUN6I + bool "sun6i (Allwinner A31)" + select CPU_V7 + select SUPPORT_SPL + +config MACH_SUN7I + bool "sun7i (Allwinner A20)" + select CPU_V7 + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT + select SUPPORT_SPL + select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT + +config MACH_SUN8I + bool "sun8i (Allwinner A23)" + select CPU_V7 + select SUPPORT_SPL + +endchoice + +if MACH_SUN6I || MACH_SUN8I + +config DRAM_CLK + int "sun6i dram clock speed" + default 312 + ---help--- + Set the dram clock speed, valid range 240 - 480, must be a multiple + of 24. + +config DRAM_ZQ + int "sun6i dram zq value" + default 123 + ---help--- + Set the dram zq value. + +endif config SYS_CONFIG_NAME - string - default "sun4i" if TARGET_SUN4I - default "sun5i" if TARGET_SUN5I - default "sun6i" if TARGET_SUN6I - default "sun7i" if TARGET_SUN7I - default "sun8i" if TARGET_SUN8I + default "sun4i" if MACH_SUN4I + default "sun5i" if MACH_SUN5I + default "sun6i" if MACH_SUN6I + default "sun7i" if MACH_SUN7I + default "sun8i" if MACH_SUN8I + +choice + prompt "Board" + +config TARGET_A10_OLINUXINO_L + bool "A10_OLINUXINO_L" + depends on MACH_SUN4I + +config TARGET_A10S_OLINUXINO_M + bool "A10S_OLINUXINO_M" + depends on MACH_SUN5I + +config TARGET_A13_OLINUXINOM + bool "A13_OLINUXINOM" + depends on MACH_SUN5I + +config TARGET_A13_OLINUXINO + bool "A13_OLINUXINO" + depends on MACH_SUN5I + +config TARGET_A20_OLINUXINO_L2 + bool "A20_OLINUXINO_L2" + depends on MACH_SUN7I + +config TARGET_A20_OLINUXINO_L + bool "A20_OLINUXINO_L" + depends on MACH_SUN7I + +config TARGET_A20_OLINUXINO_M + bool "A20_OLINUXINO_M" + depends on MACH_SUN7I + +config TARGET_AUXTEK_T004 + bool "AUXTEK_T004" + depends on MACH_SUN5I + +config TARGET_BANANAPI + bool "BANANAPI" + depends on MACH_SUN7I + +config TARGET_BANANAPRO + bool "BANANAPRO" + depends on MACH_SUN7I + +config TARGET_COLOMBUS + bool "COLOMBUS" + depends on MACH_SUN6I + +config TARGET_CUBIEBOARD2 + bool "CUBIEBOARD2" + depends on MACH_SUN7I + +config TARGET_CUBIEBOARD + bool "CUBIEBOARD" + depends on MACH_SUN4I + +config TARGET_CUBIETRUCK + bool "CUBIETRUCK" + depends on MACH_SUN7I + +config TARGET_HUMMINGBIRD_A31 + bool "HUMMINGBIRD_A31" + depends on MACH_SUN6I + +config TARGET_IPPO_Q8H_V5 + bool "IPPO_Q8H_V5" + depends on MACH_SUN8I + +config TARGET_PCDUINO + bool "PCDUINO" + depends on MACH_SUN4I + +config TARGET_PCDUINO3 + bool "PCDUINO3" + depends on MACH_SUN7I + +config TARGET_MELE_A1000G + bool "MELE_A1000G" + depends on MACH_SUN4I + +config TARGET_MELE_A1000 + bool "MELE_A1000" + depends on MACH_SUN4I + +config TARGET_MELE_M3 + bool "MELE_M3" + depends on MACH_SUN7I + +config TARGET_MELE_M9 + bool "MELE_M9" + depends on MACH_SUN6I + +config TARGET_MINI_X_1GB + bool "MINI_X_1GB" + depends on MACH_SUN4I + +config TARGET_MINI_X + bool "MINI_X" + depends on MACH_SUN4I + +config TARGET_MSI_PRIMO73 + bool "MSI Primo73 (7\" tablet)" + depends on MACH_SUN7I + ---help--- + The MSI Primo73 is an A20 based tablet, with 1G RAM, 16G NAND, + 1024x600 TN LCD display, mono speaker, 0.3 MP front camera, 2.0 MP + rear camera, 3000 mAh battery, gt911 touchscreen, mma8452 accelerometer + and rtl8188etv usb wifi. Has "power", "volume+" and "volume-" buttons + (both volume buttons are also connected to the UBOOT_SEL pin). The + external connectors are represented by MicroSD slot, MiniHDMI, MicroUSB + OTG and 3.5mm headphone jack. More details are available at + http://linux-sunxi.org/MSI_Primo73 + +config TARGET_MSI_PRIMO81 + bool "MSI Primo81 (7.85\" tablet)" + depends on MACH_SUN6I + ---help--- + The MSI Primo81 is an A31s based tablet, with 1G RAM, 16G NAND, + 1024x768 IPS LCD display, mono speaker, 0.3 MP front camera, 2.0 MP + rear camera, 3500 mAh battery, gt911 touchscreen, mma8452 accelerometer + and rtl8188etv usb wifi. Has "power", "volume+" and "volume-" buttons + (both volume buttons are also connected to the UBOOT_SEL pin). The + external connectors are represented by MicroSD slot, MiniHDMI, MicroUSB + OTG and 3.5mm headphone jack. More details are available at + http://linux-sunxi.org/MSI_Primo81 + +config TARGET_BA10_TV_BOX + bool "BA10_TV_BOX" + depends on MACH_SUN4I + +config TARGET_I12_TVBOX + bool "I12_TVBOX" + depends on MACH_SUN7I + +config TARGET_QT840A + bool "QT840A" + depends on MACH_SUN7I + +config TARGET_R7DONGLE + bool "R7DONGLE" + depends on MACH_SUN5I + +endchoice config SYS_BOARD default "sunxi" @@ -14,6 +206,23 @@ config SYS_BOARD config SYS_SOC default "sunxi" +config SPL_FEL + bool "SPL/FEL mode support" + depends on SPL + default n + +config UART0_PORT_F + bool "UART0 on MicroSD breakout board" + depends on SPL_FEL + default n + ---help--- + Repurpose the SD card slot for getting access to the UART0 serial + console. Primarily useful only for low level u-boot debugging on + tablets, where normal UART0 is difficult to access and requires + device disassembly and/or soldering. As the SD card can't be used + at the same time, the system can be only booted in the FEL mode. + Only enable this if you really know what you are doing. + config FDTFILE string "Default fdtfile env setting for this board" @@ -58,4 +267,134 @@ config MMC_SUNXI_SLOT_EXTRA slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable support for this. +config USB0_VBUS_PIN + string "Vbus enable pin for usb0 (otg)" + default "" + ---help--- + Set the Vbus enable pin for usb0 (otg). This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + +config USB1_VBUS_PIN + string "Vbus enable pin for usb1 (ehci0)" + default "PH6" if MACH_SUN4I || MACH_SUN7I + default "PH27" if MACH_SUN6I + ---help--- + Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes + a string in the format understood by sunxi_name_to_gpio, e.g. + PH1 for pin 1 of port H. + +config USB2_VBUS_PIN + string "Vbus enable pin for usb2 (ehci1)" + default "PH3" if MACH_SUN4I || MACH_SUN7I + default "PH24" if MACH_SUN6I + ---help--- + See USB1_VBUS_PIN help text. + +config VIDEO + boolean "Enable graphical uboot console on HDMI, LCD or VGA" + default y + ---help--- + Say Y here to add support for using a cfb console on the HDMI, LCD + or VGA output found on most sunxi devices. See doc/README.video for + info on how to select the video output and mode. + +config VIDEO_HDMI + boolean "HDMI output support" + depends on VIDEO && !MACH_SUN8I + default y + ---help--- + Say Y here to add support for outputting video over HDMI. + +config VIDEO_VGA + boolean "VGA output support" + depends on VIDEO && (MACH_SUN4I || MACH_SUN7I) + default n + ---help--- + Say Y here to add support for outputting video over VGA. + +config VIDEO_VGA_VIA_LCD + boolean "VGA via LCD controller support" + depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I) + default n + ---help--- + Say Y here to add support for external DACs connected to the parallel + LCD interface driving a VGA connector, such as found on the + Olimex A13 boards. + +config VIDEO_VGA_EXTERNAL_DAC_EN + string "LCD panel power enable pin" + depends on VIDEO_VGA_VIA_LCD + default "" + ---help--- + Set the enable pin for the external VGA DAC. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + +config VIDEO_LCD_MODE + string "LCD panel timing details" + depends on VIDEO + default "" + ---help--- + LCD panel timing details string, leave empty if there is no LCD panel. + This is in drivers/video/videomodes.c: video_get_params() format, e.g. + x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 + +config VIDEO_LCD_POWER + string "LCD panel power enable pin" + depends on VIDEO + default "" + ---help--- + Set the power enable pin for the LCD panel. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + +config VIDEO_LCD_BL_EN + string "LCD panel backlight enable pin" + depends on VIDEO + default "" + ---help--- + Set the backlight enable pin for the LCD panel. This takes a string in the + the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of + port H. + +config VIDEO_LCD_BL_PWM + string "LCD panel backlight pwm pin" + depends on VIDEO + default "" + ---help--- + Set the backlight pwm pin for the LCD panel. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + + +# Note only one of these may be selected at a time! But hidden choices are +# not supported by Kconfig +config VIDEO_LCD_IF_PARALLEL + bool + +config VIDEO_LCD_IF_LVDS + bool + + +choice + prompt "LCD panel support" + depends on VIDEO + ---help--- + Select which type of LCD panel to support. + +config VIDEO_LCD_PANEL_PARALLEL + bool "Generic parallel interface LCD panel" + select VIDEO_LCD_IF_PARALLEL + +config VIDEO_LCD_PANEL_LVDS + bool "Generic lvds interface LCD panel" + select VIDEO_LCD_IF_LVDS + +endchoice + + +config USB_KEYBOARD + boolean "Enable USB keyboard support" + default y + ---help--- + Say Y here to add support for using a USB keyboard (typically used + in combination with a graphical console). + endif diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index febd126cb8..3a09be92de 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -17,12 +17,19 @@ F: configs/A13-OLinuXino_defconfig F: configs/A13-OLinuXinoM_defconfig F: configs/Auxtek-T004_defconfig F: configs/r7-tv-dongle_defconfig +F: include/configs/sun6i.h +F: configs/CSQ_CS908_defconfig +F: configs/Mele_M9_defconfig F: include/configs/sun7i.h F: configs/A20-OLinuXino_MICRO_defconfig F: configs/Bananapi_defconfig +F: configs/Bananapro_defconfig F: configs/i12-tvbox_defconfig F: configs/Linksprite_pcDuino3_defconfig +F: configs/Linksprite_pcDuino3_fdt_defconfig F: configs/qt840a_defconfig +F: include/configs/sun8i.h +F: configs/Ippo_q8h_v1_2_defconfig CUBIEBOARD2 BOARD M: Ian Campbell <ijc@hellion.org.uk> @@ -51,7 +58,27 @@ M: Maxime Ripard <maxime.ripard@free-electrons.com> S: Maintained F: configs/Colombus_defconfig +HUMMINIGBIRD-A31 BOARD +M: Chen-Yu Tsai <wens@csie.org> +S: Maintained +F: configs/Hummingbird_A31_defconfig + IPPO-Q8H-V5 BOARD -M: CHen-Yu Tsai <wens@csie.org> +M: Chen-Yu Tsai <wens@csie.org> S: Maintained F: configs/Ippo_q8h_v5_defconfig + +MSI-PRIMO73 BOARD +M: Siarhei Siamashka <siarhei.siamashka@gmail.com> +S: Maintained +F: configs/MSI_Primo73_defconfig + +MSI-PRIMO81 BOARD +M: Siarhei Siamashka <siarhei.siamashka@gmail.com> +S: Maintained +F: configs/MSI_Primo81_defconfig + +LINKSPRITE-PCDUINO BOARD +M: Zoltan Herpai <wigyori@uid0.hu> +S: Maintained +F: configs/Linksprite_pcDuino_defconfig diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile index 6a2e4c9d5b..fab0877a54 100644 --- a/board/sunxi/Makefile +++ b/board/sunxi/Makefile @@ -11,26 +11,29 @@ obj-y += board.o obj-$(CONFIG_SUNXI_GMAC) += gmac.o obj-$(CONFIG_SUNXI_AHCI) += ahci.o -obj-$(CONFIG_A10_OLINUXINO_L) += dram_a10_olinuxino_l.o -obj-$(CONFIG_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o -obj-$(CONFIG_A13_OLINUXINO) += dram_a13_olinuxino.o -obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o -obj-$(CONFIG_A20_OLINUXINO_L) += dram_a20_olinuxino_l.o -obj-$(CONFIG_A20_OLINUXINO_L2) += dram_a20_olinuxino_l2.o -obj-$(CONFIG_A20_OLINUXINO_M) += dram_sun7i_384_1024_iow16.o +obj-$(CONFIG_TARGET_A10_OLINUXINO_L) += dram_a10_olinuxino_l.o +obj-$(CONFIG_TARGET_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o +obj-$(CONFIG_TARGET_A13_OLINUXINO) += dram_a13_olinuxino.o +obj-$(CONFIG_TARGET_A13_OLINUXINOM) += dram_a13_oli_micro.o +obj-$(CONFIG_TARGET_A20_OLINUXINO_L) += dram_a20_olinuxino_l.o +obj-$(CONFIG_TARGET_A20_OLINUXINO_L2) += dram_a20_olinuxino_l2.o +obj-$(CONFIG_TARGET_A20_OLINUXINO_M) += dram_sun7i_384_1024_iow16.o # This is not a typo, uses the same mem settings as the a10s-olinuxino-m -obj-$(CONFIG_AUXTEK_T004) += dram_a10s_olinuxino_m.o -obj-$(CONFIG_BA10_TV_BOX) += dram_sun4i_384_1024_iow8.o -obj-$(CONFIG_BANANAPI) += dram_bananapi.o -obj-$(CONFIG_CUBIEBOARD) += dram_cubieboard.o -obj-$(CONFIG_CUBIEBOARD2) += dram_cubieboard2.o -obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o -obj-$(CONFIG_I12_TVBOX) += dram_sun7i_384_1024_iow16.o -obj-$(CONFIG_MELE_A1000) += dram_sun4i_360_512.o -obj-$(CONFIG_MELE_A1000G) += dram_sun4i_360_1024_iow8.o -obj-$(CONFIG_MELE_M3) += dram_sun7i_384_1024_iow16.o -obj-$(CONFIG_MINI_X) += dram_sun4i_360_512.o -obj-$(CONFIG_MINI_X_1GB) += dram_sun4i_360_1024_iow16.o -obj-$(CONFIG_PCDUINO3) += dram_linksprite_pcduino3.o -obj-$(CONFIG_QT840A) += dram_sun7i_384_512_busw16_iow16.o -obj-$(CONFIG_R7DONGLE) += dram_r7dongle.o +obj-$(CONFIG_TARGET_AUXTEK_T004) += dram_a10s_olinuxino_m.o +obj-$(CONFIG_TARGET_BA10_TV_BOX) += dram_sun4i_384_1024_iow8.o +obj-$(CONFIG_TARGET_BANANAPI) += dram_bananapi.o +obj-$(CONFIG_TARGET_BANANAPRO) += dram_bananapi.o +obj-$(CONFIG_TARGET_CUBIEBOARD) += dram_cubieboard.o +obj-$(CONFIG_TARGET_CUBIEBOARD2) += dram_cubieboard2.o +obj-$(CONFIG_TARGET_CUBIETRUCK) += dram_cubietruck.o +obj-$(CONFIG_TARGET_I12_TVBOX) += dram_sun7i_384_1024_iow16.o +obj-$(CONFIG_TARGET_MELE_A1000) += dram_sun4i_360_512.o +obj-$(CONFIG_TARGET_MELE_A1000G) += dram_sun4i_360_1024_iow8.o +obj-$(CONFIG_TARGET_MELE_M3) += dram_sun7i_384_1024_iow16.o +obj-$(CONFIG_TARGET_MINI_X) += dram_sun4i_360_512.o +obj-$(CONFIG_TARGET_MINI_X_1GB) += dram_sun4i_360_1024_iow16.o +obj-$(CONFIG_TARGET_MSI_PRIMO73) += dram_sun7i_384_1024_iow16.o +obj-$(CONFIG_TARGET_PCDUINO) += dram_sun4i_408_1024_iow8.o +obj-$(CONFIG_TARGET_PCDUINO3) += dram_linksprite_pcduino3.o +obj-$(CONFIG_TARGET_QT840A) += dram_sun7i_384_512_busw16_iow16.o +obj-$(CONFIG_TARGET_R7DONGLE) += dram_r7dongle.o diff --git a/board/sunxi/ahci.c b/board/sunxi/ahci.c index 0c262eabb7..b7f0dda205 100644 --- a/board/sunxi/ahci.c +++ b/board/sunxi/ahci.c @@ -74,7 +74,10 @@ void scsi_init(void) { printf("SUNXI SCSI INIT\n"); #ifdef CONFIG_SATAPWR + gpio_request(CONFIG_SATAPWR, "satapwr"); gpio_direction_output(CONFIG_SATAPWR, 1); + /* Give attached sata device time to power-up to avoid link timeouts */ + mdelay(500); #endif if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 03890c8c9c..7d6d075f14 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -19,8 +19,12 @@ #ifdef CONFIG_AXP209_POWER #include <axp209.h> #endif +#ifdef CONFIG_AXP221_POWER +#include <axp221.h> +#endif #include <asm/arch/clock.h> #include <asm/arch/cpu.h> +#include <asm/arch/display.h> #include <asm/arch/dram.h> #include <asm/arch/gpio.h> #include <asm/arch/mmc.h> @@ -169,6 +173,23 @@ void sunxi_board_init(void) power_failed |= axp209_set_ldo3(2800); power_failed |= axp209_set_ldo4(2800); #endif +#ifdef CONFIG_AXP221_POWER + power_failed = axp221_init(); + power_failed |= axp221_set_dcdc1(CONFIG_AXP221_DCDC1_VOLT); + power_failed |= axp221_set_dcdc2(1200); /* A31:VDD-GPU, A23:VDD-SYS */ + power_failed |= axp221_set_dcdc3(1200); /* VDD-CPU */ +#ifdef CONFIG_MACH_SUN6I + power_failed |= axp221_set_dcdc4(1200); /* A31:VDD-SYS */ +#else + power_failed |= axp221_set_dcdc4(0); /* A23:unused */ +#endif + power_failed |= axp221_set_dcdc5(1500); /* VCC-DRAM */ + power_failed |= axp221_set_dldo1(CONFIG_AXP221_DLDO1_VOLT); + power_failed |= axp221_set_dldo4(CONFIG_AXP221_DLDO4_VOLT); + power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT); + power_failed |= axp221_set_aldo2(CONFIG_AXP221_ALDO2_VOLT); + power_failed |= axp221_set_aldo3(CONFIG_AXP221_ALDO3_VOLT); +#endif printf("DRAM:"); ramsize = sunxi_dram_init(); @@ -190,24 +211,31 @@ void sunxi_board_init(void) #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { - if (!getenv("ethaddr")) { - uint32_t reg_val = readl(SUNXI_SID_BASE); + unsigned int sid[4]; - if (reg_val) { - uint8_t mac_addr[6]; + if (!getenv("ethaddr") && sunxi_get_sid(sid) == 0 && + sid[0] != 0 && sid[3] != 0) { + uint8_t mac_addr[6]; - mac_addr[0] = 0x02; /* Non OUI / registered MAC address */ - mac_addr[1] = (reg_val >> 0) & 0xff; - reg_val = readl(SUNXI_SID_BASE + 0x0c); - mac_addr[2] = (reg_val >> 24) & 0xff; - mac_addr[3] = (reg_val >> 16) & 0xff; - mac_addr[4] = (reg_val >> 8) & 0xff; - mac_addr[5] = (reg_val >> 0) & 0xff; + mac_addr[0] = 0x02; /* Non OUI / registered MAC address */ + mac_addr[1] = (sid[0] >> 0) & 0xff; + mac_addr[2] = (sid[3] >> 24) & 0xff; + mac_addr[3] = (sid[3] >> 16) & 0xff; + mac_addr[4] = (sid[3] >> 8) & 0xff; + mac_addr[5] = (sid[3] >> 0) & 0xff; - eth_setenv_enetaddr("ethaddr", mac_addr); - } + eth_setenv_enetaddr("ethaddr", mac_addr); } return 0; } #endif + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_VIDEO_DT_SIMPLEFB + return sunxi_simplefb_setup(blob); +#endif +} +#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/board/sunxi/dram_sun4i_408_1024_iow8.c b/board/sunxi/dram_sun4i_408_1024_iow8.c new file mode 100644 index 0000000000..c6d87d23d9 --- /dev/null +++ b/board/sunxi/dram_sun4i_408_1024_iow8.c @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + +#include <common.h> +#include <asm/arch/dram.h> + +static struct dram_para dram_para = { + .clock = 408, + .type = 3, + .rank_num = 1, + .density = 2048, + .io_width = 8, + .bus_width = 32, + .cas = 6, + .zq = 123, + .odt_en = 0, + .size = 1024, + .tpr0 = 0x30926692, + .tpr1 = 0x1090, + .tpr2 = 0x1a0c8, + .tpr3 = 0, + .tpr4 = 0, + .tpr5 = 0, + .emr1 = 0, + .emr2 = 0, + .emr3 = 0, +}; + +unsigned long sunxi_dram_init(void) +{ + return dramc_init(&dram_para); +} diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index 6348d27282..4e4615e12f 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -13,7 +13,12 @@ int sunxi_gmac_initialize(bd_t *bis) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; /* Set up clock gating */ +#ifndef CONFIG_MACH_SUN6I setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC); +#else + setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC); + setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_GMAC); +#endif /* Set MII clock */ #ifdef CONFIG_RGMII @@ -29,10 +34,11 @@ int sunxi_gmac_initialize(bd_t *bis) * need to set bits 10-12 GTXDC "GMAC Transmit Clock Delay Chain" * of the GMAC clk register to 3. */ -#ifdef CONFIG_BANANAPI +#if defined CONFIG_TARGET_BANANAPI || defined CONFIG_TARGET_BANANAPRO setbits_le32(&ccm->gmac_clk_cfg, 0x3 << 10); #endif +#ifndef CONFIG_MACH_SUN6I /* Configure pin mux settings for GMAC */ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) { #ifdef CONFIG_RGMII @@ -43,9 +49,48 @@ int sunxi_gmac_initialize(bd_t *bis) sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC); sunxi_gpio_set_drv(pin, 3); } +#elif defined CONFIG_RGMII + /* Configure sun6i RGMII mode pin mux settings */ + for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } + for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } + for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(20); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } + for (pin = SUNXI_GPA(25); pin <= SUNXI_GPA(27); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 3); + } +#elif defined CONFIG_GMII + /* Configure sun6i GMII mode pin mux settings */ + for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(27); pin++) { + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + sunxi_gpio_set_drv(pin, 2); + } +#else + /* Configure sun6i MII mode pin mux settings */ + for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + for (pin = SUNXI_GPA(8); pin <= SUNXI_GPA(9); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + for (pin = SUNXI_GPA(11); pin <= SUNXI_GPA(14); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(24); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); + for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++) + sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC); +#endif #ifdef CONFIG_RGMII return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII); +#elif defined CONFIG_GMII + return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_GMII); #else return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII); #endif |