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Diffstat (limited to 'board/toradex/apalis_imx6/pf0100.c')
-rw-r--r--board/toradex/apalis_imx6/pf0100.c206
1 files changed, 129 insertions, 77 deletions
diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c
index 7334e92f2e..ebd6418fd4 100644
--- a/board/toradex/apalis_imx6/pf0100.c
+++ b/board/toradex/apalis_imx6/pf0100.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2014-2016, Toradex AG
+ * Copyright (C) 2014-2019, Toradex AG
*/
/*
@@ -9,7 +9,6 @@
#include <common.h>
#include <i2c.h>
-#include <linux/compiler.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/arch/mx6-pins.h>
@@ -22,6 +21,8 @@
/* define for PMIC register dump */
/*#define DEBUG */
+#define WARNBAR "@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\n"
+
/* use Apalis GPIO1 to switch on VPGM, ON: 1 */
static __maybe_unused iomux_v3_cfg_t const pmic_prog_pads[] = {
MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
@@ -30,99 +31,100 @@ static __maybe_unused iomux_v3_cfg_t const pmic_prog_pads[] = {
unsigned pmic_init(void)
{
+ int rc;
+ struct udevice *dev = NULL;
unsigned programmed = 0;
uchar bus = 1;
uchar devid, revid, val;
- puts("PMIC: ");
- if (!((0 == i2c_set_bus_num(bus)) &&
- (0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
- puts("i2c bus failed\n");
+ puts("PMIC: ");
+ rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev);
+ if (rc) {
+ printf("failed to get device for PMIC at address 0x%x\n",
+ PFUZE100_I2C_ADDR);
+ return 0;
+ }
+
+ /* check for errors in PMIC fuses */
+ if (dm_i2c_read(dev, PFUZE100_INTSTAT3, &val, 1) < 0) {
+ puts("i2c pmic INTSTAT3 register read failed\n");
+ return 0;
+ }
+ if (val & PFUZE100_BIT_OTP_ECCI) {
+ puts("\n" WARNBAR);
+ puts("WARNING: ecc errors found in pmic fuse banks\n");
+ puts(WARNBAR);
+ }
+ if (dm_i2c_read(dev, PFUZE100_OTP_ECC_SE1, &val, 1) < 0) {
+ puts("i2c pmic ECC_SE1 register read failed\n");
+ return 0;
+ }
+ if (val & PFUZE100_BITS_ECC_SE1) {
+ puts(WARNBAR);
+ puts("WARNING: ecc has made bit corrections in banks 1 to 5\n");
+ puts(WARNBAR);
+ }
+ if (dm_i2c_read(dev, PFUZE100_OTP_ECC_SE2, &val, 1) < 0) {
+ puts("i2c pmic ECC_SE2 register read failed\n");
+ return 0;
+ }
+ if (val & PFUZE100_BITS_ECC_SE2) {
+ puts(WARNBAR);
+ puts("WARNING: ecc has made bit corrections in banks 6 to 10\n"
+ );
+ puts(WARNBAR);
+ }
+ if (dm_i2c_read(dev, PFUZE100_OTP_ECC_DE1, &val, 1) < 0) {
+ puts("i2c pmic ECC_DE register read failed\n");
return 0;
}
+ if (val & PFUZE100_BITS_ECC_DE1) {
+ puts(WARNBAR);
+ puts("ERROR: banks 1 to 5 have uncorrectable bits\n");
+ puts(WARNBAR);
+ }
+ if (dm_i2c_read(dev, PFUZE100_OTP_ECC_DE2, &val, 1) < 0) {
+ puts("i2c pmic ECC_DE register read failed\n");
+ return 0;
+ }
+ if (val & PFUZE100_BITS_ECC_DE2) {
+ puts(WARNBAR);
+ puts("ERROR: banks 6 to 10 have uncorrectable bits\n");
+ puts(WARNBAR);
+ }
+
/* get device ident */
- if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) {
+ if (dm_i2c_read(dev, PFUZE100_DEVICEID, &devid, 1) < 0) {
puts("i2c pmic devid read failed\n");
return 0;
}
- if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_REVID, 1, &revid, 1) < 0) {
+ if (dm_i2c_read(dev, PFUZE100_REVID, &revid, 1) < 0) {
puts("i2c pmic revid read failed\n");
return 0;
}
- printf("device id: 0x%.2x, revision id: 0x%.2x\n", devid, revid);
-
-#ifdef DEBUG
- {
- unsigned i, j;
-
- for (i = 0; i < 16; i++)
- printf("\t%x", i);
- for (j = 0; j < 0x80; ) {
- printf("\n%2x", j);
- for (i = 0; i < 16; i++) {
- i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
- printf("\t%2x", val);
- }
- j += 0x10;
- }
- printf("\nEXT Page 1");
-
- val = PFUZE100_PAGE_REGISTER_PAGE1;
- if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
- &val, 1)) {
- puts("i2c write failed\n");
- return 0;
- }
-
- for (j = 0x80; j < 0x100; ) {
- printf("\n%2x", j);
- for (i = 0; i < 16; i++) {
- i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
- printf("\t%2x", val);
- }
- j += 0x10;
- }
- printf("\nEXT Page 2");
+ printf("device id: 0x%.2x, revision id: 0x%.2x, ", devid, revid);
- val = PFUZE100_PAGE_REGISTER_PAGE2;
- if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
- &val, 1)) {
- puts("i2c write failed\n");
- return 0;
- }
-
- for (j = 0x80; j < 0x100; ) {
- printf("\n%2x", j);
- for (i = 0; i < 16; i++) {
- i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
- printf("\t%2x", val);
- }
- j += 0x10;
- }
- printf("\n");
- }
-#endif
/* get device programmed state */
val = PFUZE100_PAGE_REGISTER_PAGE1;
- if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) {
+ if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
puts("i2c write failed\n");
return 0;
}
- if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR1, 1, &val, 1) < 0) {
+ if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) {
puts("i2c fuse_por read failed\n");
return 0;
}
if (val & PFUZE100_FUSE_POR_M)
programmed++;
- if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR2, 1, &val, 1) < 0) {
+ if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) {
puts("i2c fuse_por read failed\n");
return programmed;
}
if (val & PFUZE100_FUSE_POR_M)
programmed++;
- if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR3, 1, &val, 1) < 0) {
+ if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) {
puts("i2c fuse_por read failed\n");
return programmed;
}
@@ -131,13 +133,13 @@ unsigned pmic_init(void)
switch (programmed) {
case 0:
- printf("PMIC: not programmed\n");
+ puts("not programmed\n");
break;
case 3:
- printf("PMIC: programmed\n");
+ puts("programmed\n");
break;
default:
- printf("PMIC: undefined programming state\n");
+ puts("undefined programming state\n");
break;
}
@@ -145,25 +147,75 @@ unsigned pmic_init(void)
if (programmed != 3) {
/* set VGEN1 to 1.2V */
val = PFUZE100_VGEN1_VAL;
- if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_VGEN1CTL, 1,
- &val, 1)) {
+ if (dm_i2c_write(dev, PFUZE100_VGEN1CTL, &val, 1)) {
puts("i2c write failed\n");
return programmed;
}
/* set SWBST to 5.0V */
val = PFUZE100_SWBST_VAL;
- if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_SWBSTCTL, 1,
- &val, 1)) {
+ if (dm_i2c_write(dev, PFUZE100_SWBSTCTL, &val, 1))
puts("i2c write failed\n");
+ }
+
+#ifdef DEBUG
+ {
+ unsigned int i, j;
+
+ for (i = 0; i < 16; i++)
+ printf("\t%x", i);
+ for (j = 0; j < 0x80; ) {
+ printf("\n%2x", j);
+ for (i = 0; i < 16; i++) {
+ dm_i2c_read(dev, j + i, &val, 1);
+ printf("\t%2x", val);
+ }
+ j += 0x10;
}
+ printf("\nEXT Page 1");
+
+ val = PFUZE100_PAGE_REGISTER_PAGE1;
+ if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
+ puts("i2c write failed\n");
+ return 0;
+ }
+
+ for (j = 0x80; j < 0x100; ) {
+ printf("\n%2x", j);
+ for (i = 0; i < 16; i++) {
+ dm_i2c_read(dev, j + i, &val, 1);
+ printf("\t%2x", val);
+ }
+ j += 0x10;
+ }
+ printf("\nEXT Page 2");
+
+ val = PFUZE100_PAGE_REGISTER_PAGE2;
+ if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
+ puts("i2c write failed\n");
+ return 0;
+ }
+
+ for (j = 0x80; j < 0x100; ) {
+ printf("\n%2x", j);
+ for (i = 0; i < 16; i++) {
+ dm_i2c_read(dev, j + i, &val, 1);
+ printf("\t%2x", val);
+ }
+ j += 0x10;
+ }
+ printf("\n");
}
+#endif /* DEBUG */
+
return programmed;
}
#ifndef CONFIG_SPL_BUILD
static int pf0100_prog(void)
{
+ int rc;
+ struct udevice *dev = NULL;
unsigned char bus = 1;
unsigned char val;
unsigned int i;
@@ -177,9 +229,10 @@ static int pf0100_prog(void)
ARRAY_SIZE(pmic_prog_pads));
gpio_direction_output(PMIC_PROG_VOLTAGE, 0);
- if (!((0 == i2c_set_bus_num(bus)) &&
- (0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
- puts("i2c bus failed\n");
+ rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev);
+ if (rc) {
+ printf("failed to get device for PMIC at address 0x%x\n",
+ PFUZE100_I2C_ADDR);
return CMD_RET_FAILURE;
}
@@ -187,8 +240,7 @@ static int pf0100_prog(void)
switch (pmic_otp_prog[i].cmd) {
case pmic_i2c:
val = (unsigned char) (pmic_otp_prog[i].value & 0xff);
- if (i2c_write(PFUZE100_I2C_ADDR, pmic_otp_prog[i].reg,
- 1, &val, 1)) {
+ if (dm_i2c_write(dev, pmic_otp_prog[i].reg, &val, 1)) {
printf("i2c write failed, reg 0x%2x, value 0x%2x\n",
pmic_otp_prog[i].reg, val);
return CMD_RET_FAILURE;
@@ -227,4 +279,4 @@ U_BOOT_CMD(
"Program the OTP fuses on the PMIC PF0100",
""
);
-#endif
+#endif /* CONFIG_SPL_BUILD */
generated by cgit (git 2.34.1) at 2024-12-26 18:26:48 +0000