diff options
Diffstat (limited to 'board')
94 files changed, 1092 insertions, 341 deletions
diff --git a/board/BuR/common/bur_common.h b/board/BuR/common/bur_common.h index 39afbba7db..e4896fba14 100644 --- a/board/BuR/common/bur_common.h +++ b/board/BuR/common/bur_common.h @@ -16,10 +16,9 @@ int load_lcdtiming(struct am335x_lcdpanel *panel); void br_summaryscreen(void); -void blink(u32 blinks, u32 intervall, u32 pin); void pmicsetup(u32 mpupll); void enable_uart0_pin_mux(void); -void enable_i2c0_pin_mux(void); +void enable_i2c_pin_mux(void); void enable_board_pin_mux(void); int board_eth_init(bd_t *bis); diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c index 5ff8a7e0ae..ccaa9c6845 100644 --- a/board/BuR/common/common.c +++ b/board/BuR/common/common.c @@ -441,30 +441,12 @@ void lcd_enable(void) #error "LCD-support with a suitable FB-Driver is mandatory !" #endif /* CONFIG_LCD */ -void blink(u32 blinks, u32 intervall, u32 pin) -{ - gpio_direction_output(pin, 0); - int val = 0; - - do { - val ^= 0x01; - gpio_set_value(pin, val); - mdelay(intervall); - } while (blinks--); - - gpio_set_value(pin, 0); -} - #ifdef CONFIG_SPL_BUILD void pmicsetup(u32 mpupll) { int mpu_vdd; int usb_cur_lim; - /* setup I2C */ - enable_i2c0_pin_mux(); - i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); - if (i2c_probe(TPS65217_CHIP_PM)) { puts("PMIC (0x24) not found! skip further initalization.\n"); return; diff --git a/board/BuR/kwb/board.c b/board/BuR/kwb/board.c index 892311e6ee..6eed7e0d7f 100644 --- a/board/BuR/kwb/board.c +++ b/board/BuR/kwb/board.c @@ -124,7 +124,8 @@ void am33xx_spl_board_init(void) gpio_direction_output(LCD_PWR, 0); /* setup I2C */ - enable_i2c0_pin_mux(); + enable_i2c_pin_mux(); + i2c_set_bus_num(0); i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); /* power-ON 3V3 via Resetcontroller */ diff --git a/board/BuR/kwb/mux.c b/board/BuR/kwb/mux.c index 9f89b5e53d..2b1d8d3b1d 100644 --- a/board/BuR/kwb/mux.c +++ b/board/BuR/kwb/mux.c @@ -180,7 +180,7 @@ void enable_uart0_pin_mux(void) configure_module_pin_mux(uart0_pin_mux); } -void enable_i2c0_pin_mux(void) +void enable_i2c_pin_mux(void) { configure_module_pin_mux(i2c0_pin_mux); } diff --git a/board/BuR/tseries/board.c b/board/BuR/tseries/board.c index 9402aa4205..89e989f246 100644 --- a/board/BuR/tseries/board.c +++ b/board/BuR/tseries/board.c @@ -123,6 +123,10 @@ void am33xx_spl_board_init(void) /* setup LCD-Pixel Clock */ writel(0x2, &cmdpll->clklcdcpixelclk); /* clock comes from perPLL M2 */ + /* setup I2C */ + enable_i2c_pin_mux(); + i2c_set_bus_num(0); + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); pmicsetup(0); } diff --git a/board/BuR/tseries/mux.c b/board/BuR/tseries/mux.c index 2c87a63b85..ac7e885f61 100644 --- a/board/BuR/tseries/mux.c +++ b/board/BuR/tseries/mux.c @@ -226,7 +226,7 @@ void enable_uart0_pin_mux(void) configure_module_pin_mux(uart0_pin_mux); } -void enable_i2c0_pin_mux(void) +void enable_i2c_pin_mux(void) { configure_module_pin_mux(i2c0_pin_mux); } diff --git a/board/alphaproject/ap_sh4a_4a/lowlevel_init.S b/board/alphaproject/ap_sh4a_4a/lowlevel_init.S index d5900a8c99..0c40a3ce4d 100644 --- a/board/alphaproject/ap_sh4a_4a/lowlevel_init.S +++ b/board/alphaproject/ap_sh4a_4a/lowlevel_init.S @@ -5,7 +5,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/amcc/acadia/Kconfig b/board/amcc/acadia/Kconfig index 033deaf7d6..7c0ef534ab 100644 --- a/board/amcc/acadia/Kconfig +++ b/board/amcc/acadia/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "acadia" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/bamboo/Kconfig b/board/amcc/bamboo/Kconfig index c0bd40aee7..d44a36a573 100644 --- a/board/amcc/bamboo/Kconfig +++ b/board/amcc/bamboo/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "bamboo" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/bubinga/Kconfig b/board/amcc/bubinga/Kconfig index 540d9b6235..fc40f6ed96 100644 --- a/board/amcc/bubinga/Kconfig +++ b/board/amcc/bubinga/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "bubinga" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/canyonlands/Kconfig b/board/amcc/canyonlands/Kconfig index 848e08fbba..46efa7a79f 100644 --- a/board/amcc/canyonlands/Kconfig +++ b/board/amcc/canyonlands/Kconfig @@ -39,12 +39,4 @@ config DM config DM_SERIAL default y -config SYS_MALLOC_F - bool - default y - -config SYS_MALLOC_F_LEN - hex - default 0x400 - endif diff --git a/board/amcc/ebony/Kconfig b/board/amcc/ebony/Kconfig index 62394b68fa..ba73148f7f 100644 --- a/board/amcc/ebony/Kconfig +++ b/board/amcc/ebony/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "ebony" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/katmai/Kconfig b/board/amcc/katmai/Kconfig index fc606cff1c..59d3ef5883 100644 --- a/board/amcc/katmai/Kconfig +++ b/board/amcc/katmai/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "katmai" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/kilauea/Kconfig b/board/amcc/kilauea/Kconfig index 3f2f434827..5dfd9ebe3f 100644 --- a/board/amcc/kilauea/Kconfig +++ b/board/amcc/kilauea/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kilauea" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/luan/Kconfig b/board/amcc/luan/Kconfig index 3df90af484..36b44fffa9 100644 --- a/board/amcc/luan/Kconfig +++ b/board/amcc/luan/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "luan" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/makalu/Kconfig b/board/amcc/makalu/Kconfig index 31ce5f10c6..7f8498a533 100644 --- a/board/amcc/makalu/Kconfig +++ b/board/amcc/makalu/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "makalu" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/ocotea/Kconfig b/board/amcc/ocotea/Kconfig index 18c1a15ef4..489e8a4da3 100644 --- a/board/amcc/ocotea/Kconfig +++ b/board/amcc/ocotea/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "ocotea" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/redwood/Kconfig b/board/amcc/redwood/Kconfig index d710590998..fee644146e 100644 --- a/board/amcc/redwood/Kconfig +++ b/board/amcc/redwood/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "redwood" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/sequoia/Kconfig b/board/amcc/sequoia/Kconfig index 67ee3ca2eb..6e6e408ed5 100644 --- a/board/amcc/sequoia/Kconfig +++ b/board/amcc/sequoia/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "sequoia" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/taihu/Kconfig b/board/amcc/taihu/Kconfig index fc5cb1de7e..faafb08941 100644 --- a/board/amcc/taihu/Kconfig +++ b/board/amcc/taihu/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "taihu" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/taishan/Kconfig b/board/amcc/taishan/Kconfig index abd07f570d..9ad8a4ce64 100644 --- a/board/amcc/taishan/Kconfig +++ b/board/amcc/taishan/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "taishan" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/walnut/Kconfig b/board/amcc/walnut/Kconfig index 94e3dc9e78..d4c451dc07 100644 --- a/board/amcc/walnut/Kconfig +++ b/board/amcc/walnut/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "walnut" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/yosemite/Kconfig b/board/amcc/yosemite/Kconfig index dfa10687c2..ec51236306 100644 --- a/board/amcc/yosemite/Kconfig +++ b/board/amcc/yosemite/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "yosemite" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/amcc/yucca/Kconfig b/board/amcc/yucca/Kconfig index 61d95891e4..338b6a90c9 100644 --- a/board/amcc/yucca/Kconfig +++ b/board/amcc/yucca/Kconfig @@ -9,4 +9,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "yucca" +config DISPLAY_BOARDINFO + bool + default y + endif diff --git a/board/armadeus/apf27/lowlevel_init.S b/board/armadeus/apf27/lowlevel_init.S index 4293cb1080..2f795e460a 100644 --- a/board/armadeus/apf27/lowlevel_init.S +++ b/board/armadeus/apf27/lowlevel_init.S @@ -6,7 +6,6 @@ #include <config.h> #include <generated/asm-offsets.h> -#include <version.h> #include <asm/macro.h> #include <asm/arch/imx-regs.h> #include "apf27.h" diff --git a/board/armltd/integrator/lowlevel_init.S b/board/armltd/integrator/lowlevel_init.S index 0fb42adc6f..b50ba9878c 100644 --- a/board/armltd/integrator/lowlevel_init.S +++ b/board/armltd/integrator/lowlevel_init.S @@ -8,7 +8,6 @@ */ #include <config.h> -#include <version.h> /* Reset using CM control register */ .global reset_cpu diff --git a/board/armltd/versatile/lowlevel_init.S b/board/armltd/versatile/lowlevel_init.S index 902d646efb..539ba41e66 100644 --- a/board/armltd/versatile/lowlevel_init.S +++ b/board/armltd/versatile/lowlevel_init.S @@ -8,7 +8,6 @@ */ #include <config.h> -#include <version.h> /* Set up the platform, once the cpu has been initialized */ .globl lowlevel_init diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig index 7d5e7bee8b..f5693aebac 100644 --- a/board/armltd/vexpress64/Kconfig +++ b/board/armltd/vexpress64/Kconfig @@ -1,16 +1,3 @@ -if TARGET_VEXPRESS64_AEMV8A - -config SYS_BOARD - default "vexpress64" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "vexpress_aemv8a" - -endif - if TARGET_VEXPRESS64_BASE_FVP config SYS_BOARD diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index de6286435d..13dd667436 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -11,10 +11,22 @@ #include <netdev.h> #include <asm/io.h> #include <linux/compiler.h> -#include <asm/semihosting.h> +#include <dm/platdata.h> +#include <dm/platform_data/serial_pl01x.h> DECLARE_GLOBAL_DATA_PTR; +static const struct pl01x_serial_platdata serial_platdata = { + .base = V2M_UART0, + .type = TYPE_PL011, + .clock = 2400 * 1000, +}; + +U_BOOT_DEVICE(vexpress_serials) = { + .name = "serial_pl01x", + .platdata = &serial_platdata, +}; + int board_init(void) { return 0; @@ -33,101 +45,6 @@ void reset_cpu(ulong addr) { } -#ifdef CONFIG_BOARD_LATE_INIT -int board_late_init(void) -{ -#ifdef CONFIG_SEMIHOSTING - /* - * Please refer to doc/README.semihosting for a more complete - * description. - * - * We require that the board include file defines these env variables: - * - kernel_name - * - kernel_addr_r - * - initrd_name - * - initrd_addr_r - * - fdt_name - * - fdt_addr_r - * - * For the "fdt chosen" startup macro, this code will then define: - * - initrd_end (based on initrd_addr_r plus actual initrd_size) - * - * We will then load the kernel, initrd, and fdt into the specified - * locations in memory in a similar way that the ATF fastmodel code - * uses semihosting calls to load other boot stages and u-boot itself. - */ - - /* Env variable strings */ - char *kernel_name = getenv("kernel_name"); - char *kernel_addr_str = getenv("kernel_addr_r"); - char *initrd_name = getenv("initrd_name"); - char *initrd_addr_str = getenv("initrd_addr_r"); - char *fdt_name = getenv("fdt_name"); - char *fdt_addr_str = getenv("fdt_addr_r"); - char initrd_end_str[64]; - - /* Actual addresses converted from env variables */ - void *kernel_addr_r; - void *initrd_addr_r; - void *fdt_addr_r; - - /* Actual initrd base and size */ - unsigned long initrd_base; - unsigned long initrd_size; - - /* Space available */ - int avail; - - /* Make sure the environment variables needed are set */ - if (!(kernel_addr_str && initrd_addr_str && fdt_addr_str)) { - printf("%s: Define {kernel/initrd/fdt}_addr_r\n", __func__); - return -1; - } - if (!(kernel_name && initrd_name && fdt_name)) { - printf("%s: Define {kernel/initrd/fdt}_name\n", __func__); - return -1; - } - - /* Get exact initrd_size */ - initrd_size = smh_len(initrd_name); - if (initrd_size == -1) { - printf("%s: Can't get file size for \'%s\'\n", __func__, - initrd_name); - return -1; - } - - /* Set initrd_end */ - initrd_base = simple_strtoul(initrd_addr_str, NULL, 16); - initrd_addr_r = (void *)initrd_base; - sprintf(initrd_end_str, "0x%lx", initrd_base + initrd_size - 1); - setenv("initrd_end", initrd_end_str); - - /* Load kernel to memory */ - fdt_addr_r = (void *)simple_strtoul(fdt_addr_str, NULL, 16); - kernel_addr_r = (void *)simple_strtoul(kernel_addr_str, NULL, 16); - - /* - * The kernel must be lower in memory than fdt and loading the - * kernel must not trample the fdt or vice versa. - */ - avail = fdt_addr_r - kernel_addr_r; - if (avail < 0) { - printf("%s: fdt must be after kernel\n", __func__); - return -1; - } - smh_load(kernel_name, kernel_addr_r, avail, 1); - - /* Load fdt to memory */ - smh_load(fdt_name, fdt_addr_r, 0x20000, 1); - - /* Load initrd to memory */ - smh_load(initrd_name, initrd_addr_r, initrd_size, 1); - -#endif /* CONFIG_SEMIHOSTING */ - return 0; -} -#endif /* CONFIG_BOARD_LATE_INIT */ - /* * Board specific ethernet initialization routine. */ diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index b807ef9a42..4289179ee6 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -8,6 +8,7 @@ #include <common.h> #include <asm/io.h> +#include <asm/arch/clk.h> #include <asm/arch/at91sam9g45_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> @@ -15,6 +16,7 @@ #include <asm/arch/gpio.h> #include <asm/arch/clk.h> #include <lcd.h> +#include <linux/mtd/nand.h> #include <atmel_lcdc.h> #include <atmel_mci.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) @@ -71,6 +73,84 @@ void at91sam9m10g45ek_nand_hw_init(void) } #endif +#if defined(CONFIG_SPL_BUILD) +#include <spl.h> +#include <nand.h> + +void at91_spl_board_init(void) +{ + /* + * On the at91sam9m10g45ek board, the chip wm9711 stays in the + * test mode, so it needs do some action to exit test mode. + */ + at91_periph_clk_enable(ATMEL_ID_PIODE); + at91_set_gpio_output(AT91_PIN_PD7, 0); + at91_set_gpio_output(AT91_PIN_PD8, 0); + at91_set_pio_pullup(AT91_PIO_PORTD, 7, 1); + at91_set_pio_pullup(AT91_PIO_PORTD, 8, 1); + +#ifdef CONFIG_SYS_USE_MMC + at91_mci_hw_init(); +#elif CONFIG_SYS_USE_NANDFLASH + at91sam9m10g45ek_nand_hw_init(); +#endif +} + +#include <asm/arch/atmel_mpddrc.h> +static void ddr2_conf(struct atmel_mpddr *ddr2) +{ + ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); + + ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | + ATMEL_MPDDRC_CR_NR_ROW_14 | + ATMEL_MPDDRC_CR_DQMS_SHARED | + ATMEL_MPDDRC_CR_CAS_DDR_CAS3); + + ddr2->rtr = 0x24b; + + ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */ + 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |/* 2*7.5 = 15 ns */ + 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */ + 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | /* 8*7.5 = 60 ns */ + 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | /* 2*7.5 = 15 ns */ + 1 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | /* 1*7.5= 7.5 ns*/ + 1 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | /* 1 clk cycle */ + 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); /* 2 clk cycles */ + + ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ + 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET | + 16 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET | + 14 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET); + + ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | + 0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET | + 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET | + 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET); +} + +void mem_init(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; + struct atmel_mpddr ddr2; + unsigned long csa; + + ddr2_conf(&ddr2); + + /* enable DDR2 clock */ + writel(0x4, &pmc->scer); + + /* Chip select 1 is for DDR2/SDRAM */ + csa = readl(&mat->ebicsa); + csa |= AT91_MATRIX_EBI_CS1A_SDRAMC; + csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V; + writel(csa, &mat->ebicsa); + + /* DDRAM2 Controller initialize */ + ddr2_init(ATMEL_BASE_CS6, &ddr2); +} +#endif + #ifdef CONFIG_CMD_USB static void at91sam9m10g45ek_usb_hw_init(void) { diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c index 9adc9920b4..4f46a03533 100644 --- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c +++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c @@ -257,3 +257,76 @@ int dram_init(void) CONFIG_SYS_SDRAM_SIZE); return 0; } + +#if defined(CONFIG_SPL_BUILD) +#include <spl.h> +#include <nand.h> + +void at91_spl_board_init(void) +{ +#ifdef CONFIG_SYS_USE_MMC + at91_mci_hw_init(); +#elif CONFIG_SYS_USE_NANDFLASH + at91sam9n12ek_nand_hw_init(); +#elif CONFIG_SYS_USE_SPIFLASH + at91_spi0_hw_init(1 << 4); +#endif +} + +#include <asm/arch/atmel_mpddrc.h> +static void ddr2_conf(struct atmel_mpddr *ddr2) +{ + ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); + + ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | + ATMEL_MPDDRC_CR_NR_ROW_13 | + ATMEL_MPDDRC_CR_CAS_DDR_CAS3 | + ATMEL_MPDDRC_CR_NB_8BANKS | + ATMEL_MPDDRC_CR_DECOD_INTERLEAVED); + + ddr2->rtr = 0x411; + + ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | + 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); + + ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | + 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET | + 19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET | + 18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET); + + ddr2->tpr2 = (2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | + 3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET | + 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET | + 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET); +} + +void mem_init(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; + struct atmel_mpddr ddr2; + unsigned long csa; + + ddr2_conf(&ddr2); + + /* enable DDR2 clock */ + writel(0x4, &pmc->scer); + + /* Chip select 1 is for DDR2/SDRAM */ + csa = readl(&matrix->ebicsa); + csa |= AT91_MATRIX_EBI_CS1A_SDRAMC; + csa &= ~AT91_MATRIX_EBI_DBPU_OFF; + csa |= AT91_MATRIX_EBI_DBPD_OFF; + csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL; + writel(csa, &matrix->ebicsa); + + /* DDRAM2 Controller initialize */ + ddr2_init(ATMEL_BASE_CS1, &ddr2); +} +#endif diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index 17a2a40b4b..114ac5c85a 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -293,3 +293,77 @@ int dram_init(void) CONFIG_SYS_SDRAM_SIZE); return 0; } + +#if defined(CONFIG_SPL_BUILD) +#include <spl.h> +#include <nand.h> + +void at91_spl_board_init(void) +{ +#ifdef CONFIG_SYS_USE_MMC + at91_mci_hw_init(); +#elif CONFIG_SYS_USE_NANDFLASH + at91sam9x5ek_nand_hw_init(); +#elif CONFIG_SYS_USE_SPIFLASH + at91_spi0_hw_init(1 << 4); +#endif +} + +#include <asm/arch/atmel_mpddrc.h> +static void ddr2_conf(struct atmel_mpddr *ddr2) +{ + ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); + + ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | + ATMEL_MPDDRC_CR_NR_ROW_13 | + ATMEL_MPDDRC_CR_CAS_DDR_CAS3 | + ATMEL_MPDDRC_CR_NB_8BANKS | + ATMEL_MPDDRC_CR_DECOD_INTERLEAVED); + + ddr2->rtr = 0x411; + + ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | + 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | + 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); + + ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | + 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET | + 19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET | + 18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET); + + ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | + 2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | + 3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET | + 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET | + 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET); +} + +void mem_init(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; + struct atmel_mpddr ddr2; + unsigned long csa; + + ddr2_conf(&ddr2); + + /* enable DDR2 clock */ + writel(0x4, &pmc->scer); + + /* Chip select 1 is for DDR2/SDRAM */ + csa = readl(&matrix->ebicsa); + csa |= AT91_MATRIX_EBI_CS1A_SDRAMC; + csa &= ~AT91_MATRIX_EBI_DBPU_OFF; + csa |= AT91_MATRIX_EBI_DBPD_OFF; + csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL; + writel(csa, &matrix->ebicsa); + + /* DDRAM2 Controller initialize */ + ddr2_init(ATMEL_BASE_CS1, &ddr2); +} +#endif diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c index e7f225a155..7d447fe76b 100644 --- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c +++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c @@ -24,6 +24,7 @@ #include <netdev.h> #include <nand.h> #include <spi.h> +#include <version.h> DECLARE_GLOBAL_DATA_PTR; @@ -179,6 +180,7 @@ void lcd_show_board_info(void) int i; char temp[32]; + lcd_printf("%s\n", U_BOOT_VERSION); lcd_printf("2014 ATMEL Corp\n"); lcd_printf("%s CPU at %s MHz\n", get_cpu_name(), strmhz(temp, get_cpu_clk_rate())); diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c index 46e504131c..e9bbb4b1c8 100644 --- a/board/atmel/sama5d4ek/sama5d4ek.c +++ b/board/atmel/sama5d4ek/sama5d4ek.c @@ -24,6 +24,7 @@ #include <netdev.h> #include <nand.h> #include <spi.h> +#include <version.h> DECLARE_GLOBAL_DATA_PTR; @@ -174,6 +175,7 @@ void lcd_show_board_info(void) int i; char temp[32]; + lcd_printf("%s\n", U_BOOT_VERSION); lcd_printf("2014 ATMEL Corp\n"); lcd_printf("at91@atmel.com\n"); lcd_printf("%s CPU at %s MHz\n", get_cpu_name(), diff --git a/board/birdland/bav335x/board.h b/board/birdland/bav335x/board.h index b598ce1e82..1ea681ec44 100644 --- a/board/birdland/bav335x/board.h +++ b/board/birdland/bav335x/board.h @@ -33,7 +33,7 @@ struct board_eeconfig { unsigned int magic; char name[HDR_NAME_LEN]; /* BAV3354 */ char version[4]; /* 0B20 - Rev.B2 */ - char serial[12]; + char serial[16]; char config[32]; char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN]; }; diff --git a/board/espt/lowlevel_init.S b/board/espt/lowlevel_init.S index c1d09663d4..ec9fb883f5 100644 --- a/board/espt/lowlevel_init.S +++ b/board/espt/lowlevel_init.S @@ -8,7 +8,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/freescale/m53017evb/u-boot.lds b/board/freescale/m53017evb/u-boot.lds index de8d09bf66..b1cae59890 100644 --- a/board/freescale/m53017evb/u-boot.lds +++ b/board/freescale/m53017evb/u-boot.lds @@ -13,8 +13,6 @@ SECTIONS .text : { arch/m68k/cpu/mcf532x/start.o (.text*) - arch/m68k/cpu/mcf532x/built-in.o (.text*) - arch/m68k/lib/built-in.o (.text*) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text*) diff --git a/board/htkw/mcx/MAINTAINERS b/board/htkw/mcx/MAINTAINERS index c5f88733d2..513d19daa7 100644 --- a/board/htkw/mcx/MAINTAINERS +++ b/board/htkw/mcx/MAINTAINERS @@ -1,5 +1,5 @@ MCX BOARD -M: Ilya Yanok <yanok@emcraft.com> +M: Anatolij Gustschin <agust@denx.de> S: Maintained F: board/htkw/mcx/ F: include/configs/mcx.h diff --git a/board/logicpd/imx27lite/lowlevel_init.S b/board/logicpd/imx27lite/lowlevel_init.S index c286d0dfe1..9cb702f30f 100644 --- a/board/logicpd/imx27lite/lowlevel_init.S +++ b/board/logicpd/imx27lite/lowlevel_init.S @@ -10,7 +10,6 @@ #include <config.h> -#include <version.h> #include <asm/macro.h> #include <asm/arch/imx-regs.h> #include <generated/asm-offsets.h> diff --git a/board/mpl/vcma9/lowlevel_init.S b/board/mpl/vcma9/lowlevel_init.S index ee9b7a9d3e..c0d6cc8923 100644 --- a/board/mpl/vcma9/lowlevel_init.S +++ b/board/mpl/vcma9/lowlevel_init.S @@ -13,8 +13,6 @@ #include <config.h> -#include <version.h> - /* register definitions */ diff --git a/board/ms7722se/lowlevel_init.S b/board/ms7722se/lowlevel_init.S index db859f48ad..a62404fdc1 100644 --- a/board/ms7722se/lowlevel_init.S +++ b/board/ms7722se/lowlevel_init.S @@ -11,7 +11,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/ms7750se/lowlevel_init.S b/board/ms7750se/lowlevel_init.S index c02306fb24..d61640df6c 100644 --- a/board/ms7750se/lowlevel_init.S +++ b/board/ms7750se/lowlevel_init.S @@ -10,7 +10,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 25480e481d..2d07001800 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -20,7 +20,7 @@ void gpio_early_init_uart(void) { /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ - gpio_request(GPIO_PI3, NULL); + gpio_request(GPIO_PI3, "uart_en"); gpio_direction_output(GPIO_PI3, 0); } #endif diff --git a/board/prodrive/alpr/nand.c b/board/prodrive/alpr/nand.c index 5427de5634..ca40cea9ad 100644 --- a/board/prodrive/alpr/nand.c +++ b/board/prodrive/alpr/nand.c @@ -93,19 +93,6 @@ static void alpr_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) } } -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE) -static int alpr_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) -{ - int i; - - for (i = 0; i < len; i++) - if (buf[i] != readb(&(alpr_ndfc->data))) - return i; - - return 0; -} -#endif - static int alpr_nand_dev_ready(struct mtd_info *mtd) { /* @@ -130,9 +117,6 @@ int board_nand_init(struct nand_chip *nand) nand->read_byte = alpr_nand_read_byte; nand->write_buf = alpr_nand_write_buf; nand->read_buf = alpr_nand_read_buf; -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE) - nand->verify_buf = alpr_nand_verify_buf; -#endif nand->dev_ready = alpr_nand_dev_ready; return 0; diff --git a/board/raspberrypi/rpi/Kconfig b/board/raspberrypi/rpi/Kconfig deleted file mode 100644 index 6a538cfac5..0000000000 --- a/board/raspberrypi/rpi/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_RPI - -config SYS_BOARD - default "rpi" - -config SYS_VENDOR - default "raspberrypi" - -config SYS_SOC - default "bcm2835" - -config SYS_CONFIG_NAME - default "rpi" - -endif diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 50a699bb9e..96fe870645 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -165,6 +165,16 @@ static const struct { "bcm2835-rpi-a-plus.dtb", false, }, + [BCM2835_BOARD_REV_B_PLUS_13] = { + "Model B+", + "bcm2835-rpi-b-plus.dtb", + true, + }, + [BCM2835_BOARD_REV_CM_14] = { + "Compute Module", + "bcm2835-rpi-cm.dtb", + false, + }, #endif }; @@ -278,10 +288,17 @@ static void get_board_rev(void) * https://github.com/pimoroni/RPi.version/blob/master/RPi/version.py * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=99293&p=690282 * (a few posts down) + * + * For the RPi 1, bit 24 is the "warranty bit", so we mask off just the + * lower byte to use as the board rev: + * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=98367&start=250 + * http://www.raspberrypi.org/forums/viewtopic.php?f=31&t=20594 */ rpi_board_rev = msg->get_board_rev.body.resp.rev; if (rpi_board_rev & 0x800000) rpi_board_rev = (rpi_board_rev >> 4) & 0xff; + else + rpi_board_rev &= 0xff; if (rpi_board_rev >= ARRAY_SIZE(models)) { printf("RPI: Board rev %u outside known range\n", rpi_board_rev); diff --git a/board/raspberrypi/rpi_2/Kconfig b/board/raspberrypi/rpi_2/Kconfig deleted file mode 100644 index 032184d5ad..0000000000 --- a/board/raspberrypi/rpi_2/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_RPI_2 - -config SYS_BOARD - default "rpi_2" - -config SYS_VENDOR - default "raspberrypi" - -config SYS_SOC - default "bcm2835" - -config SYS_CONFIG_NAME - default "rpi_2" - -endif diff --git a/board/renesas/MigoR/lowlevel_init.S b/board/renesas/MigoR/lowlevel_init.S index 63ea70aa37..322e17779e 100644 --- a/board/renesas/MigoR/lowlevel_init.S +++ b/board/renesas/MigoR/lowlevel_init.S @@ -11,7 +11,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/ap325rxa/lowlevel_init.S b/board/renesas/ap325rxa/lowlevel_init.S index ead5310a4b..867ca51225 100644 --- a/board/renesas/ap325rxa/lowlevel_init.S +++ b/board/renesas/ap325rxa/lowlevel_init.S @@ -8,7 +8,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/ecovec/lowlevel_init.S b/board/renesas/ecovec/lowlevel_init.S index e4c40c8616..ab604c7fef 100644 --- a/board/renesas/ecovec/lowlevel_init.S +++ b/board/renesas/ecovec/lowlevel_init.S @@ -8,7 +8,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> #include <configs/ecovec.h> diff --git a/board/renesas/r0p7734/lowlevel_init.S b/board/renesas/r0p7734/lowlevel_init.S index 62668a76b9..c2fa5656a4 100644 --- a/board/renesas/r0p7734/lowlevel_init.S +++ b/board/renesas/r0p7734/lowlevel_init.S @@ -5,7 +5,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/r2dplus/lowlevel_init.S b/board/renesas/r2dplus/lowlevel_init.S index f3392f097d..33f6e07826 100644 --- a/board/renesas/r2dplus/lowlevel_init.S +++ b/board/renesas/r2dplus/lowlevel_init.S @@ -5,7 +5,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/r7780mp/lowlevel_init.S b/board/renesas/r7780mp/lowlevel_init.S index 471af1d967..b27fe29143 100644 --- a/board/renesas/r7780mp/lowlevel_init.S +++ b/board/renesas/r7780mp/lowlevel_init.S @@ -7,7 +7,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/rsk7203/lowlevel_init.S b/board/renesas/rsk7203/lowlevel_init.S index c8494ccf38..ee472a42ba 100644 --- a/board/renesas/rsk7203/lowlevel_init.S +++ b/board/renesas/rsk7203/lowlevel_init.S @@ -5,7 +5,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/rsk7264/lowlevel_init.S b/board/renesas/rsk7264/lowlevel_init.S index 1a7d27d179..eae270377f 100644 --- a/board/renesas/rsk7264/lowlevel_init.S +++ b/board/renesas/rsk7264/lowlevel_init.S @@ -8,7 +8,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/rsk7269/lowlevel_init.S b/board/renesas/rsk7269/lowlevel_init.S index a2b174bbc1..120bc6b325 100644 --- a/board/renesas/rsk7269/lowlevel_init.S +++ b/board/renesas/rsk7269/lowlevel_init.S @@ -9,7 +9,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/sh7752evb/lowlevel_init.S b/board/renesas/sh7752evb/lowlevel_init.S index 5643a697eb..cc8b8c0aca 100644 --- a/board/renesas/sh7752evb/lowlevel_init.S +++ b/board/renesas/sh7752evb/lowlevel_init.S @@ -5,7 +5,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/sh7753evb/lowlevel_init.S b/board/renesas/sh7753evb/lowlevel_init.S index 21987a51e8..98551e1055 100644 --- a/board/renesas/sh7753evb/lowlevel_init.S +++ b/board/renesas/sh7753evb/lowlevel_init.S @@ -5,7 +5,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/sh7757lcr/lowlevel_init.S b/board/renesas/sh7757lcr/lowlevel_init.S index e4c5ea815e..6db26d9450 100644 --- a/board/renesas/sh7757lcr/lowlevel_init.S +++ b/board/renesas/sh7757lcr/lowlevel_init.S @@ -5,7 +5,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/sh7763rdp/lowlevel_init.S b/board/renesas/sh7763rdp/lowlevel_init.S index e45fbbe9c7..e8e3d6fae3 100644 --- a/board/renesas/sh7763rdp/lowlevel_init.S +++ b/board/renesas/sh7763rdp/lowlevel_init.S @@ -9,7 +9,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/renesas/sh7785lcr/lowlevel_init.S b/board/renesas/sh7785lcr/lowlevel_init.S index 8b729ac392..4bda38cfad 100644 --- a/board/renesas/sh7785lcr/lowlevel_init.S +++ b/board/renesas/sh7785lcr/lowlevel_init.S @@ -4,7 +4,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/samsung/goni/lowlevel_init.S b/board/samsung/goni/lowlevel_init.S index d52bc09f8d..fdb83e457a 100644 --- a/board/samsung/goni/lowlevel_init.S +++ b/board/samsung/goni/lowlevel_init.S @@ -8,7 +8,6 @@ */ #include <config.h> -#include <version.h> #include <asm/arch/cpu.h> #include <asm/arch/clock.h> #include <asm/arch/power.h> diff --git a/board/samsung/smdk2410/lowlevel_init.S b/board/samsung/smdk2410/lowlevel_init.S index 5de04f10e9..c3f41875de 100644 --- a/board/samsung/smdk2410/lowlevel_init.S +++ b/board/samsung/smdk2410/lowlevel_init.S @@ -13,8 +13,6 @@ #include <config.h> -#include <version.h> - /* some parameters for the board */ diff --git a/board/samsung/smdk5420/MAINTAINERS b/board/samsung/smdk5420/MAINTAINERS index 1423f83995..a26ea689f2 100644 --- a/board/samsung/smdk5420/MAINTAINERS +++ b/board/samsung/smdk5420/MAINTAINERS @@ -8,3 +8,9 @@ F: include/configs/smdk5420.h F: configs/smdk5420_defconfig F: include/configs/peach-pi.h F: configs/peach-pi_defconfig + +ODROID-XU3 BOARD +M: Przemyslaw Marczak <p.marczak@samsung.com> +S: Maintained +F: board/samsung/smdk5420/ +F: include/configs/odroid_xu3.h diff --git a/board/samsung/smdk5420/smdk5420.c b/board/samsung/smdk5420/smdk5420.c index 1aca9fabd9..82f607b24d 100644 --- a/board/samsung/smdk5420/smdk5420.c +++ b/board/samsung/smdk5420/smdk5420.c @@ -58,16 +58,6 @@ void exynos_lcd_power_on(void) mdelay(5); - /* TODO(ajaykumar.rs@samsung.com): Use device tree */ - gpio_request(EXYNOS5420_GPIO_X35, "edp_slp#"); - gpio_direction_output(EXYNOS5420_GPIO_X35, 1); /* EDP_SLP# */ - mdelay(10); - gpio_request(EXYNOS5420_GPIO_Y77, "edp_rst#"); - gpio_direction_output(EXYNOS5420_GPIO_Y77, 1); /* EDP_RST# */ - gpio_request(EXYNOS5420_GPIO_X26, "edp_hpd"); - gpio_direction_input(EXYNOS5420_GPIO_X26); /* EDP_HPD */ - gpio_set_pull(EXYNOS5420_GPIO_X26, S5P_GPIO_PULL_NONE); - if (has_edp_bridge()) if (parade_init(gd->fdt_blob)) printf("%s: ps8625_init() failed\n", __func__); @@ -75,11 +65,6 @@ void exynos_lcd_power_on(void) void exynos_backlight_on(unsigned int onoff) { - /* For PWM */ - gpio_request(EXYNOS5420_GPIO_B20, "backlight_on"); - gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(0x1)); - gpio_set_value(EXYNOS5420_GPIO_B20, 1); - #ifdef CONFIG_POWER_TPS65090 tps65090_fet_enable(1); #endif diff --git a/board/samsung/smdkc100/lowlevel_init.S b/board/samsung/smdkc100/lowlevel_init.S index 65e6b7a73a..91e5357691 100644 --- a/board/samsung/smdkc100/lowlevel_init.S +++ b/board/samsung/smdkc100/lowlevel_init.S @@ -7,7 +7,6 @@ */ #include <config.h> -#include <version.h> #include <asm/arch/cpu.h> #include <asm/arch/power.h> diff --git a/board/samsung/trats/setup.h b/board/samsung/trats/setup.h index 2f5ccb14c6..990e5e2dff 100644 --- a/board/samsung/trats/setup.h +++ b/board/samsung/trats/setup.h @@ -11,7 +11,6 @@ #define _TRATS_SETUP_H #include <config.h> -#include <version.h> #include <asm/arch/cpu.h> /* CLK_SRC_CPU: APLL(1), MPLL(1), CORE(0), HPM(0) */ diff --git a/board/scb9328/lowlevel_init.S b/board/scb9328/lowlevel_init.S index 2475ae8efb..d5727248db 100644 --- a/board/scb9328/lowlevel_init.S +++ b/board/scb9328/lowlevel_init.S @@ -5,7 +5,6 @@ */ #include <config.h> -#include <version.h> #include <asm/arch/imx-regs.h> .globl lowlevel_init diff --git a/board/shmin/lowlevel_init.S b/board/shmin/lowlevel_init.S index 35c0945196..53b3123849 100644 --- a/board/shmin/lowlevel_init.S +++ b/board/shmin/lowlevel_init.S @@ -5,7 +5,6 @@ */ #include <config.h> -#include <version.h> #include <asm/processor.h> #include <asm/macro.h> diff --git a/board/socrates/nand.c b/board/socrates/nand.c index 73944780bf..15e6ea6944 100644 --- a/board/socrates/nand.c +++ b/board/socrates/nand.c @@ -18,9 +18,6 @@ static void sc_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len); static u_char sc_nand_read_byte(struct mtd_info *mtd); static u16 sc_nand_read_word(struct mtd_info *mtd); static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len); -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE) -static int sc_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len); -#endif static int sc_nand_device_ready(struct mtd_info *mtdinfo); #define FPGA_NAND_CMD_MASK (0x7 << 28) @@ -102,25 +99,6 @@ static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) } } -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE) -/** - * sc_nand_verify_buf - Verify chip data against buffer - * @mtd: MTD device structure - * @buf: buffer containing the data to compare - * @len: number of bytes to compare - */ -static int sc_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) -{ - int i; - - for (i = 0; i < len; i++) { - if (buf[i] != sc_nand_read_byte(mtd)); - return -EFAULT; - } - return 0; -} -#endif - /** * sc_nand_device_ready - Check the NAND device is ready for next command. * @mtd: MTD device structure @@ -178,9 +156,6 @@ int board_nand_init(struct nand_chip *nand) nand->read_word = sc_nand_read_word; nand->write_buf = sc_nand_write_buf; nand->read_buf = sc_nand_read_buf; -#if defined(CONFIG_MTD_NAND_VERIFY_WRITE) - nand->verify_buf = sc_nand_verify_buf; -#endif return 0; } diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 9d0eb91977..2fcab602db 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -132,6 +132,10 @@ endchoice endif +config SYS_CLK_FREQ + default 912000000 if MACH_SUN7I + default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I + config SYS_CONFIG_NAME default "sun4i" if MACH_SUN4I default "sun5i" if MACH_SUN5I diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index ef3c93711b..be4821360f 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -21,6 +21,7 @@ F: configs/A13-OLinuXinoM_defconfig F: configs/Auxtek-T004_defconfig F: configs/mk802_a10s_defconfig F: configs/r7-tv-dongle_defconfig +F: configs/UTOO_P66_defconfig F: include/configs/sun6i.h F: configs/CSQ_CS908_defconfig F: configs/Mele_M9_defconfig diff --git a/board/sunxi/board.c b/board/sunxi/board.c index e1891d198e..808bf82b65 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -215,7 +215,7 @@ void sunxi_board_init(void) * assured it's being powered with suitable core voltage */ if (!power_failed) - clock_set_pll1(CONFIG_CLK_FULL_SPEED); + clock_set_pll1(CONFIG_SYS_CLK_FREQ); else printf("Failed to set core voltage! Can't set CPU frequency\n"); } diff --git a/board/synopsys/axs101/axs101.c b/board/synopsys/axs101/axs101.c index d1271ffcca..8c16410944 100644 --- a/board/synopsys/axs101/axs101.c +++ b/board/synopsys/axs101/axs101.c @@ -9,6 +9,7 @@ #include <malloc.h> #include <netdev.h> #include <phy.h> +#include "axs10x.h" DECLARE_GLOBAL_DATA_PTR; @@ -27,9 +28,9 @@ int board_mmc_init(bd_t *bis) host->ioaddr = (void *)ARC_DWMMC_BASE; host->buswidth = 4; host->dev_index = 0; - host->bus_hz = 25000000; + host->bus_hz = 50000000; - add_dwmci(host, 52000000, 400000); + add_dwmci(host, host->bus_hz, 400000); return 0; } @@ -42,3 +43,16 @@ int board_eth_init(bd_t *bis) return 0; } + + +#define AXS_MB_CREG 0xE0011000 + +int board_early_init_f(void) +{ + if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28)) + gd->board_type = AXS_MB_V3; + else + gd->board_type = AXS_MB_V2; + + return 0; +} diff --git a/board/synopsys/axs101/axs10x.h b/board/synopsys/axs101/axs10x.h new file mode 100644 index 0000000000..8e8c41f865 --- /dev/null +++ b/board/synopsys/axs101/axs10x.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2015 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BOARD_SYNOPSYS_AXS10X_H +#define _BOARD_SYNOPSYS_AXS10X_H + +enum { + AXS_MB_V2, + AXS_MB_V3 +}; + +#endif /* _BOARD_SYNOPSYS_AXS10X_H */ + diff --git a/board/synopsys/axs101/nand.c b/board/synopsys/axs101/nand.c index ff35286c6e..4be52e22c0 100644 --- a/board/synopsys/axs101/nand.c +++ b/board/synopsys/axs101/nand.c @@ -9,6 +9,9 @@ #include <malloc.h> #include <nand.h> #include <asm/io.h> +#include "axs10x.h" + +DECLARE_GLOBAL_DATA_PTR; #define BUS_WIDTH 8 /* AXI data bus width in bytes */ @@ -232,5 +235,9 @@ int board_nand_init(struct nand_chip *nand) nand->write_buf = axs101_nand_write_buf; nand->read_buf = axs101_nand_read_buf; + /* MBv3 has NAND IC with 16-bit data bus */ + if (gd->board_type == AXS_MB_V3) + nand->options |= NAND_BUSWIDTH_16; + return 0; } diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig index 722f9d57c4..7cb006f99c 100644 --- a/board/ti/am335x/Kconfig +++ b/board/ti/am335x/Kconfig @@ -47,10 +47,4 @@ config DM_GPIO config DM_SERIAL default y if DM -config SYS_MALLOC_F - default y if DM - -config SYS_MALLOC_F_LEN - default 0x400 if DM - endif diff --git a/board/toradex/colibri_t20-common/colibri_t20-common.h b/board/toradex/colibri_t20-common/colibri_t20-common.h deleted file mode 100644 index 1fe53f6073..0000000000 --- a/board/toradex/colibri_t20-common/colibri_t20-common.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Copyright (C) 2012 Lucas Stach - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -void colibri_t20_common_pin_mux_usb(void); diff --git a/board/toradex/colibri_t20_iris/Kconfig b/board/toradex/colibri_t20/Kconfig index 4bf727809e..7f373b2d26 100644 --- a/board/toradex/colibri_t20_iris/Kconfig +++ b/board/toradex/colibri_t20/Kconfig @@ -1,12 +1,12 @@ -if TARGET_COLIBRI_T20_IRIS +if TARGET_COLIBRI_T20 config SYS_BOARD - default "colibri_t20_iris" + default "colibri_t20" config SYS_VENDOR default "toradex" config SYS_CONFIG_NAME - default "colibri_t20_iris" + default "colibri_t20" endif diff --git a/board/toradex/colibri_t20/MAINTAINERS b/board/toradex/colibri_t20/MAINTAINERS new file mode 100644 index 0000000000..b251c000fe --- /dev/null +++ b/board/toradex/colibri_t20/MAINTAINERS @@ -0,0 +1,7 @@ +COLIBRI_T20 +M: Lucas Stach <dev@lynxeye.de> +S: Maintained +F: board/toradex/colibri_t20/ +F: include/configs/colibri_t20.h +F: configs/colibri_t20_defconfig +F: arch/arm/dts/tegra20-colibri.dtb diff --git a/board/toradex/colibri_t20/Makefile b/board/toradex/colibri_t20/Makefile new file mode 100644 index 0000000000..86f78d9d9d --- /dev/null +++ b/board/toradex/colibri_t20/Makefile @@ -0,0 +1,9 @@ +# +# (C) Copyright 2012 Lucas Stach +# +# SPDX-License-Identifier: GPL-2.0+ +# + +include $(srctree)/board/nvidia/common/common.mk + +obj-y += colibri_t20.o diff --git a/board/toradex/colibri_t20-common/colibri_t20-common.c b/board/toradex/colibri_t20/colibri_t20.c index 58a9916f0a..8ae9ccf538 100644 --- a/board/toradex/colibri_t20-common/colibri_t20-common.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -9,27 +9,57 @@ #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/board.h> +#include <asm/gpio.h> -#include "colibri_t20-common.h" +#ifdef CONFIG_TEGRA_MMC +/* + * Routine: pin_mux_mmc + * Description: setup the pin muxes/tristate values for the SDMMC(s) + */ +void pin_mux_mmc(void) +{ + funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); + pinmux_tristate_disable(PMUX_PINGRP_GMB); +} +#endif + +#ifdef CONFIG_TEGRA_NAND +void pin_mux_nand(void) +{ + funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT); + + /* + * configure pingroup ATC to something unrelated to + * avoid ATC overriding KBC + */ + pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI); +} +#endif #ifdef CONFIG_USB_EHCI_TEGRA -void colibri_t20_common_pin_mux_usb(void) +void pin_mux_usb(void) { /* module internal USB bus to connect ethernet chipset */ funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); + /* ULPI reference clock output */ pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); pinmux_tristate_disable(PMUX_PINGRP_CDEV2); + /* PHY reset GPIO */ pinmux_tristate_disable(PMUX_PINGRP_UAC); + /* VBus GPIO */ pinmux_tristate_disable(PMUX_PINGRP_DTE); -} -#endif -#ifdef CONFIG_TEGRA_NAND -void pin_mux_nand(void) -{ - funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT); + /* Reset ASIX using LAN_RESET */ + gpio_request(GPIO_PV4, "LAN_RESET"); + gpio_direction_output(GPIO_PV4, 0); + pinmux_tristate_disable(PMUX_PINGRP_GPV); + udelay(5); + gpio_set_value(GPIO_PV4, 1); + + /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */ + pinmux_tristate_disable(PMUX_PINGRP_SPIG); } #endif diff --git a/board/toradex/colibri_t20_iris/MAINTAINERS b/board/toradex/colibri_t20_iris/MAINTAINERS deleted file mode 100644 index c68955bfa9..0000000000 --- a/board/toradex/colibri_t20_iris/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -COLIBRI_T20_IRIS BOARD -M: Lucas Stach <dev@lynxeye.de> -S: Maintained -F: board/toradex/colibri_t20_iris/ -F: include/configs/colibri_t20_iris.h -F: configs/colibri_t20_iris_defconfig diff --git a/board/toradex/colibri_t20_iris/Makefile b/board/toradex/colibri_t20_iris/Makefile deleted file mode 100644 index ebeac70ea1..0000000000 --- a/board/toradex/colibri_t20_iris/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2012 Lucas Stach -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := ../../nvidia/common/board.o -obj-y += ../colibri_t20-common/colibri_t20-common.o -obj-y += colibri_t20_iris.o diff --git a/board/toradex/colibri_t20_iris/colibri_t20_iris.c b/board/toradex/colibri_t20_iris/colibri_t20_iris.c deleted file mode 100644 index 49c74f34f1..0000000000 --- a/board/toradex/colibri_t20_iris/colibri_t20_iris.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (C) 2012 Lucas Stach - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/gpio.h> -#include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> -#include <asm/arch/pinmux.h> -#include <asm/arch-tegra/board.h> - -#include "../colibri_t20-common/colibri_t20-common.h" - -#ifdef CONFIG_USB_EHCI_TEGRA -void pin_mux_usb(void) -{ - colibri_t20_common_pin_mux_usb(); - - /* USB 1 aka Tegra USB port 3 VBus*/ - pinmux_tristate_disable(PMUX_PINGRP_SPIG); -} -#endif - -#ifdef CONFIG_TEGRA_MMC -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -void pin_mux_mmc(void) -{ - funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); - pinmux_tristate_disable(PMUX_PINGRP_GMB); -} -#endif diff --git a/board/work-microwave/work_92105/Kconfig b/board/work-microwave/work_92105/Kconfig new file mode 100644 index 0000000000..74f004f53c --- /dev/null +++ b/board/work-microwave/work_92105/Kconfig @@ -0,0 +1,15 @@ +if TARGET_WORK_92105 + +config SYS_BOARD + default "work_92105" + +config SYS_VENDOR + default "work-microwave" + +config SYS_SOC + default "lpc32xx" + +config SYS_CONFIG_NAME + default "work_92105" + +endif diff --git a/board/work-microwave/work_92105/MAINTAINERS b/board/work-microwave/work_92105/MAINTAINERS new file mode 100644 index 0000000000..29a92c5ffe --- /dev/null +++ b/board/work-microwave/work_92105/MAINTAINERS @@ -0,0 +1,6 @@ +WORK_92105 BOARD +M: Albert ARIBAUD <albert.aribaud@3adev.fr> +S: Maintained +F: board/work-microwave/work_92105/ +F: include/configs/work_92105.h +F: configs/work_92105_defconfig diff --git a/board/work-microwave/work_92105/Makefile b/board/work-microwave/work_92105/Makefile new file mode 100644 index 0000000000..ba31c8e4f4 --- /dev/null +++ b/board/work-microwave/work_92105/Makefile @@ -0,0 +1,10 @@ +# +# (C) Copyright 2014 DENX Software Engineering GmbH +# Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := work_92105.o work_92105_display.o + +obj-$(CONFIG_SPL_BUILD) += work_92105_spl.o diff --git a/board/work-microwave/work_92105/README b/board/work-microwave/work_92105/README new file mode 100644 index 0000000000..3c256e0b2c --- /dev/null +++ b/board/work-microwave/work_92105/README @@ -0,0 +1,91 @@ +Work_92105 from Work Microwave is an LPC3250- based board with the +following features: + + - 64MB SDR DRAM + - 1 GB SLC NAND, managed through MLC controller. + - Ethernet + - Ethernet + PHY SMSC8710 + - I2C: + - EEPROM (24M01-compatible) + - RTC (DS1374-compatible) + - Temperature sensor (DS620) + - DACs (2 x MAX518) + - SPI (through SSP interface) + - Port expander MAX6957 + - LCD display (HD44780-compatible), controlled + through the port expander and DACs + +Standard SPL and U-Boot binaries +-------------------------------- + +The default 'make' (or the 'make all') command will produce the +following files: + +1. spl/u-boot-spl.bin SPL, intended to run from SRAM at address 0. + This file can be loaded in SRAM through a JTAG + debugger or through the LPC32XX Service Boot + mechanism. + +2. u-boot.bin The raw U-Boot image, which can be loaded in + DDR through a JTAG debugger (for instance by + breaking SPL after DDR init), or by a running + U-Boot through e.g. 'loady' or 'tftp' and then + executed with 'go'. + +3. u-boot.img A U-Boot image with a mkimage header prepended. + SPL assumes (even when loaded through JTAG or + Service Boot) that such an image will be found + at offset 0x00040000 in NAND. + +NAND cold-boot binaries +----------------------- + +The board can boot entirely from power-on with only SPL and U-Boot in +NAND. The LPC32XX-specific 'make lpc32xx-full.bin' command will produce +(in addition to spl/u-boot-spl.bin and u-boot.img if they were not made +already) the following files: + +4. lpc32xx-spl.img spl/u-boot-spl.bin, with a LPC32XX boot header + prepended. This header is required for the ROM + code to load SPL into SRAM and branch into it. + The content of this file is expected to reside + in NAND at addresses 0x00000000 and 0x00020000 + (two copies). + +5. lpc32xx-boot-0.bin lpc32xx-spl.img, padded with 0xFF bytes to a + size of 0x20000 bytes. This file covers exactly + the reserved area for the first bootloader copy + in NAND. + +6. lpc32xx-boot-1.bin Same as lpc32xx-boot-0.bin. This is intended to + be used as the second bootloader copy. + +7. lpc32xx-full.bin lpc32xx-boot-0.bin, lpc32xx-boot-1.bin and + u-boot.img concatenated. This file represents + the content of whole bootloader as present in + NAND at offset 00x00000000. + +Flashing instructions +--------------------- + +The following assumes a working U-Boot on the target, with the ability +to load files into DDR. + +To update the whole bootloader: + + nand erase 0x00000000 0x80000 + (load lpc32xx-full.bin at location $loadaddr) + nand write $loadaddr 0x00000000 $filesize + +To update SPL only (note the double nand write) : + + nand erase 0x00000000 0x40000 + (load lpc32xx-spl.img or lpc32xx-boot-N.bin at location $loadaddr) + nand write $loadaddr 0x00000000 $filesize + nand write $loadaddr 0x00020000 $filesize + +To update U-Boot only: + + nand erase 0x00040000 0x40000 + (load u-boot.img at location $loadaddr) + nand write $loadaddr 0x00040000 $filesize diff --git a/board/work-microwave/work_92105/work_92105.c b/board/work-microwave/work_92105/work_92105.c new file mode 100644 index 0000000000..f782284d60 --- /dev/null +++ b/board/work-microwave/work_92105/work_92105.c @@ -0,0 +1,77 @@ +/* + * WORK Microwave work_92105 board support + * + * (C) Copyright 2014 DENX Software Engineering GmbH + * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/cpu.h> +#include <asm/arch/clk.h> +#include <asm/arch/emc.h> +#include <asm/arch/wdt.h> +#include <asm/gpio.h> +#include <spl.h> +#include "work_92105_display.h" + +DECLARE_GLOBAL_DATA_PTR; + +static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE; +static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE; + +void reset_periph(void) +{ + setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG); + writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl); + udelay(150); + writel(0, &wdt->mctrl); + clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG); +} + +int board_early_init_f(void) +{ + /* initialize serial port for console */ + lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART); + /* enable I2C, SSP, MAC, NAND */ + lpc32xx_i2c_init(1); /* only I2C1 has devices, I2C2 has none */ + lpc32xx_ssp_init(); + lpc32xx_mac_init(); + lpc32xx_mlc_nand_init(); + /* Display must wait until after relocation and devices init */ + return 0; +} + +#define GPO_19 115 + +int board_early_init_r(void) +{ + /* Set NAND !WP to 1 through GPO_19 */ + gpio_request(GPO_19, "NAND_nWP"); + gpio_direction_output(GPO_19, 1); + + /* initialize display */ + work_92105_display_init(); + + return 0; +} + +int board_init(void) +{ + reset_periph(); + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + + return 0; +} diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c new file mode 100644 index 0000000000..c8b10131f9 --- /dev/null +++ b/board/work-microwave/work_92105/work_92105_display.c @@ -0,0 +1,349 @@ +/* + * work_92105 display support + * + * (C) Copyright 2014 DENX Software Engineering GmbH + * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> + * + * The work_92105 display is a HD44780-compatible module + * controlled through a MAX6957AAX SPI port expander, two + * MAX518 I2C DACs and native LPC32xx GPO 15. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/cpu.h> +#include <asm/arch/emc.h> +#include <asm/gpio.h> +#include <spi.h> +#include <i2c.h> +#include <version.h> +#include <vsprintf.h> + +/* + * GPO 15 in port 3 is gpio 3*32+15 = 111 + */ + +#define GPO_15 111 + +/** + * MAX6957AAX registers that we will be using + */ + +#define MAX6957_CONF 0x04 + +#define MAX6957_CONF_08_11 0x0A +#define MAX6957_CONF_12_15 0x0B +#define MAX6957_CONF_16_19 0x0C + +/** + * Individual gpio ports (one per gpio) to HD44780 + */ + +#define MAX6957AAX_HD44780_RS 0x29 +#define MAX6957AAX_HD44780_R_W 0x2A +#define MAX6957AAX_HD44780_EN 0x2B +#define MAX6957AAX_HD44780_DATA 0x4C + +/** + * Display controller instructions + */ + +/* Function set: eight bits, two lines, 8-dot font */ +#define HD44780_FUNCTION_SET 0x38 + +/* Display ON / OFF: turn display on */ +#define HD44780_DISPLAY_ON_OFF_CONTROL 0x0C + +/* Entry mode: increment */ +#define HD44780_ENTRY_MODE_SET 0x06 + +/* Clear */ +#define HD44780_CLEAR_DISPLAY 0x01 + +/* Set DDRAM addr (to be ORed with exact address) */ +#define HD44780_SET_DDRAM_ADDR 0x80 + +/* Set CGRAM addr (to be ORed with exact address) */ +#define HD44780_SET_CGRAM_ADDR 0x40 + +/** + * Default value for contrats + */ + +#define CONTRAST_DEFAULT 25 + +/** + * Define slave as a module-wide local to save passing it around, + * plus we will need it after init for the "hd44780" command. + */ + +static struct spi_slave *slave; + +/* + * Write a value into a MAX6957AAX register. + */ + +static void max6957aax_write(uint8_t reg, uint8_t value) +{ + uint8_t dout[2]; + + dout[0] = reg; + dout[1] = value; + gpio_set_value(GPO_15, 0); + /* do SPI read/write (passing din==dout is OK) */ + spi_xfer(slave, 16, dout, dout, SPI_XFER_BEGIN | SPI_XFER_END); + gpio_set_value(GPO_15, 1); +} + +/* + * Read a value from a MAX6957AAX register. + * + * According to the MAX6957AAX datasheet, we should release the chip + * select halfway through the read sequence, when the actual register + * value is read; but the WORK_92105 hardware prevents the MAX6957AAX + * SPI OUT from reaching the LPC32XX SIP MISO if chip is not selected. + * so let's release the CS an hold it again while reading the result. + */ + +static uint8_t max6957aax_read(uint8_t reg) +{ + uint8_t dout[2], din[2]; + + /* send read command */ + dout[0] = reg | 0x80; /* set bit 7 to indicate read */ + dout[1] = 0; + gpio_set_value(GPO_15, 0); + /* do SPI read/write (passing din==dout is OK) */ + spi_xfer(slave, 16, dout, dout, SPI_XFER_BEGIN | SPI_XFER_END); + /* latch read command */ + gpio_set_value(GPO_15, 1); + /* read register -- din = noop on xmit, din[1] = reg on recv */ + din[0] = 0; + din[1] = 0; + gpio_set_value(GPO_15, 0); + /* do SPI read/write (passing din==dout is OK) */ + spi_xfer(slave, 16, din, din, SPI_XFER_BEGIN | SPI_XFER_END); + /* end of read. */ + gpio_set_value(GPO_15, 1); + return din[1]; +} + +static void hd44780_instruction(unsigned long instruction) +{ + max6957aax_write(MAX6957AAX_HD44780_RS, 0); + max6957aax_write(MAX6957AAX_HD44780_R_W, 0); + max6957aax_write(MAX6957AAX_HD44780_EN, 1); + max6957aax_write(MAX6957AAX_HD44780_DATA, instruction); + max6957aax_write(MAX6957AAX_HD44780_EN, 0); + /* HD44780 takes 37 us for most instructions, 1520 for clear */ + if (instruction == HD44780_CLEAR_DISPLAY) + udelay(2000); + else + udelay(100); +} + +static void hd44780_write_char(char c) +{ + max6957aax_write(MAX6957AAX_HD44780_RS, 1); + max6957aax_write(MAX6957AAX_HD44780_R_W, 0); + max6957aax_write(MAX6957AAX_HD44780_EN, 1); + max6957aax_write(MAX6957AAX_HD44780_DATA, c); + max6957aax_write(MAX6957AAX_HD44780_EN, 0); + /* HD44780 takes 37 us to write to DDRAM or CGRAM */ + udelay(100); +} + +static void hd44780_write_str(char *s) +{ + max6957aax_write(MAX6957AAX_HD44780_RS, 1); + max6957aax_write(MAX6957AAX_HD44780_R_W, 0); + while (*s) { + max6957aax_write(MAX6957AAX_HD44780_EN, 1); + max6957aax_write(MAX6957AAX_HD44780_DATA, *s); + max6957aax_write(MAX6957AAX_HD44780_EN, 0); + s++; + /* HD44780 takes 37 us to write to DDRAM or CGRAM */ + udelay(100); + } +} + +/* + * Existing user code might expect these custom characters to be + * recognized and displayed on the LCD + */ + +static u8 char_gen_chars[] = { + /* #8, empty rectangle */ + 0x1F, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x1F, + /* #9, filled right arrow */ + 0x10, 0x18, 0x1C, 0x1E, 0x1C, 0x18, 0x10, 0x00, + /* #10, filled left arrow */ + 0x01, 0x03, 0x07, 0x0F, 0x07, 0x03, 0x01, 0x00, + /* #11, up and down arrow */ + 0x04, 0x0E, 0x1F, 0x00, 0x00, 0x1F, 0x0E, 0x04, + /* #12, plus/minus */ + 0x04, 0x04, 0x1F, 0x04, 0x04, 0x00, 0x1F, 0x00, + /* #13, fat exclamation mark */ + 0x06, 0x06, 0x06, 0x06, 0x00, 0x06, 0x06, 0x00, + /* #14, empty square */ + 0x00, 0x1F, 0x11, 0x11, 0x11, 0x1F, 0x00, 0x00, + /* #15, struck out square */ + 0x00, 0x1F, 0x19, 0x15, 0x13, 0x1F, 0x00, 0x00, +}; + +static void hd44780_init_char_gen(void) +{ + int i; + + hd44780_instruction(HD44780_SET_CGRAM_ADDR); + + for (i = 0; i < sizeof(char_gen_chars); i++) + hd44780_write_char(char_gen_chars[i]); + + hd44780_instruction(HD44780_SET_DDRAM_ADDR); +} + +void work_92105_display_init(void) +{ + int claim_err; + char *display_contrast_str; + uint8_t display_contrast = CONTRAST_DEFAULT; + uint8_t enable_backlight = 0x96; + + slave = spi_setup_slave(0, 0, 500000, 0); + + if (!slave) { + printf("Failed to set up SPI slave\n"); + return; + } + + claim_err = spi_claim_bus(slave); + + if (claim_err) + debug("Failed to claim SPI bus: %d\n", claim_err); + + /* enable backlight */ + i2c_write(0x2c, 0x01, 1, &enable_backlight, 1); + + /* set display contrast */ + display_contrast_str = getenv("fwopt_dispcontrast"); + if (display_contrast_str) + display_contrast = simple_strtoul(display_contrast_str, + NULL, 10); + i2c_write(0x2c, 0x00, 1, &display_contrast, 1); + + /* request GPO_15 as an output initially set to 1 */ + gpio_request(GPO_15, "MAX6957_nCS"); + gpio_direction_output(GPO_15, 1); + + /* enable MAX6957 portexpander */ + max6957aax_write(MAX6957_CONF, 0x01); + /* configure pin 8 as input, pins 9..19 as outputs */ + max6957aax_write(MAX6957_CONF_08_11, 0x56); + max6957aax_write(MAX6957_CONF_12_15, 0x55); + max6957aax_write(MAX6957_CONF_16_19, 0x55); + + /* initialize HD44780 */ + max6957aax_write(MAX6957AAX_HD44780_EN, 0); + hd44780_instruction(HD44780_FUNCTION_SET); + hd44780_instruction(HD44780_DISPLAY_ON_OFF_CONTROL); + hd44780_instruction(HD44780_ENTRY_MODE_SET); + + /* write custom character glyphs */ + hd44780_init_char_gen(); + + /* Show U-Boot version, date and time as a sign-of-life */ + hd44780_instruction(HD44780_CLEAR_DISPLAY); + hd44780_instruction(HD44780_SET_DDRAM_ADDR | 0); + hd44780_write_str(U_BOOT_VERSION); + hd44780_instruction(HD44780_SET_DDRAM_ADDR | 64); + hd44780_write_str(U_BOOT_DATE); + hd44780_instruction(HD44780_SET_DDRAM_ADDR | 64 | 20); + hd44780_write_str(U_BOOT_TIME); +} + +#ifdef CONFIG_CMD_MAX6957 + +static int do_max6957aax(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + int reg, val; + + if (argc != 3) + return CMD_RET_USAGE; + switch (argv[1][0]) { + case 'r': + case 'R': + reg = simple_strtoul(argv[2], NULL, 0); + val = max6957aax_read(reg); + printf("MAX6957 reg 0x%02x read 0x%02x\n", reg, val); + return 0; + default: + reg = simple_strtoul(argv[1], NULL, 0); + val = simple_strtoul(argv[2], NULL, 0); + max6957aax_write(reg, val); + printf("MAX6957 reg 0x%02x wrote 0x%02x\n", reg, val); + return 0; + } + return 1; +} + +#ifdef CONFIG_SYS_LONGHELP +static char max6957aax_help_text[] = + "max6957aax - write or read display register:\n" + "\tmax6957aax R|r reg - read display register;\n" + "\tmax6957aax reg val - write display register."; +#endif + +U_BOOT_CMD( + max6957aax, 6, 1, do_max6957aax, + "SPI MAX6957 display write/read", + max6957aax_help_text +); +#endif /* CONFIG_CMD_MAX6957 */ + +#ifdef CONFIG_CMD_HD44760 + +/* + * We need the HUSH parser because we need string arguments, and + * only HUSH can understand them. + */ + +#if !defined(CONFIG_SYS_HUSH_PARSER) +#error CONFIG_CMD_HD44760 requires CONFIG_SYS_HUSH_PARSER +#endif + +static int do_hd44780(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) +{ + char *cmd; + + if (argc != 3) + return CMD_RET_USAGE; + + cmd = argv[1]; + + if (strcasecmp(cmd, "cmd") == 0) + hd44780_instruction(simple_strtol(argv[2], NULL, 0)); + else if (strcasecmp(cmd, "data") == 0) + hd44780_write_char(simple_strtol(argv[2], NULL, 0)); + else if (strcasecmp(cmd, "str") == 0) + hd44780_write_str(argv[2]); + return 0; +} + +#ifdef CONFIG_SYS_LONGHELP +static char hd44780_help_text[] = + "hd44780 - control LCD driver:\n" + "\thd44780 cmd <val> - send command <val> to driver;\n" + "\thd44780 data <val> - send data <val> to driver;\n" + "\thd44780 str \"<text>\" - send \"<text>\" to driver."; +#endif + +U_BOOT_CMD( + hd44780, 6, 1, do_hd44780, + "HD44780 LCD driver control", + hd44780_help_text +); +#endif /* CONFIG_CMD_HD44780 */ diff --git a/board/work-microwave/work_92105/work_92105_display.h b/board/work-microwave/work_92105/work_92105_display.h new file mode 100644 index 0000000000..dd6e768eaf --- /dev/null +++ b/board/work-microwave/work_92105/work_92105_display.h @@ -0,0 +1,14 @@ +/* + * work_92105 display support interface + * + * (C) Copyright 2014 DENX Software Engineering GmbH + * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> + * + * The work_92105 display is a HD44780-compatible module + * controlled through a MAX6957AAX SPI port expander, two + * MAX518 I2C DACs and native LPC32xx GPO 15. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +void work_92105_display_init(void); diff --git a/board/work-microwave/work_92105/work_92105_spl.c b/board/work-microwave/work_92105/work_92105_spl.c new file mode 100644 index 0000000000..282a6dd3a7 --- /dev/null +++ b/board/work-microwave/work_92105/work_92105_spl.c @@ -0,0 +1,85 @@ +/* + * WORK Microwave work_92105 board support + * + * (C) Copyright 2014 DENX Software Engineering GmbH + * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/cpu.h> +#include <asm/arch/emc.h> +#include <asm/gpio.h> +#include <spl.h> +#include "work_92105_display.h" + +struct emc_dram_settings dram_64mb = { + .cmddelay = 0x0001C000, + .config0 = 0x00005682, + .rascas0 = 0x00000302, + .rdconfig = 0x00000011, + .trp = 52631578, + .tras = 20833333, + .tsrex = 12500000, + .twr = 66666666, + .trc = 13888888, + .trfc = 10256410, + .txsr = 12500000, + .trrd = 1, + .tmrd = 1, + .tcdlr = 0, + .refresh = 128000, + .mode = 0x00018000, + .emode = 0x02000000 +}; + +const struct emc_dram_settings dram_128mb = { + .cmddelay = 0x0001C000, + .config0 = 0x00005882, + .rascas0 = 0x00000302, + .rdconfig = 0x00000011, + .trp = 52631578, + .tras = 22222222, + .tsrex = 8333333, + .twr = 66666666, + .trc = 14814814, + .trfc = 10256410, + .txsr = 8333333, + .trrd = 1, + .tmrd = 1, + .tcdlr = 0, + .refresh = 128000, + .mode = 0x00030000, + .emode = 0x02000000 +}; + +void spl_board_init(void) +{ + /* initialize serial port for console */ + lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART); + /* initialize console */ + preloader_console_init(); + /* init DDR and NAND to chainload U-Boot */ + ddr_init(&dram_128mb); + /* + * If this is actually a 64MB module, then the highest column + * bit in any address will be ignored, and thus address 0x80000000 + * should be mirrored at address 0x80000800. Test this. + */ + writel(0x31415926, 0x80000000); /* write Pi at 0x80000000 */ + writel(0x16180339, 0x80000800); /* write Phi at 0x80000800 */ + if (readl(0x80000000) == 0x16180339) /* check 0x80000000 */ { + /* actually 64MB mirrored: reconfigure controller */ + ddr_init(&dram_64mb); + } + /* initialize NAND controller to load U-Boot from NAND */ + lpc32xx_mlc_nand_init(); +} + +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_NAND; +} diff --git a/board/xilinx/zynq/MAINTAINERS b/board/xilinx/zynq/MAINTAINERS index 382e921e70..e0dc4fed48 100644 --- a/board/xilinx/zynq/MAINTAINERS +++ b/board/xilinx/zynq/MAINTAINERS @@ -1,6 +1,5 @@ ZYNQ BOARD M: Michal Simek <monstr@monstr.eu> -M: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> S: Maintained F: board/xilinx/zynq/ F: include/configs/zynq*.h |