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-rw-r--r--board/atmel/sama5d2_ptc/Kconfig15
-rw-r--r--board/atmel/sama5d2_ptc/MAINTAINERS7
-rw-r--r--board/atmel/sama5d2_ptc/Makefile8
-rw-r--r--board/atmel/sama5d2_ptc/sama5d2_ptc.c285
-rw-r--r--board/atmel/sama5d2_xplained/sama5d2_xplained.c5
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/.gitignore3
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/Makefile1
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl13
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/dsdt.asl14
-rw-r--r--board/intel/bayleybay/.gitignore3
-rw-r--r--board/intel/bayleybay/Makefile1
-rw-r--r--board/intel/bayleybay/acpi/mainboard.asl11
-rw-r--r--board/intel/bayleybay/dsdt.asl14
-rw-r--r--board/intel/galileo/Kconfig11
-rw-r--r--board/intel/minnowmax/.gitignore3
-rw-r--r--board/intel/minnowmax/Makefile1
-rw-r--r--board/intel/minnowmax/acpi/mainboard.asl11
-rw-r--r--board/intel/minnowmax/dsdt.asl14
-rw-r--r--board/xilinx/zynq/Makefile12
-rw-r--r--board/xilinx/zynq/custom_hw_platform/.gitignore1
-rw-r--r--board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c (renamed from board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h (renamed from board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c (renamed from board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h (renamed from board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c (renamed from board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h (renamed from board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynq/zynq-zed/ps7_init_gpl.c (renamed from board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-zed/ps7_init_gpl.h (renamed from board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c (renamed from board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c)0
-rw-r--r--board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h (renamed from board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h)0
-rw-r--r--board/xilinx/zynqmp/Makefile23
-rw-r--r--board/xilinx/zynqmp/xil_io.h35
-rw-r--r--board/xilinx/zynqmp/zynqmp.c17
33 files changed, 493 insertions, 15 deletions
diff --git a/board/atmel/sama5d2_ptc/Kconfig b/board/atmel/sama5d2_ptc/Kconfig
new file mode 100644
index 0000000000..d2661c689a
--- /dev/null
+++ b/board/atmel/sama5d2_ptc/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_SAMA5D2_PTC
+
+config SYS_BOARD
+ default "sama5d2_ptc"
+
+config SYS_VENDOR
+ default "atmel"
+
+config SYS_SOC
+ default "at91"
+
+config SYS_CONFIG_NAME
+ default "sama5d2_ptc"
+
+endif
diff --git a/board/atmel/sama5d2_ptc/MAINTAINERS b/board/atmel/sama5d2_ptc/MAINTAINERS
new file mode 100644
index 0000000000..7ab03d6eaf
--- /dev/null
+++ b/board/atmel/sama5d2_ptc/MAINTAINERS
@@ -0,0 +1,7 @@
+SAMA5D2 PTC Engineering BOARD
+M: Wenyou Yang <wenyou.yang@atmel.com>
+S: Maintained
+F: board/atmel/sama5d2_ptc/
+F: include/configs/sama5d2_ptc.h
+F: configs/sama5d2_ptc_spiflash_defconfig
+F: configs/sama5d2_ptc_nandflash_defconfig
diff --git a/board/atmel/sama5d2_ptc/Makefile b/board/atmel/sama5d2_ptc/Makefile
new file mode 100644
index 0000000000..1fe0392da0
--- /dev/null
+++ b/board/atmel/sama5d2_ptc/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2016 Atmel
+# Wenyou Yang <wenyou.yang@atmel.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += sama5d2_ptc.o
diff --git a/board/atmel/sama5d2_ptc/sama5d2_ptc.c b/board/atmel/sama5d2_ptc/sama5d2_ptc.c
new file mode 100644
index 0000000000..9e6544bc07
--- /dev/null
+++ b/board/atmel/sama5d2_ptc/sama5d2_ptc.c
@@ -0,0 +1,285 @@
+/*
+ * Copyright (C) 2016 Atmel
+ * Wenyou.Yang <wenyou.yang@atmel.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <atmel_hlcdc.h>
+#include <lcd.h>
+#include <mmc.h>
+#include <net.h>
+#include <netdev.h>
+#include <spi.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/atmel_pio4.h>
+#include <asm/arch/atmel_mpddrc.h>
+#include <asm/arch/atmel_usba_udc.h>
+#include <asm/arch/atmel_sdhci.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/sama5_sfr.h>
+#include <asm/arch/sama5d2.h>
+#include <asm/arch/sama5d3_smc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 1);
+}
+
+static void board_spi0_hw_init(void)
+{
+ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 14, 0);
+ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 15, 0);
+ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 16, 0);
+
+ atmel_pio4_set_pio_output(AT91_PIO_PORTA, 17, 1);
+
+ at91_periph_clk_enable(ATMEL_ID_SPI0);
+}
+
+static void board_nand_hw_init(void)
+{
+ struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+ struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
+
+ at91_periph_clk_enable(ATMEL_ID_HSMC);
+
+ writel(AT91_SFR_EBICFG_DRIVE0_HIGH |
+ AT91_SFR_EBICFG_PULL0_NONE |
+ AT91_SFR_EBICFG_DRIVE1_HIGH |
+ AT91_SFR_EBICFG_PULL1_NONE, &sfr->ebicfg);
+
+ /* Configure SMC CS3 for NAND */
+ writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
+ AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
+ &smc->cs[3].setup);
+ writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) |
+ AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3),
+ &smc->cs[3].pulse);
+ writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+ &smc->cs[3].cycle);
+ writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) |
+ AT91_SMC_TIMINGS_TAR(2) | AT91_SMC_TIMINGS_TRR(3) |
+ AT91_SMC_TIMINGS_TWB(7) | AT91_SMC_TIMINGS_RBNSEL(3) |
+ AT91_SMC_TIMINGS_NFSEL(1), &smc->cs[3].timings);
+ writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+ AT91_SMC_MODE_EXNW_DISABLE |
+ AT91_SMC_MODE_DBW_8 |
+ AT91_SMC_MODE_TDF_CYCLE(3),
+ &smc->cs[3].mode);
+
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 0, 0); /* D0 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 1, 0); /* D1 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 2, 0); /* D2 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 3, 0); /* D3 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 4, 0); /* D4 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 5, 0); /* D5 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 6, 0); /* D6 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 7, 0); /* D7 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 12, 0); /* RE */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 8, 0); /* WE */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 9, 1); /* NCS */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 21, 1); /* RDY */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 10, 1); /* ALE */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTA, 11, 1); /* CLE */
+}
+
+static void board_usb_hw_init(void)
+{
+ atmel_pio4_set_pio_output(AT91_PIO_PORTA, 28, 1);
+}
+
+static void board_gmac_hw_init(void)
+{
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 14, 0); /* GTXCK */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 15, 0); /* GTXEN */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 16, 0); /* GRXDV */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 17, 0); /* GRXER */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 18, 0); /* GRX0 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 19, 0); /* GRX1 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 20, 0); /* GTX0 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 21, 0); /* GTX1 */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 22, 0); /* GMDC */
+ atmel_pio4_set_f_periph(AT91_PIO_PORTB, 23, 0); /* GMDIO */
+
+ at91_periph_clk_enable(ATMEL_ID_GMAC);
+}
+
+static void board_uart0_hw_init(void)
+{
+ atmel_pio4_set_c_periph(AT91_PIO_PORTB, 26, 1); /* URXD0 */
+ atmel_pio4_set_c_periph(AT91_PIO_PORTB, 27, 0); /* UTXD0 */
+
+ at91_periph_clk_enable(CONFIG_USART_ID);
+}
+
+int board_early_init_f(void)
+{
+ at91_periph_clk_enable(ATMEL_ID_PIOA);
+ at91_periph_clk_enable(ATMEL_ID_PIOB);
+ at91_periph_clk_enable(ATMEL_ID_PIOC);
+ at91_periph_clk_enable(ATMEL_ID_PIOD);
+
+ board_uart0_hw_init();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_ATMEL_SPI
+ board_spi0_hw_init();
+#endif
+#ifdef CONFIG_NAND_ATMEL
+ board_nand_hw_init();
+#endif
+#ifdef CONFIG_MACB
+ board_gmac_hw_init();
+#endif
+#ifdef CONFIG_CMD_USB
+ board_usb_hw_init();
+#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+ at91_udp_hw_init();
+#endif
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+
+#ifdef CONFIG_MACB
+ rc = macb_eth_initialize(0, (void *)ATMEL_BASE_GMAC, 0x00);
+ if (rc)
+ printf("GMAC register failed\n");
+#endif
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+ usba_udc_probe(&pdata);
+#ifdef CONFIG_USB_ETH_RNDIS
+ usb_eth_initialize(bis);
+#endif
+#endif
+
+ return rc;
+}
+
+/* SPL */
+#ifdef CONFIG_SPL_BUILD
+void spl_board_init(void)
+{
+#ifdef CONFIG_SYS_USE_SERIALFLASH
+ board_spi0_hw_init();
+#endif
+
+#ifdef CONFIG_SYS_USE_NANDFLASH
+ board_nand_hw_init();
+#endif
+}
+
+static void ddrc_conf(struct atmel_mpddrc_config *ddrc)
+{
+ ddrc->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR3_SDRAM);
+
+ ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+ ATMEL_MPDDRC_CR_NR_ROW_14 |
+ ATMEL_MPDDRC_CR_CAS_DDR_CAS5 |
+ ATMEL_MPDDRC_CR_DIC_DS |
+ ATMEL_MPDDRC_CR_DIS_DLL |
+ ATMEL_MPDDRC_CR_NB_8BANKS |
+ ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |
+ ATMEL_MPDDRC_CR_UNAL_SUPPORTED);
+
+ ddrc->rtr = 0x511;
+
+ ddrc->tpr0 = ((6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET) |
+ (3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) |
+ (9 << ATMEL_MPDDRC_TPR0_TRC_OFFSET) |
+ (3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET));
+
+ ddrc->tpr1 = ((27 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) |
+ (29 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET) |
+ (0 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET) |
+ (3 << ATMEL_MPDDRC_TPR1_TXP_OFFSET));
+
+ ddrc->tpr2 = ((0 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET) |
+ (0 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET) |
+ (0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET) |
+ (4 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET) |
+ (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));
+}
+
+void mem_init(void)
+{
+ struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
+ struct atmel_mpddrc_config ddrc_config;
+ u32 reg;
+
+ ddrc_conf(&ddrc_config);
+
+ at91_periph_clk_enable(ATMEL_ID_MPDDRC);
+ at91_system_clk_enable(AT91_PMC_DDR);
+
+ reg = readl(&mpddrc->io_calibr);
+ reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;
+ reg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;
+ reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;
+ reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(100);
+ writel(reg, &mpddrc->io_calibr);
+
+ writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_TWO_CYCLE,
+ &mpddrc->rd_data_path);
+
+ ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);
+
+ writel(0x3, &mpddrc->cal_mr4);
+ writel(64, &mpddrc->tim_cal);
+}
+
+void at91_pmc_init(void)
+{
+ at91_plla_init(AT91_PMC_PLLAR_29 |
+ AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
+ AT91_PMC_PLLXR_MUL(82) |
+ AT91_PMC_PLLXR_DIV(1));
+
+ at91_pllicpr_init(0);
+
+ at91_mck_init(AT91_PMC_MCKR_H32MXDIV |
+ AT91_PMC_MCKR_PLLADIV_2 |
+ AT91_PMC_MCKR_MDIV_3 |
+ AT91_PMC_MCKR_CSS_PLLA);
+}
+#endif
diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 10edf28a9b..93df7ba32a 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -171,10 +171,11 @@ static void board_sdhci0_hw_init(void)
atmel_pio4_set_a_periph(AT91_PIO_PORTA, 9, 0); /* SDMMC0_DAT7 */
atmel_pio4_set_a_periph(AT91_PIO_PORTA, 10, 0); /* SDMMC0_RSTN */
atmel_pio4_set_a_periph(AT91_PIO_PORTA, 11, 0); /* SDMMC0_VDDSEL */
+ atmel_pio4_set_a_periph(AT91_PIO_PORTA, 13, 0); /* SDMMC0_CD */
at91_periph_clk_enable(ATMEL_ID_SDMMC0);
at91_enable_periph_generated_clk(ATMEL_ID_SDMMC0,
- GCK_CSS_PLLA_CLK, 1);
+ GCK_CSS_UPLL_CLK, 1);
}
static void board_sdhci1_hw_init(void)
@@ -190,7 +191,7 @@ static void board_sdhci1_hw_init(void)
at91_periph_clk_enable(ATMEL_ID_SDMMC1);
at91_enable_periph_generated_clk(ATMEL_ID_SDMMC1,
- GCK_CSS_PLLA_CLK, 1);
+ GCK_CSS_UPLL_CLK, 1);
}
int board_mmc_init(bd_t *bis)
diff --git a/board/congatec/conga-qeval20-qa3-e3845/.gitignore b/board/congatec/conga-qeval20-qa3-e3845/.gitignore
new file mode 100644
index 0000000000..6eb8a5481a
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/congatec/conga-qeval20-qa3-e3845/Makefile b/board/congatec/conga-qeval20-qa3-e3845/Makefile
index 23b8748c69..b784510f39 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/Makefile
+++ b/board/congatec/conga-qeval20-qa3-e3845/Makefile
@@ -5,3 +5,4 @@
#
obj-y += conga-qeval20-qa3.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl b/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
new file mode 100644
index 0000000000..eace459ae0
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/acpi/mainboard.asl
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
+
+/* TODO: Need add Winbond SuperIO chipset W83627 ASL codes */
diff --git a/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl b/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
new file mode 100644
index 0000000000..6042011acf
--- /dev/null
+++ b/board/congatec/conga-qeval20-qa3-e3845/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/board/intel/bayleybay/.gitignore b/board/intel/bayleybay/.gitignore
new file mode 100644
index 0000000000..6eb8a5481a
--- /dev/null
+++ b/board/intel/bayleybay/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/intel/bayleybay/Makefile b/board/intel/bayleybay/Makefile
index 88b5aad634..52dda7ddab 100644
--- a/board/intel/bayleybay/Makefile
+++ b/board/intel/bayleybay/Makefile
@@ -5,3 +5,4 @@
#
obj-y += bayleybay.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/bayleybay/acpi/mainboard.asl b/board/intel/bayleybay/acpi/mainboard.asl
new file mode 100644
index 0000000000..21785ea73b
--- /dev/null
+++ b/board/intel/bayleybay/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/intel/bayleybay/dsdt.asl b/board/intel/bayleybay/dsdt.asl
new file mode 100644
index 0000000000..6042011acf
--- /dev/null
+++ b/board/intel/bayleybay/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/board/intel/galileo/Kconfig b/board/intel/galileo/Kconfig
index 6515bacd76..87a0ec4ccc 100644
--- a/board/intel/galileo/Kconfig
+++ b/board/intel/galileo/Kconfig
@@ -21,4 +21,15 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select INTEL_QUARK
select BOARD_ROMSIZE_KB_1024
+config SMBIOS_PRODUCT_NAME
+ default "GalileoGen2"
+ help
+ Override the default product name U-Boot reports in the SMBIOS
+ table, to be compatible with the Intel provided UEFI BIOS, as
+ Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
+ drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
+ it to do different board level configuration.
+
+ This can be "Galileo" for GEN1 Galileo board.
+
endif
diff --git a/board/intel/minnowmax/.gitignore b/board/intel/minnowmax/.gitignore
new file mode 100644
index 0000000000..6eb8a5481a
--- /dev/null
+++ b/board/intel/minnowmax/.gitignore
@@ -0,0 +1,3 @@
+dsdt.aml
+dsdt.asl.tmp
+dsdt.c
diff --git a/board/intel/minnowmax/Makefile b/board/intel/minnowmax/Makefile
index 1a614324a2..73e5a8fd02 100644
--- a/board/intel/minnowmax/Makefile
+++ b/board/intel/minnowmax/Makefile
@@ -5,3 +5,4 @@
#
obj-y += minnowmax.o start.o
+obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/minnowmax/acpi/mainboard.asl b/board/intel/minnowmax/acpi/mainboard.asl
new file mode 100644
index 0000000000..21785ea73b
--- /dev/null
+++ b/board/intel/minnowmax/acpi/mainboard.asl
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Power Button */
+Device (PWRB)
+{
+ Name(_HID, EISAID("PNP0C0C"))
+}
diff --git a/board/intel/minnowmax/dsdt.asl b/board/intel/minnowmax/dsdt.asl
new file mode 100644
index 0000000000..6042011acf
--- /dev/null
+++ b/board/intel/minnowmax/dsdt.asl
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000)
+{
+ /* platform specific */
+ #include <asm/arch/acpi/platform.asl>
+
+ /* board specific */
+ #include "acpi/mainboard.asl"
+}
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile
index eab93038ce..7de0212bc9 100644
--- a/board/xilinx/zynq/Makefile
+++ b/board/xilinx/zynq/Makefile
@@ -7,17 +7,7 @@
obj-y := board.o
-# Copied from Xilinx SDK 2014.4
-hw-platform-$(CONFIG_TARGET_ZYNQ_ZED) := zed_hw_platform
-hw-platform-$(CONFIG_TARGET_ZYNQ_MICROZED) := MicroZed_hw_platform
-hw-platform-$(CONFIG_TARGET_ZYNQ_ZC702) := ZC702_hw_platform
-hw-platform-$(CONFIG_TARGET_ZYNQ_ZC706) := ZC706_hw_platform
-hw-platform-$(CONFIG_TARGET_ZYNQ_ZYBO) := zybo_hw_platform
-# If you want to use customized ps7_init_gpl.c/h,
-# enable CONFIG_ZYNQ_CUSTOM_INIT and put them into custom_hw_platform/.
-# This line must be placed at the bottom of the list because
-# it takes precedence over the default ones.
-hw-platform-$(CONFIG_ZYNQ_CUSTOM_INIT) := custom_hw_platform
+hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/ps7_init_gpl.c),\
$(hw-platform-y)/ps7_init_gpl.o)
diff --git a/board/xilinx/zynq/custom_hw_platform/.gitignore b/board/xilinx/zynq/custom_hw_platform/.gitignore
deleted file mode 100644
index c455361df6..0000000000
--- a/board/xilinx/zynq/custom_hw_platform/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-ps7_init_gpl.[ch]
diff --git a/board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
index eb290023a1..eb290023a1 100644
--- a/board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h
index bdea5a0443..bdea5a0443 100644
--- a/board/xilinx/zynq/MicroZed_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h
diff --git a/board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
index abfd91187d..abfd91187d 100644
--- a/board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h
index 16fa8104a4..16fa8104a4 100644
--- a/board/xilinx/zynq/ZC702_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h
diff --git a/board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
index 77fd9499df..77fd9499df 100644
--- a/board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h
index 8527eef447..8527eef447 100644
--- a/board/xilinx/zynq/ZC706_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h
diff --git a/board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
index f4f45becd6..f4f45becd6 100644
--- a/board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.h
index 9b41e28697..9b41e28697 100644
--- a/board/xilinx/zynq/zed_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.h
diff --git a/board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c
index 83daf7bf15..83daf7bf15 100644
--- a/board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c
diff --git a/board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h b/board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h
index 22d9fd9250..22d9fd9250 100644
--- a/board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h
+++ b/board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 2ab3f190ac..90f00c650a 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -1,8 +1,29 @@
#
-# (C) Copyright 2014 - 2015 Xilinx, Inc.
+# (C) Copyright 2014 - 2016 Xilinx, Inc.
# Michal Simek <michal.simek@xilinx.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := zynqmp.o
+
+hw-platform-y :=$(shell echo $(CONFIG_SYS_CONFIG_NAME))
+
+init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/psu_init_gpl.c),\
+ $(hw-platform-y)/psu_init_gpl.o)
+
+ifeq ($(init-objs),)
+ifneq ($(wildcard $(srctree)/$(src)/psu_init_gpl.c),)
+init-objs := psu_init_gpl.o
+$(if $(CONFIG_SPL_BUILD),\
+$(warning Put custom psu_init_gpl.c/h to board/xilinx/zynqmp/custom_hw_platform/))
+endif
+endif
+
+obj-$(CONFIG_SPL_BUILD) += $(init-objs)
+
+# Suppress "warning: function declaration isn't a prototype"
+CFLAGS_REMOVE_psu_init_gpl.o := -Wstrict-prototypes
+
+# To include xil_io.h
+CFLAGS_psu_init_gpl.o := -I$(srctree)/$(src)
diff --git a/board/xilinx/zynqmp/xil_io.h b/board/xilinx/zynqmp/xil_io.h
new file mode 100644
index 0000000000..57ca4adf11
--- /dev/null
+++ b/board/xilinx/zynqmp/xil_io.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef XIL_IO_H /* prevent circular inclusions */
+#define XIL_IO_H
+
+/* FIXME remove this when vivado is fixed */
+#include <asm/io.h>
+
+#define xil_printf(...)
+
+void Xil_ICacheEnable(void)
+{}
+
+void Xil_DCacheEnable(void)
+{}
+
+void Xil_ICacheDisable(void)
+{}
+
+void Xil_DCacheDisable(void)
+{}
+
+void Xil_Out32(unsigned long addr, unsigned long val)
+{
+ writel(val, addr);
+}
+
+int Xil_In32(unsigned long addr)
+{
+ return readl(addr);
+}
+
+#endif /* XIL_IO_H */
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 132d724fbd..4623cd49e9 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -15,6 +15,7 @@
#include <asm/io.h>
#include <usb.h>
#include <dwc3-uboot.h>
+#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -50,6 +51,22 @@ int board_early_init_r(void)
return 0;
}
+int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
+{
+#if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
+ defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) && \
+ defined(CONFIG_ZYNQ_EEPROM_BUS)
+ i2c_set_bus_num(CONFIG_ZYNQ_EEPROM_BUS);
+
+ if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
+ CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
+ ethaddr, 6))
+ printf("I2C EEPROM MAC address read failed\n");
+#endif
+
+ return 0;
+}
+
#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
/*
* fdt_get_reg - Fill buffer by information from DT