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-rw-r--r--board/actux1/Makefile8
-rw-r--r--board/actux1/actux1.c148
-rw-r--r--board/actux1/actux1_hw.h41
-rw-r--r--board/actux1/u-boot.lds99
-rw-r--r--board/actux2/Makefile8
-rw-r--r--board/actux2/actux2.c122
-rw-r--r--board/actux2/actux2_hw.h43
-rw-r--r--board/actux2/u-boot.lds99
-rw-r--r--board/actux3/Makefile8
-rw-r--r--board/actux3/actux3.c149
-rw-r--r--board/actux3/actux3_hw.h44
-rw-r--r--board/actux3/u-boot.lds99
-rw-r--r--board/actux4/Makefile8
-rw-r--r--board/actux4/actux4.c129
-rw-r--r--board/actux4/actux4_hw.h33
-rw-r--r--board/boundary/nitrogen6x/README4
-rw-r--r--board/boundary/nitrogen6x/nitrogen6dl.cfg2
-rw-r--r--board/boundary/nitrogen6x/nitrogen6dl2g.cfg2
-rw-r--r--board/boundary/nitrogen6x/nitrogen6q.cfg2
-rw-r--r--board/boundary/nitrogen6x/nitrogen6q2g.cfg2
-rw-r--r--board/boundary/nitrogen6x/nitrogen6s.cfg2
-rw-r--r--board/boundary/nitrogen6x/nitrogen6s1g.cfg2
-rw-r--r--board/dvlhost/Makefile8
-rw-r--r--board/dvlhost/dvlhost.c112
-rw-r--r--board/dvlhost/dvlhost_hw.h31
-rw-r--r--board/dvlhost/u-boot.lds99
-rw-r--r--board/dvlhost/watchdog.c27
-rw-r--r--board/freescale/mx6qsabreauto/imximage.cfg136
-rw-r--r--board/samsung/smdk5250/lowlevel_init.S82
-rw-r--r--board/solidrun/hummingboard/hummingboard.c6
-rw-r--r--board/xilinx/zynq/Makefile1
-rw-r--r--board/xilinx/zynq/board.c10
-rw-r--r--board/xilinx/zynq/ps7_init.c12
33 files changed, 81 insertions, 1497 deletions
diff --git a/board/actux1/Makefile b/board/actux1/Makefile
deleted file mode 100644
index 05a8669113..0000000000
--- a/board/actux1/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := actux1.o
diff --git a/board/actux1/actux1.c b/board/actux1/actux1.c
deleted file mode 100644
index 03ccd936b4..0000000000
--- a/board/actux1/actux1.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/arch/ixp425.h>
-#include <asm/io.h>
-#include <miiphy.h>
-#ifdef CONFIG_PCI
-#include <pci.h>
-#include <asm/arch/ixp425pci.h>
-#endif
-
-#include "actux1_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- /* CS5: Debug port */
- writel(0x9d520003, IXP425_EXP_CS5);
- /* CS6: HwRel */
- writel(0x81860001, IXP425_EXP_CS6);
- /* CS7: LEDs */
- writel(0x80900003, IXP425_EXP_CS7);
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
-
- /* Setup GPIOs for PCI INTA */
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI1_INTA);
- GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI1_INTA);
-
- /* Setup GPIOs for 33MHz clock output */
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
- writel(0x011001FF, IXP425_GPIO_GPCLKR);
-
- udelay(533);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
-
- ACTUX1_LED1(2);
- ACTUX1_LED2(2);
- ACTUX1_LED3(0);
- ACTUX1_LED4(0);
- ACTUX1_LED5(0);
- ACTUX1_LED6(0);
- ACTUX1_LED7(0);
-
- ACTUX1_HS(ACTUX1_HS_DCD);
-
- return 0;
-}
-
-/*
- * Check Board Identity
- */
-int checkboard(void)
-{
- char buf[64];
- int i = getenv_f("serial#", buf, sizeof(buf));
-
- puts("Board: AcTux-1 rev.");
- putc(ACTUX1_BOARDREL + 'A' - 1);
-
- if (i > 0) {
- puts(", serial# ");
- puts(buf);
- }
- putc('\n');
-
- return 0;
-}
-
-/*************************************************************************
- * get_board_rev() - setup to pass kernel board revision information
- * 0 = reserved
- * 1 = Rev. A
- * 2 = Rev. B
- *************************************************************************/
-u32 get_board_rev(void)
-{
- return ACTUX1_BOARDREL;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
- return 0;
-}
-
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-void pci_init_board(void)
-{
- pci_ixp_init(&hose);
-}
-#endif
-
-void reset_phy(void)
-{
- u16 id1, id2;
-
- /* initialize the PHY */
- miiphy_reset("NPE0", CONFIG_PHY_ADDR);
-
- miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1);
- miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2);
-
- id2 &= 0xFFF0; /* mask out revision bits */
-
- if (id1 == 0x13 && id2 == 0x78e0) {
- /*
- * LXT971/LXT972 PHY: set LED outputs:
- * LED1(green) = Link/ACT,
- * LED2 (unused) = LINK,
- * LED3(red) = Coll
- */
- miiphy_write("NPE0", CONFIG_PHY_ADDR, 20, 0xD432);
- } else if (id1 == 0x143 && id2 == 0xbc30) {
- /* BCM5241: default values are OK */
- } else
- printf("unknown ethernet PHY ID: %x %x\n", id1, id2);
-}
diff --git a/board/actux1/actux1_hw.h b/board/actux1/actux1_hw.h
deleted file mode 100644
index 5627f24796..0000000000
--- a/board/actux1/actux1_hw.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * hardware register definitions for the AcTux-1 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ACTUX1_HW_H
-#define _ACTUX1_HW_H
-
-/* 0 = LED off,1 = green, 2 = red, 3 = orange */
-#define ACTUX1_LED1(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 0)
-#define ACTUX1_LED2(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 1)
-#define ACTUX1_LED3(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 2)
-#define ACTUX1_LED4(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 3)
-#define ACTUX1_LED5(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 4)
-#define ACTUX1_LED6(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 5)
-#define ACTUX1_LED7(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 6)
-#define ACTUX1_HS(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 7)
-#define ACTUX1_HS_DCD 0x01
-#define ACTUX1_HS_DSR 0x02
-
-#define ACTUX1_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS
-#define ACTUX1_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F)
-
-/* GPIO settings */
-#define CONFIG_SYS_GPIO_PCI1_INTA 2
-#define CONFIG_SYS_GPIO_PCI2_INTA 3
-#define CONFIG_SYS_GPIO_I2C_SDA 4
-#define CONFIG_SYS_GPIO_I2C_SCL 5
-#define CONFIG_SYS_GPIO_DBGJUMPER 9
-#define CONFIG_SYS_GPIO_BUTTON1 10
-#define CONFIG_SYS_GPIO_DBGSENSE 11
-#define CONFIG_SYS_GPIO_DTR 12
-#define CONFIG_SYS_GPIO_IORST 13 /* Out */
-#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
-#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
-
-#endif
diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds
deleted file mode 100644
index 4716e4f0e0..0000000000
--- a/board/actux1/u-boot.lds
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
-OUTPUT_ARCH (arm)
-ENTRY (_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN (4);
- .text : {
- *(.__image_copy_start)
- arch/arm/cpu/ixp/start.o(.text*)
- net/built-in.o(.text*)
- board/actux1/built-in.o(.text*)
- arch/arm/cpu/ixp/built-in.o(.text*)
- drivers/input/built-in.o(.text*)
-
- . = env_offset;
- common/env_embedded.o(.ppcenv)
- *(.text*)
- }
-
- . = ALIGN(4);
- .rodata : {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- . = ALIGN(4);
- .data : {
- *(.data*)
- }
- . = ALIGN(4);
- .got : {
- *(.got)
- }
- . =.;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = ALIGN (4);
-
- .image_copy_end :
- {
- *(.__image_copy_end)
- }
-
- .rel_dyn_start :
- {
- *(.__rel_dyn_start)
- }
-
- .rel.dyn : {
- *(.rel*)
- }
-
- .rel_dyn_end :
- {
- *(.__rel_dyn_end)
- }
-
- _end = .;
-
-/*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
- */
-
- .bss_start __rel_dyn_start (OVERLAY) : {
- KEEP(*(.__bss_start));
- __bss_base = .;
- }
-
- .bss __bss_base (OVERLAY) : {
- *(.bss*)
- . = ALIGN(4);
- __bss_limit = .;
- }
- .bss_end __bss_limit (OVERLAY) : {
- KEEP(*(.__bss_end));
- }
-
- .dynsym _end : { *(.dynsym) }
- .dynbss : { *(.dynbss) }
- .dynstr : { *(.dynstr*) }
- .dynamic : { *(.dynamic*) }
- .hash : { *(.hash*) }
- .plt : { *(.plt*) }
- .interp : { *(.interp*) }
- .gnu : { *(.gnu*) }
- .ARM.exidx : { *(.ARM.exidx*) }
-}
diff --git a/board/actux2/Makefile b/board/actux2/Makefile
deleted file mode 100644
index 24cbff1b47..0000000000
--- a/board/actux2/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := actux2.o
diff --git a/board/actux2/actux2.c b/board/actux2/actux2.c
deleted file mode 100644
index e578cd0996..0000000000
--- a/board/actux2/actux2.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/arch/ixp425.h>
-#include <asm/io.h>
-
-#include <miiphy.h>
-
-#include "actux2_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- /* CS1: IPAC-X */
- writel(0x94d10013, IXP425_EXP_CS1);
- /* CS5: Debug port */
- writel(0x9d520003, IXP425_EXP_CS5);
- /* CS6: HW release register */
- writel(0x81860001, IXP425_EXP_CS6);
- /* CS7: LEDs */
- writel(0x80900003, IXP425_EXP_CS7);
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_ETHRST);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DCD);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_ETHRST);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DCD);
-
- /* Setup GPIOs for Interrupt inputs */
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DBGINT);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_ETHINT);
-
- /* Setup GPIOs for 33MHz clock output */
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
- writel(0x011001FF, IXP425_GPIO_GPCLKR);
-
- udelay(533);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_ETHRST);
-
- ACTUX2_LED1(1);
- ACTUX2_LED2(0);
- ACTUX2_LED3(0);
- ACTUX2_LED4(0);
-
- return 0;
-}
-
-/*
- * Check Board Identity
- */
-int checkboard(void)
-{
- char buf[64];
- int i = getenv_f("serial#", buf, sizeof(buf));
-
- puts("Board: AcTux-2 rev.");
- putc(ACTUX2_BOARDREL + 'A' - 1);
-
- if (i > 0) {
- puts(", serial# ");
- puts(buf);
- }
- putc('\n');
-
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
- return 0;
-}
-
-/*************************************************************************
- * get_board_rev() - setup to pass kernel board revision information
- * 0 = reserved
- * 1 = Rev. A
- * 2 = Rev. B
- *************************************************************************/
-u32 get_board_rev(void)
-{
- return ACTUX2_BOARDREL;
-}
-
-void reset_phy(void)
-{
- /* init IcPlus IP175C ethernet switch to native IP175C mode */
- miiphy_write("NPE0", 29, 31, 0x175C);
-}
diff --git a/board/actux2/actux2_hw.h b/board/actux2/actux2_hw.h
deleted file mode 100644
index 57c6fa7076..0000000000
--- a/board/actux2/actux2_hw.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * hardware register definitions for the AcTux-2 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ACTUX2_HW_H
-#define _ACTUX2_HW_H
-
-/* 0 = LED off,1 = green, 2 = red, 3 = orange */
-#define ACTUX2_LED1(a) writeb((a ? 2 : 0), IXP425_EXP_BUS_CS7_BASE_PHYS + 0)
-#define ACTUX2_LED2(a) writeb((a ? 2 : 0), IXP425_EXP_BUS_CS7_BASE_PHYS + 1)
-#define ACTUX2_LED3(a) writeb((a ? 0 : 2), IXP425_EXP_BUS_CS7_BASE_PHYS + 2)
-#define ACTUX2_LED4(a) writeb((a ? 0 : 2), IXP425_EXP_BUS_CS7_BASE_PHYS + 3)
-
-#define ACTUX2_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS
-#define ACTUX2_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F)
-#define ACTUX2_OPTION (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0xF0)
-
-/*
- * GPIO settings
- */
-#define CONFIG_SYS_GPIO_DBGINT 0
-#define CONFIG_SYS_GPIO_ETHINT 1
-#define CONFIG_SYS_GPIO_ETHRST 2 /* Out */
-#define CONFIG_SYS_GPIO_LED5_GN 3 /* Out */
-#define CONFIG_SYS_GPIO_UNUSED4 4
-#define CONFIG_SYS_GPIO_UNUSED5 5
-#define CONFIG_SYS_GPIO_DSR 6 /* Out */
-#define CONFIG_SYS_GPIO_DCD 7 /* Out */
-#define CONFIG_SYS_GPIO_IPAC_INT 8
-#define CONFIG_SYS_GPIO_DBGJUMPER 9
-#define CONFIG_SYS_GPIO_BUTTON1 10
-#define CONFIG_SYS_GPIO_DBGSENSE 11
-#define CONFIG_SYS_GPIO_DTR 12
-#define CONFIG_SYS_GPIO_IORST 13 /* Out */
-#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
-#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
-
-#endif
diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds
deleted file mode 100644
index f00d7c72b1..0000000000
--- a/board/actux2/u-boot.lds
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
-OUTPUT_ARCH (arm)
-ENTRY (_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN (4);
- .text : {
- *(.__image_copy_start)
- arch/arm/cpu/ixp/start.o(.text*)
- net/built-in.o(.text*)
- board/actux2/built-in.o(.text*)
- arch/arm/cpu/ixp/built-in.o(.text*)
- drivers/input/built-in.o(.text*)
-
- . = env_offset;
- common/env_embedded.o(.ppcenv)
- *(.text*)
- }
-
- . = ALIGN(4);
- .rodata : {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- . = ALIGN(4);
- .data : {
- *(.data*)
- }
- . = ALIGN(4);
- .got : {
- *(.got)
- }
- . =.;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = ALIGN (4);
-
- .image_copy_end :
- {
- *(.__image_copy_end)
- }
-
- .rel_dyn_start :
- {
- *(.__rel_dyn_start)
- }
-
- .rel.dyn : {
- *(.rel*)
- }
-
- .rel_dyn_end :
- {
- *(.__rel_dyn_end)
- }
-
- _end = .;
-
-/*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
- */
-
- .bss_start __rel_dyn_start (OVERLAY) : {
- KEEP(*(.__bss_start));
- __bss_base = .;
- }
-
- .bss __bss_base (OVERLAY) : {
- *(.bss*)
- . = ALIGN(4);
- __bss_limit = .;
- }
- .bss_end __bss_limit (OVERLAY) : {
- KEEP(*(.__bss_end));
- }
-
- .dynsym _end : { *(.dynsym) }
- .dynbss : { *(.dynbss) }
- .dynstr : { *(.dynstr*) }
- .dynamic : { *(.dynamic*) }
- .hash : { *(.hash*) }
- .plt : { *(.plt*) }
- .interp : { *(.interp*) }
- .gnu : { *(.gnu*) }
- .ARM.exidx : { *(.ARM.exidx*) }
-}
diff --git a/board/actux3/Makefile b/board/actux3/Makefile
deleted file mode 100644
index f628f26449..0000000000
--- a/board/actux3/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := actux3.o
diff --git a/board/actux3/actux3.c b/board/actux3/actux3.c
deleted file mode 100644
index 09c803ccd4..0000000000
--- a/board/actux3/actux3.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/arch/ixp425.h>
-#include <asm/io.h>
-#include <miiphy.h>
-#include "actux3_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- /* CS1: IPAC-X */
- writel(0x94d10013, IXP425_EXP_CS1);
- /* CS5: Debug port */
- writel(0x9d520003, IXP425_EXP_CS5);
- /* CS6: Release/Option register */
- writel(0x81860001, IXP425_EXP_CS6);
- /* CS7: LEDs */
- writel(0x80900003, IXP425_EXP_CS7);
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_ETHRST);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DCD);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED5_GN);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED6_RT);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED6_GN);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_ETHRST);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DSR);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DCD);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED5_GN);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED6_RT);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_LED6_GN);
-
- /*
- * Setup GPIO's for Interrupt inputs
- */
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DBGINT);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_ETHINT);
-
- /*
- * Setup GPIO's for 33MHz clock output
- */
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
- writel(0x011001FF, IXP425_GPIO_GPCLKR);
-
- /* we need a minimum PCI reset pulse width after enabling the clock */
- udelay(533);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_ETHRST);
-
- ACTUX3_LED1_RT(1);
- ACTUX3_LED1_GN(0);
- ACTUX3_LED2_RT(0);
- ACTUX3_LED2_GN(0);
- ACTUX3_LED3_RT(0);
- ACTUX3_LED3_GN(0);
- ACTUX3_LED4_GN(0);
- ACTUX3_LED5_RT(0);
-
- return 0;
-}
-
-/*
- * Check Board Identity
- */
-int checkboard(void)
-{
- char buf[64];
- int i = getenv_f("serial#", buf, sizeof(buf));
-
- puts("Board: AcTux-3 rev.");
- putc(ACTUX3_BOARDREL + 'A' - 1);
-
- if (i > 0) {
- puts (", serial# ");
- puts (buf);
- }
- putc('\n');
-
- return 0;
-}
-
-/*************************************************************************
- * get_board_rev() - setup to pass kernel board revision information
- * 0 = reserved
- * 1 = Rev. A
- * 2 = Rev. B
- *************************************************************************/
-u32 get_board_rev(void)
-{
- return ACTUX3_BOARDREL;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
- return 0;
-}
-
-void reset_phy(void)
-{
- int i;
-
- /* initialize the PHY */
- miiphy_reset("NPE0", CONFIG_PHY_ADDR);
-
- /* all LED outputs = Link/Act */
- miiphy_write("NPE0", CONFIG_PHY_ADDR, 0x16, 0x0AAA);
-
- /*
- * The Marvell 88E6060 switch comes up with all ports disabled.
- * set all ethernet switch ports to forwarding state
- */
- for (i = 1; i <= 5; i++)
- miiphy_write("NPE0", CONFIG_PHY_ADDR + 8 + i, 0x04, 0x03);
-
-}
diff --git a/board/actux3/actux3_hw.h b/board/actux3/actux3_hw.h
deleted file mode 100644
index f8acb4d060..0000000000
--- a/board/actux3/actux3_hw.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * hardware register definitions for the AcTux-3 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ACTUX3_HW_H
-#define _ACTUX3_HW_H
-
-/* 0 = LED off,1 = ON */
-#define ACTUX3_LED1_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 0)
-#define ACTUX3_LED1_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 1)
-#define ACTUX3_LED2_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 2)
-#define ACTUX3_LED2_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 3)
-#define ACTUX3_LED3_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 4)
-#define ACTUX3_LED3_GN(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 5)
-#define ACTUX3_LED4_GN(a) writeb((a)^1, IXP425_EXP_BUS_CS7_BASE_PHYS + 6)
-#define ACTUX3_LED5_RT(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 7)
-
-#define ACTUX3_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS
-#define ACTUX3_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F)
-#define ACTUX3_OPTION (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0xF0)
-
-/* GPIO settings */
-#define CONFIG_SYS_GPIO_DBGINT 0
-#define CONFIG_SYS_GPIO_ETHINT 1
-#define CONFIG_SYS_GPIO_ETHRST 2 /* Out */
-#define CONFIG_SYS_GPIO_LED5_GN 3 /* Out */
-#define CONFIG_SYS_GPIO_LED6_RT 4 /* Out */
-#define CONFIG_SYS_GPIO_LED6_GN 5 /* Out */
-#define CONFIG_SYS_GPIO_DSR 6 /* Out */
-#define CONFIG_SYS_GPIO_DCD 7 /* Out */
-#define CONFIG_SYS_GPIO_DBGJUMPER 9
-#define CONFIG_SYS_GPIO_BUTTON1 10
-#define CONFIG_SYS_GPIO_DBGSENSE 11
-#define CONFIG_SYS_GPIO_DTR 12
-#define CONFIG_SYS_GPIO_IORST 13 /* Out */
-#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
-#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
-
-#endif
diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
deleted file mode 100644
index 2de3ca60b5..0000000000
--- a/board/actux3/u-boot.lds
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
-OUTPUT_ARCH (arm)
-ENTRY (_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN (4);
- .text : {
- *(.__image_copy_start)
- arch/arm/cpu/ixp/start.o(.text*)
- net/built-in.o(.text*)
- board/actux3/built-in.o(.text*)
- arch/arm/cpu/ixp/built-in.o(.text*)
- drivers/input/built-in.o(.text*)
-
- . = env_offset;
- common/env_embedded.o(.ppcenv)
- *(.text*)
- }
-
- . = ALIGN(4);
- .rodata : {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- . = ALIGN(4);
- .data : {
- *(.data*)
- }
- . = ALIGN(4);
- .got : {
- *(.got)
- }
- . =.;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = ALIGN (4);
-
- .image_copy_end :
- {
- *(.__image_copy_end)
- }
-
- .rel_dyn_start :
- {
- *(.__rel_dyn_start)
- }
-
- .rel.dyn : {
- *(.rel*)
- }
-
- .rel_dyn_end :
- {
- *(.__rel_dyn_end)
- }
-
- _end = .;
-
-/*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
- */
-
- .bss_start __rel_dyn_start (OVERLAY) : {
- KEEP(*(.__bss_start));
- __bss_base = .;
- }
-
- .bss __bss_base (OVERLAY) : {
- *(.bss*)
- . = ALIGN(4);
- __bss_limit = .;
- }
- .bss_end __bss_limit (OVERLAY) : {
- KEEP(*(.__bss_end));
- }
-
- .dynsym _end : { *(.dynsym) }
- .dynbss : { *(.dynbss) }
- .dynstr : { *(.dynstr*) }
- .dynamic : { *(.dynamic*) }
- .hash : { *(.hash*) }
- .plt : { *(.plt*) }
- .interp : { *(.interp*) }
- .gnu : { *(.gnu*) }
- .ARM.exidx : { *(.ARM.exidx*) }
-}
diff --git a/board/actux4/Makefile b/board/actux4/Makefile
deleted file mode 100644
index b949b608c6..0000000000
--- a/board/actux4/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := actux4.o
diff --git a/board/actux4/actux4.c b/board/actux4/actux4.c
deleted file mode 100644
index 81c545884e..0000000000
--- a/board/actux4/actux4.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/arch/ixp425.h>
-#include <asm/io.h>
-#include <miiphy.h>
-#ifdef CONFIG_PCI
-#include <pci.h>
-#include <asm/arch/ixp425pci.h>
-#endif
-
-#include "actux4_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- writel(0xbd113c42, IXP425_EXP_CS1);
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON);
-
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
-
- /* led not populated on board*/
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3);
-
- /* middle LED */
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2);
-
- /* right LED */
- /* weak pulldown = LED weak on */
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1);
-
- /* Setup GPIO's for Interrupt inputs */
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
-
- GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA);
- GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB);
- GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC);
- GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT);
- GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
- GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
-
- /* Setup GPIO's for 33MHz clock output */
- writel(0x011001FF, IXP425_GPIO_GPCLKR);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
-
- udelay(10000);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
- udelay(10000);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
- udelay(10000);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
-
- return 0;
-}
-
-/* Check Board Identity */
-int checkboard(void)
-{
- puts("Board: AcTux-4\n");
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
- return 0;
-}
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-void pci_init_board(void)
-{
- pci_ixp_init(&hose);
-}
-#endif
-
-/*
- * Hardcoded flash setup:
- * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus.
- * Flash 1 is an Intel *16 flash using the CFI driver.
- */
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
- if (banknum == 0) { /* non-CFI boot flash */
- info->portwidth = 1;
- info->chipwidth = 1;
- info->interface = FLASH_CFI_X8;
- return 1;
- } else
- return 0;
-}
diff --git a/board/actux4/actux4_hw.h b/board/actux4/actux4_hw.h
deleted file mode 100644
index b936376de9..0000000000
--- a/board/actux4/actux4_hw.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * (C) Copyright 2007
- * Michael Schwingen, michael@schwingen.org
- *
- * hardware register definitions for the AcTux-4 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ACTUX4_HW_H
-#define _ACTUX4_HW_H
-
-/*
- * GPIO settings
- */
-#define CONFIG_SYS_GPIO_USBINTA 0
-#define CONFIG_SYS_GPIO_USBINTB 1
-#define CONFIG_SYS_GPIO_USBINTC 2
-#define CONFIG_SYS_GPIO_nPWRON 3 /* Out */
-#define CONFIG_SYS_GPIO_I2C_SCL 4
-#define CONFIG_SYS_GPIO_I2C_SDA 5
-#define CONFIG_SYS_GPIO_PCI_INTB 6
-#define CONFIG_SYS_GPIO_BUTTON1 7
-#define CONFIG_SYS_GPIO_LED1 8 /* Out */
-#define CONFIG_SYS_GPIO_RTCINT 9
-#define CONFIG_SYS_GPIO_LED2 10 /* Out */
-#define CONFIG_SYS_GPIO_PCI_INTA 11
-#define CONFIG_SYS_GPIO_IORST 12 /* Out */
-#define CONFIG_SYS_GPIO_LED3 13 /* Out */
-#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
-#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
-
-#endif
diff --git a/board/boundary/nitrogen6x/README b/board/boundary/nitrogen6x/README
index 50490931e0..9d84265029 100644
--- a/board/boundary/nitrogen6x/README
+++ b/board/boundary/nitrogen6x/README
@@ -67,10 +67,10 @@ override auto-detection and force activation of the specified panel.
To build U-Boot for one of the Nitrogen6x or SabreLite board:
make nitrogen6x_config
- make u-boot.imx
+ make
Note that 'nitrogen6x' is a placeholder. The complete list of supported
-board configurations is shown in tha MAINTAINERS file:
+board configurations is shown in the boards.cfg file:
nitrogen6q i.MX6Q/6D 1GB
nitrogen6dl i.MX6DL 1GB
nitrogen6s i.MX6S 512MB
diff --git a/board/boundary/nitrogen6x/nitrogen6dl.cfg b/board/boundary/nitrogen6x/nitrogen6dl.cfg
index 97ae0c291b..1cdccad772 100644
--- a/board/boundary/nitrogen6x/nitrogen6dl.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6dl.cfg
@@ -16,7 +16,7 @@ IMAGE_VERSION 2
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
-BOOT_FROM sd
+BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
diff --git a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
index 82f837e108..516d67e4be 100644
--- a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg
@@ -16,7 +16,7 @@ IMAGE_VERSION 2
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
-BOOT_FROM sd
+BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
diff --git a/board/boundary/nitrogen6x/nitrogen6q.cfg b/board/boundary/nitrogen6x/nitrogen6q.cfg
index b6f1518ea9..b6642e6901 100644
--- a/board/boundary/nitrogen6x/nitrogen6q.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6q.cfg
@@ -16,7 +16,7 @@ IMAGE_VERSION 2
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
-BOOT_FROM sd
+BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
diff --git a/board/boundary/nitrogen6x/nitrogen6q2g.cfg b/board/boundary/nitrogen6x/nitrogen6q2g.cfg
index 8d7ff25f7f..fe6dfc1f44 100644
--- a/board/boundary/nitrogen6x/nitrogen6q2g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6q2g.cfg
@@ -16,7 +16,7 @@ IMAGE_VERSION 2
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
-BOOT_FROM sd
+BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
diff --git a/board/boundary/nitrogen6x/nitrogen6s.cfg b/board/boundary/nitrogen6x/nitrogen6s.cfg
index 34fb9d0688..ca30cd6c46 100644
--- a/board/boundary/nitrogen6x/nitrogen6s.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6s.cfg
@@ -16,7 +16,7 @@ IMAGE_VERSION 2
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
-BOOT_FROM sd
+BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
diff --git a/board/boundary/nitrogen6x/nitrogen6s1g.cfg b/board/boundary/nitrogen6x/nitrogen6s1g.cfg
index d61453c665..b1489fb907 100644
--- a/board/boundary/nitrogen6x/nitrogen6s1g.cfg
+++ b/board/boundary/nitrogen6x/nitrogen6s1g.cfg
@@ -16,7 +16,7 @@ IMAGE_VERSION 2
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
-BOOT_FROM sd
+BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
diff --git a/board/dvlhost/Makefile b/board/dvlhost/Makefile
deleted file mode 100644
index 8b489362ce..0000000000
--- a/board/dvlhost/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := dvlhost.o watchdog.o
diff --git a/board/dvlhost/dvlhost.c b/board/dvlhost/dvlhost.c
deleted file mode 100644
index 087070f40d..0000000000
--- a/board/dvlhost/dvlhost.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * (C) Copyright 2009
- * Michael Schwingen, michael@schwingen.org
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/arch/ixp425.h>
-#include <asm/io.h>
-#include <miiphy.h>
-#ifdef CONFIG_PCI
-#include <pci.h>
-#include <asm/arch/ixp425pci.h>
-#endif
-
-#include "dvlhost_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- /* CS1: LED Latch */
- writel(0xBFFF0002, IXP425_EXP_CS1);
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- /* Setup GPIOs used as output */
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_WDGTRIGGER);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DLAN_PAIRING);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PCIRST);
-
- /*
- * LED latch enable and watchdog enable are tied to the same GPIO,
- * so we need to trigger the watchdog if we want to enable the LEDs.
- */
-#ifdef CONFIG_HW_WATCHDOG
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_WDG_LED_EN);
-#else
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_WDG_LED_EN);
-#endif
-
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_WDGTRIGGER);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DLAN_PAIRING);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_WDG_LED_EN);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCIRST);
-
- /* Setup GPIOs for Interrupt inputs */
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_WLAN);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_PAIRING);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_RESET);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_IRQA);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_IRQB);
-
- /* Setup GPIO's for 33MHz clock output */
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
- writel(0x01FF01FF, IXP425_GPIO_GPCLKR);
-
- /* turn off all LEDs */
- writew(0x0000, DVLHOST_LED_LATCH);
-
- udelay(533);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_PCIRST);
-
- return 0;
-}
-
-/* Check Board Identity */
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- puts("Board: dLAN 200AV (dvlhost)");
-
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
- return 0;
-}
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-void pci_init_board(void)
-{
- pci_ixp_init(&hose);
-}
-#endif
-
-void reset_phy(void)
-{
- /* init IcPlus IP175C ethernet switch to native IP175C mode */
- miiphy_write("NPE1", 29, 31, 0x175C);
-}
diff --git a/board/dvlhost/dvlhost_hw.h b/board/dvlhost/dvlhost_hw.h
deleted file mode 100644
index 545099e9ea..0000000000
--- a/board/dvlhost/dvlhost_hw.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * (C) Copyright 2009
- * Michael Schwingen, michael@schwingen.org
- *
- * hardware register definitions for the
- * dLAN200 AV Wireless G ("dvlhost") board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _DVLHOST_HW_H
-#define _DVLHOST_HW_H
-
-/*
- * GPIO settings
- */
-#define CONFIG_SYS_GPIO_WDGTRIGGER 0 /* Out */
-#define CONFIG_SYS_GPIO_BTN_WLAN 1
-#define CONFIG_SYS_GPIO_BTN_PAIRING 6
-#define CONFIG_SYS_GPIO_DLAN_PAIRING 7 /* Out */
-#define CONFIG_SYS_GPIO_BTN_RESET 9
-#define CONFIG_SYS_GPIO_IRQB 10
-#define CONFIG_SYS_GPIO_IRQA 11
-#define CONFIG_SYS_GPIO_WDG_LED_EN 12 /* Out */
-#define CONFIG_SYS_GPIO_PCIRST 13 /* Out */
-#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
-#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
-
-#define DVLHOST_LED_LATCH IXP425_EXP_BUS_CS1_BASE_PHYS
-
-#endif
diff --git a/board/dvlhost/u-boot.lds b/board/dvlhost/u-boot.lds
deleted file mode 100644
index ebcaf447b8..0000000000
--- a/board/dvlhost/u-boot.lds
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
-OUTPUT_ARCH (arm)
-ENTRY (_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN (4);
- .text : {
- *(.__image_copy_start)
- arch/arm/cpu/ixp/start.o(.text*)
- net/built-in.o(.text*)
- board/dvlhost/built-in.o(.text*)
- arch/arm/cpu/ixp/built-in.o(.text*)
- drivers/serial/built-in.o(.text*)
-
- . = env_offset;
- common/env_embedded.o(.ppcenv)
- *(.text*)
- }
-
- . = ALIGN (4);
- .rodata : {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- . = ALIGN (4);
- .data : {
- *(.data*)
- }
- . = ALIGN (4);
- .got : {
- *(.got)
- }
- . =.;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- . = ALIGN (4);
-
- .image_copy_end :
- {
- *(.__image_copy_end)
- }
-
- .rel_dyn_start :
- {
- *(.__rel_dyn_start)
- }
-
- .rel.dyn : {
- *(.rel*)
- }
-
- .rel_dyn_end :
- {
- *(.__rel_dyn_end)
- }
-
- _end = .;
-
-/*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
- */
-
- .bss_start __rel_dyn_start (OVERLAY) : {
- KEEP(*(.__bss_start));
- __bss_base = .;
- }
-
- .bss __bss_base (OVERLAY) : {
- *(.bss*)
- . = ALIGN(4);
- __bss_limit = .;
- }
- .bss_end __bss_limit (OVERLAY) : {
- KEEP(*(.__bss_end));
- }
-
- .dynsym _end : { *(.dynsym) }
- .dynbss : { *(.dynbss) }
- .dynstr : { *(.dynstr*) }
- .dynamic : { *(.dynamic*) }
- .hash : { *(.hash*) }
- .plt : { *(.plt*) }
- .interp : { *(.interp*) }
- .gnu : { *(.gnu*) }
- .ARM.exidx : { *(.ARM.exidx*) }
-}
diff --git a/board/dvlhost/watchdog.c b/board/dvlhost/watchdog.c
deleted file mode 100644
index 02ec35eb1a..0000000000
--- a/board/dvlhost/watchdog.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * (C) Copyright 2009
- * Michael Schwingen, michael@schwingen.org
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <asm/io.h>
-#include "dvlhost_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_HW_WATCHDOG
-#include <watchdog.h>
-#include <asm/arch/ixp425.h>
-
-void hw_watchdog_reset(void)
-{
- unsigned int x;
- x = readl(IXP425_GPIO_GPOUTR);
- x ^= (1 << (CONFIG_SYS_GPIO_WDGTRIGGER));
- writel(x, IXP425_GPIO_GPOUTR);
-}
-
-#endif /* CONFIG_HW_WATCHDOG */
diff --git a/board/freescale/mx6qsabreauto/imximage.cfg b/board/freescale/mx6qsabreauto/imximage.cfg
index 6d192a6b4b..16bf473164 100644
--- a/board/freescale/mx6qsabreauto/imximage.cfg
+++ b/board/freescale/mx6qsabreauto/imximage.cfg
@@ -29,119 +29,101 @@ BOOT_FROM sd
* Address absolute address of the register
* value value to be stored in the register
*/
+DATA 4 0x020e0798 0x000C0000
+DATA 4 0x020e0758 0x00000000
+DATA 4 0x020e0588 0x00000030
+DATA 4 0x020e0594 0x00000030
+DATA 4 0x020e056c 0x00000030
+DATA 4 0x020e0578 0x00000030
+DATA 4 0x020e074c 0x00000030
+DATA 4 0x020e057c 0x00000030
+DATA 4 0x020e058c 0x00000000
+DATA 4 0x020e059c 0x00000030
+DATA 4 0x020e05a0 0x00000030
+DATA 4 0x020e078c 0x00000030
+DATA 4 0x020e0750 0x00020000
DATA 4 0x020e05a8 0x00000028
DATA 4 0x020e05b0 0x00000028
DATA 4 0x020e0524 0x00000028
DATA 4 0x020e051c 0x00000028
-
DATA 4 0x020e0518 0x00000028
DATA 4 0x020e050c 0x00000028
DATA 4 0x020e05b8 0x00000028
DATA 4 0x020e05c0 0x00000028
-
-DATA 4 0x020e05ac 0x00000028
-DATA 4 0x020e05b4 0x00000028
-DATA 4 0x020e0528 0x00000028
-DATA 4 0x020e0520 0x00000028
-
-DATA 4 0x020e0514 0x00000028
-DATA 4 0x020e0510 0x00000028
-DATA 4 0x020e05bc 0x00000028
-DATA 4 0x020e05c4 0x00000028
-
-DATA 4 0x020e056c 0x00000030
-DATA 4 0x020e0578 0x00000030
-DATA 4 0x020e0588 0x00000030
-DATA 4 0x020e0594 0x00000030
-
-DATA 4 0x020e057c 0x00000030
-DATA 4 0x020e0590 0x00000030
-DATA 4 0x020e0598 0x00000030
-DATA 4 0x020e058c 0x00000000
-
-DATA 4 0x020e059c 0x00003030
-DATA 4 0x020e05a0 0x00003030
+DATA 4 0x020e0774 0x00020000
DATA 4 0x020e0784 0x00000028
DATA 4 0x020e0788 0x00000028
-
DATA 4 0x020e0794 0x00000028
DATA 4 0x020e079c 0x00000028
DATA 4 0x020e07a0 0x00000028
DATA 4 0x020e07a4 0x00000028
-
DATA 4 0x020e07a8 0x00000028
DATA 4 0x020e0748 0x00000028
-DATA 4 0x020e074c 0x00000030
-DATA 4 0x020e0750 0x00020000
-
-DATA 4 0x020e0758 0x00000000
-DATA 4 0x020e0774 0x00020000
-DATA 4 0x020e078c 0x00000030
-DATA 4 0x020e0798 0x000C0000
-
+DATA 4 0x020e05ac 0x00000028
+DATA 4 0x020e05b4 0x00000028
+DATA 4 0x020e0528 0x00000028
+DATA 4 0x020e0520 0x00000028
+DATA 4 0x020e0514 0x00000028
+DATA 4 0x020e0510 0x00000028
+DATA 4 0x020e05bc 0x00000028
+DATA 4 0x020e05c4 0x00000028
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b080c 0x001F001F
+DATA 4 0x021b0810 0x001F001F
+DATA 4 0x021b480c 0x001F001F
+DATA 4 0x021b4810 0x001F001F
+DATA 4 0x021b083c 0x43260335
+DATA 4 0x021b0840 0x031A030B
+DATA 4 0x021b483c 0x4323033B
+DATA 4 0x021b4840 0x0323026F
+DATA 4 0x021b0848 0x483D4545
+DATA 4 0x021b4848 0x44433E48
+DATA 4 0x021b0850 0x41444840
+DATA 4 0x021b4850 0x4835483E
DATA 4 0x021b081c 0x33333333
DATA 4 0x021b0820 0x33333333
DATA 4 0x021b0824 0x33333333
DATA 4 0x021b0828 0x33333333
-
DATA 4 0x021b481c 0x33333333
DATA 4 0x021b4820 0x33333333
DATA 4 0x021b4824 0x33333333
DATA 4 0x021b4828 0x33333333
-
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b48b8 0x00000800
+DATA 4 0x021b0004 0x00020036
+DATA 4 0x021b0008 0x09444040
+DATA 4 0x021b000c 0x8A8F7955
+DATA 4 0x021b0010 0xFF328F64
+DATA 4 0x021b0014 0x01FF00DB
DATA 4 0x021b0018 0x00001740
-
DATA 4 0x021b001c 0x00008000
-DATA 4 0x021b000c 0x8A8F7975
-DATA 4 0x021b0010 0xFF538E64
-DATA 4 0x021b0014 0x01FF00DB
-DATA 4 0x021b002c 0x000026D2
-
-DATA 4 0x021b0030 0x008F0E21
-DATA 4 0x021b0008 0x09444040
-DATA 4 0x021b0004 0x00020036
+DATA 4 0x021b002c 0x000026d2
+DATA 4 0x021b0030 0x008F1023
DATA 4 0x021b0040 0x00000047
DATA 4 0x021b0000 0x841A0000
-
DATA 4 0x021b001c 0x04088032
DATA 4 0x021b001c 0x00008033
-DATA 4 0x021b001c 0x00428031
+DATA 4 0x021b001c 0x00048031
DATA 4 0x021b001c 0x09408030
-
DATA 4 0x021b001c 0x04008040
-DATA 4 0x021b0800 0xA1380003
DATA 4 0x021b0020 0x00005800
-DATA 4 0x021b0818 0x00000007
-DATA 4 0x021b4818 0x00000007
-
-/* Calibration values based on ARD and 528MHz */
-DATA 4 0x021b083c 0x434B0358
-DATA 4 0x021b0840 0x033D033C
-DATA 4 0x021b483c 0x03520362
-DATA 4 0x021b4840 0x03480318
-DATA 4 0x021b0848 0x41383A3C
-DATA 4 0x021b4848 0x3F3C374A
-DATA 4 0x021b0850 0x42434444
-DATA 4 0x021b4850 0x4932473A
-
-DATA 4 0x021b080c 0x001F001F
-DATA 4 0x021b0810 0x001F001F
-
-DATA 4 0x021b480c 0x001F001F
-DATA 4 0x021b4810 0x001F001F
-
-DATA 4 0x021b08b8 0x00000800
-DATA 4 0x021b48b8 0x00000800
-
-DATA 4 0x021b0404 0x00011006
+DATA 4 0x021b0818 0x00011117
+DATA 4 0x021b4818 0x00011117
DATA 4 0x021b0004 0x00025576
-
+DATA 4 0x021b0404 0x00011006
DATA 4 0x021b001c 0x00000000
+/* set the default clock gate to save power */
DATA 4 0x020c4068 0x00C03F3F
-DATA 4 0x020c406c 0x0030FC00
+DATA 4 0x020c406c 0x0030FC03
DATA 4 0x020c4070 0x0FFFC000
DATA 4 0x020c4074 0x3FF00000
-DATA 4 0x020c4078 0x00FFF300
-DATA 4 0x020c407c 0x0F0000C3
-DATA 4 0x020c4080 0x000003FF
+DATA 4 0x020c4078 0xFFFFF300
+DATA 4 0x020c407c 0x0F0000F3
+DATA 4 0x020c4080 0x00000FFF
+
+/* enable AXI cache for VDOA/VPU/IPU */
+DATA 4 0x020e0010 0xF00000CF
+/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+DATA 4 0x020e0018 0x007F007F
+DATA 4 0x020e001c 0x007F007F
diff --git a/board/samsung/smdk5250/lowlevel_init.S b/board/samsung/smdk5250/lowlevel_init.S
deleted file mode 100644
index 9003e2d007..0000000000
--- a/board/samsung/smdk5250/lowlevel_init.S
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Lowlevel setup for SMDK5250 board based on S5PC520
- *
- * Copyright (C) 2012 Samsung Electronics
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/arch/cpu.h>
-
-_TEXT_BASE:
- .word CONFIG_SYS_TEXT_BASE
-
- .globl lowlevel_init
-lowlevel_init:
-
- /* use iRAM stack in bl2 */
- ldr sp, =CONFIG_IRAM_STACK
- stmdb r13!, {ip,lr}
-
- /* check reset status */
- ldr r0, =(EXYNOS5_POWER_BASE + INFORM1_OFFSET)
- ldr r1, [r0]
-
- /* AFTR wakeup reset */
- ldr r2, =S5P_CHECK_DIDLE
- cmp r1, r2
- beq exit_wakeup
-
- /* LPA wakeup reset */
- ldr r2, =S5P_CHECK_LPA
- cmp r1, r2
- beq exit_wakeup
-
- /* Sleep wakeup reset */
- ldr r2, =S5P_CHECK_SLEEP
- cmp r1, r2
- beq wakeup_reset
-
- /*
- * If U-boot is already running in RAM, no need to relocate U-Boot.
- * Memory controller must be configured before relocating U-Boot
- * in ram.
- */
- ldr r0, =0x0ffffff /* r0 <- Mask Bits*/
- bic r1, pc, r0 /* pc <- current addr of code */
- /* r1 <- unmasked bits of pc */
- ldr r2, _TEXT_BASE /* r2 <- original base addr in ram */
- bic r2, r2, r0 /* r2 <- unmasked bits of r2*/
- cmp r1, r2 /* compare r1, r2 */
- beq 1f /* r0 == r1 then skip sdram init */
-
- /* init system clock */
- bl system_clock_init
-
- /* Memory initialize */
- bl mem_ctrl_init
-
-1:
- bl arch_cpu_init
- bl tzpc_init
- ldmia r13!, {ip,pc}
-
-wakeup_reset:
- bl system_clock_init
- bl mem_ctrl_init
- bl arch_cpu_init
- bl tzpc_init
-
-exit_wakeup:
- /* Load return address and jump to kernel */
- ldr r0, =(EXYNOS5_POWER_BASE + INFORM0_OFFSET)
-
- /* r1 = physical address of exynos5_cpu_resume function*/
- ldr r1, [r0]
-
- /* Jump to kernel */
- mov pc, r1
- nop
- nop
diff --git a/board/solidrun/hummingboard/hummingboard.c b/board/solidrun/hummingboard/hummingboard.c
index 8b309b49de..2e2fb2a5b7 100644
--- a/board/solidrun/hummingboard/hummingboard.c
+++ b/board/solidrun/hummingboard/hummingboard.c
@@ -156,11 +156,7 @@ int board_eth_init(bd_t *bis)
setup_iomux_enet();
- ret = cpu_eth_init(bis);
- if (ret)
- printf("FEC MXC: %s:failed\n", __func__);
-
- return ret;
+ return cpu_eth_init(bis);
}
#endif
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile
index 6301a8c149..3f19a1cd8b 100644
--- a/board/xilinx/zynq/Makefile
+++ b/board/xilinx/zynq/Makefile
@@ -6,3 +6,4 @@
#
obj-y := board.o
+obj-$(CONFIG_SPL_BUILD) += ps7_init.o
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 5a47149902..82f2345c95 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -12,12 +12,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* Bootmode setting values */
-#define ZYNQ_BM_MASK 0x0F
-#define ZYNQ_BM_NOR 0x02
-#define ZYNQ_BM_SD 0x05
-#define ZYNQ_BM_JTAG 0x0
-
#ifdef CONFIG_FPGA
Xilinx_desc fpga;
@@ -59,8 +53,6 @@ int board_init(void)
}
#endif
- icache_enable();
-
#ifdef CONFIG_FPGA
fpga_init();
fpga_add(fpga_xilinx, &fpga);
@@ -89,7 +81,6 @@ int board_late_init(void)
return 0;
}
-#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
u32 ret = 0;
@@ -123,7 +114,6 @@ int board_eth_init(bd_t *bis)
#endif
return ret;
}
-#endif
#ifdef CONFIG_CMD_MMC
int board_mmc_init(bd_t *bd)
diff --git a/board/xilinx/zynq/ps7_init.c b/board/xilinx/zynq/ps7_init.c
new file mode 100644
index 0000000000..c47da09b9e
--- /dev/null
+++ b/board/xilinx/zynq/ps7_init.c
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2014 Xilinx, Inc. Michal Simek
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <asm/arch/spl.h>
+
+__weak void ps7_init(void)
+{
+ puts("Please copy ps7_init.c/h from hw project\n");
+}