diff options
Diffstat (limited to 'board')
44 files changed, 1371 insertions, 2181 deletions
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c index 13f23fd7ce..23a98e4fdf 100644 --- a/board/BuR/common/common.c +++ b/board/BuR/common/common.c @@ -33,13 +33,14 @@ #endif #include "bur_common.h" #include "../../../drivers/video/am335x-fb.h" +#include <nand.h> static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_USE_FDT - #define FDTPROP(a, b, c) fdt_getprop_u32_default((void *)a, b, c, ~0UL) + #define FDTPROP(b, c) fdt_getprop_u32_default(gd->fdt_blob, b, c, ~0UL) #define PATHTIM "/panel/display-timings/default" #define PATHINF "/panel/panel-info" #endif @@ -50,51 +51,50 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) { struct am335x_lcdpanel pnltmp; #ifdef CONFIG_USE_FDT - u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL); u32 dtbprop; - if (dtbaddr == ~0UL) { - puts("load_lcdtiming: failed to get 'dtbaddr' from env!\n"); + if (gd->fdt_blob == NULL) { + printf("%s: don't have a valid gd->fdt_blob!\n", __func__); return -1; } memcpy(&pnltmp, (void *)panel, sizeof(struct am335x_lcdpanel)); - pnltmp.hactive = FDTPROP(dtbaddr, PATHTIM, "hactive"); - pnltmp.vactive = FDTPROP(dtbaddr, PATHTIM, "vactive"); - pnltmp.bpp = FDTPROP(dtbaddr, PATHINF, "bpp"); - pnltmp.hfp = FDTPROP(dtbaddr, PATHTIM, "hfront-porch"); - pnltmp.hbp = FDTPROP(dtbaddr, PATHTIM, "hback-porch"); - pnltmp.hsw = FDTPROP(dtbaddr, PATHTIM, "hsync-len"); - pnltmp.vfp = FDTPROP(dtbaddr, PATHTIM, "vfront-porch"); - pnltmp.vbp = FDTPROP(dtbaddr, PATHTIM, "vback-porch"); - pnltmp.vsw = FDTPROP(dtbaddr, PATHTIM, "vsync-len"); - pnltmp.pup_delay = FDTPROP(dtbaddr, PATHTIM, "pupdelay"); - pnltmp.pon_delay = FDTPROP(dtbaddr, PATHTIM, "pondelay"); + pnltmp.hactive = FDTPROP(PATHTIM, "hactive"); + pnltmp.vactive = FDTPROP(PATHTIM, "vactive"); + pnltmp.bpp = FDTPROP(PATHINF, "bpp"); + pnltmp.hfp = FDTPROP(PATHTIM, "hfront-porch"); + pnltmp.hbp = FDTPROP(PATHTIM, "hback-porch"); + pnltmp.hsw = FDTPROP(PATHTIM, "hsync-len"); + pnltmp.vfp = FDTPROP(PATHTIM, "vfront-porch"); + pnltmp.vbp = FDTPROP(PATHTIM, "vback-porch"); + pnltmp.vsw = FDTPROP(PATHTIM, "vsync-len"); + pnltmp.pup_delay = FDTPROP(PATHTIM, "pupdelay"); + pnltmp.pon_delay = FDTPROP(PATHTIM, "pondelay"); /* calc. proper clk-divisor */ - dtbprop = FDTPROP(dtbaddr, PATHTIM, "clock-frequency"); + dtbprop = FDTPROP(PATHTIM, "clock-frequency"); if (dtbprop != ~0UL) pnltmp.pxl_clk_div = 192000000 / dtbprop; else pnltmp.pxl_clk_div = ~0UL; /* check polarity of control-signals */ - dtbprop = FDTPROP(dtbaddr, PATHTIM, "hsync-active"); + dtbprop = FDTPROP(PATHTIM, "hsync-active"); if (dtbprop == 0) pnltmp.pol |= HSYNC_INVERT; - dtbprop = FDTPROP(dtbaddr, PATHTIM, "vsync-active"); + dtbprop = FDTPROP(PATHTIM, "vsync-active"); if (dtbprop == 0) pnltmp.pol |= VSYNC_INVERT; - dtbprop = FDTPROP(dtbaddr, PATHINF, "sync-ctrl"); + dtbprop = FDTPROP(PATHINF, "sync-ctrl"); if (dtbprop == 1) pnltmp.pol |= HSVS_CONTROL; - dtbprop = FDTPROP(dtbaddr, PATHINF, "sync-edge"); + dtbprop = FDTPROP(PATHINF, "sync-edge"); if (dtbprop == 1) pnltmp.pol |= HSVS_RISEFALL; - dtbprop = FDTPROP(dtbaddr, PATHTIM, "pixelclk-active"); + dtbprop = FDTPROP(PATHTIM, "pixelclk-active"); if (dtbprop == 0) pnltmp.pol |= PXCLK_INVERT; - dtbprop = FDTPROP(dtbaddr, PATHTIM, "de-active"); + dtbprop = FDTPROP(PATHTIM, "de-active"); if (dtbprop == 0) pnltmp.pol |= DE_INVERT; #else @@ -160,14 +160,24 @@ int load_lcdtiming(struct am335x_lcdpanel *panel) #ifdef CONFIG_USE_FDT static int load_devicetree(void) { + int rc; + loff_t dtbsize; + u32 dtbaddr = getenv_ulong("dtbaddr", 16, 0UL); + + if (dtbaddr == 0) { + printf("%s: don't have a valid <dtbaddr> in env!\n", __func__); + return -1; + } +#ifdef CONFIG_NAND + dtbsize = 0x20000; + rc = nand_read_skip_bad(&nand_info[0], 0x40000, (size_t *)&dtbsize, + NULL, 0x20000, (u_char *)dtbaddr); +#else char *dtbname = getenv("dtb"); char *dtbdev = getenv("dtbdev"); char *dtppart = getenv("dtbpart"); - u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL); - loff_t dtbsize; - - if (!dtbdev || !dtbdev) { - puts("load_devicetree: <dtbdev>/<dtbpart> missing.\n"); + if (!dtbdev || !dtbdev || !dtbname) { + printf("%s: <dtbdev>/<dtbpart>/<dtb> missing.\n", __func__); return -1; } @@ -175,18 +185,17 @@ static int load_devicetree(void) puts("load_devicetree: set_blk_dev failed.\n"); return -1; } - if (dtbname && dtbaddr != ~0UL) { - if (fs_read(dtbname, dtbaddr, 0, 0, &dtbsize) == 0) { - gd->fdt_blob = (void *)dtbaddr; - gd->fdt_size = dtbsize; - debug("loaded %d bytes of dtb onto 0x%08x\n", - (u32)dtbsize, dtbaddr); - return dtbsize; - } - puts("load_devicetree: load dtb failed,file does not exist!\n"); + rc = fs_read(dtbname, (u32)dtbaddr, 0, 0, &dtbsize); +#endif + if (rc == 0) { + gd->fdt_blob = (void *)dtbaddr; + gd->fdt_size = dtbsize; + debug("loaded %d bytes of dtb onto 0x%08x\n", + (u32)dtbsize, (u32)gd->fdt_blob); + return dtbsize; } - puts("load_devicetree: <dtb>/<dtbaddr> missing!\n"); + printf("%s: load dtb failed!\n", __func__); return -1; } @@ -196,26 +205,25 @@ static const char *dtbmacaddr(u32 ifno) char enet[16]; const char *mac; const char *path; - u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL); - if (dtbaddr == ~0UL) { - puts("dtbmacaddr: failed to get 'dtbaddr' from env!\n"); + if (gd->fdt_blob == NULL) { + printf("%s: don't have a valid gd->fdt_blob!\n", __func__); return NULL; } - node = fdt_path_offset((void *)dtbaddr, "/aliases"); + node = fdt_path_offset(gd->fdt_blob, "/aliases"); if (node < 0) return NULL; sprintf(enet, "ethernet%d", ifno); - path = fdt_getprop((void *)dtbaddr, node, enet, NULL); + path = fdt_getprop(gd->fdt_blob, node, enet, NULL); if (!path) { printf("no alias for %s\n", enet); return NULL; } - node = fdt_path_offset((void *)dtbaddr, path); - mac = fdt_getprop((void *)dtbaddr, node, "mac-address", &len); + node = fdt_path_offset(gd->fdt_blob, path); + mac = fdt_getprop(gd->fdt_blob, node, "mac-address", &len); if (mac && is_valid_ethaddr((u8 *)mac)) return mac; @@ -226,15 +234,14 @@ static void br_summaryscreen_printdtb(char *prefix, char *name, char *suffix) { - u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL); char buf[32] = { 0 }; const char *nodep = buf; char *mac = 0; int nodeoffset; int len; - if (dtbaddr == ~0UL) { - puts("br_summaryscreen: failed to get 'dtbaddr' from env!\n"); + if (gd->fdt_blob == NULL) { + printf("%s: don't have a valid gd->fdt_blob!\n", __func__); return; } @@ -247,13 +254,13 @@ static void br_summaryscreen_printdtb(char *prefix, if (mac) sprintf(buf, "%pM", mac); } else { - nodeoffset = fdt_path_offset((void *)dtbaddr, + nodeoffset = fdt_path_offset(gd->fdt_blob, "/factory-settings"); if (nodeoffset < 0) { puts("no 'factory-settings' in dtb!\n"); return; } - nodep = fdt_getprop((void *)dtbaddr, nodeoffset, name, &len); + nodep = fdt_getprop(gd->fdt_blob, nodeoffset, name, &len); } if (nodep && strlen(nodep) > 1) lcd_printf("%s %s %s", prefix, nodep, suffix); @@ -318,13 +325,11 @@ void lcdpower(int on) { u32 pin, swval, i; #ifdef CONFIG_USE_FDT - u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL); - - if (dtbaddr == ~0UL) { - puts("lcdpower: failed to get 'dtbaddr' from env!\n"); + if (gd->fdt_blob == NULL) { + printf("%s: don't have a valid gd->fdt_blob!\n", __func__); return; } - pin = FDTPROP(dtbaddr, PATHINF, "pwrpin"); + pin = FDTPROP(PATHINF, "pwrpin"); #else pin = getenv_ulong("ds1_pwr", 16, ~0UL); #endif @@ -385,15 +390,13 @@ void lcd_ctrl_init(void *lcdbase) void lcd_enable(void) { #ifdef CONFIG_USE_FDT - u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL); - - if (dtbaddr == ~0UL) { - puts("lcdpower: failed to get 'dtbaddr' from env!\n"); + if (gd->fdt_blob == NULL) { + printf("%s: don't have a valid gd->fdt_blob!\n", __func__); return; } - unsigned int driver = FDTPROP(dtbaddr, PATHINF, "brightdrv"); - unsigned int bright = FDTPROP(dtbaddr, PATHINF, "brightdef"); - unsigned int pwmfrq = FDTPROP(dtbaddr, PATHINF, "brightfdim"); + unsigned int driver = FDTPROP(PATHINF, "brightdrv"); + unsigned int bright = FDTPROP(PATHINF, "brightdef"); + unsigned int pwmfrq = FDTPROP(PATHINF, "brightfdim"); #else unsigned int driver = getenv_ulong("ds1_bright_drv", 16, 0UL); unsigned int bright = getenv_ulong("ds1_bright_def", 10, 50); diff --git a/board/BuR/tseries/board.c b/board/BuR/tseries/board.c index 89e989f246..d1d698e7d2 100644 --- a/board/BuR/tseries/board.c +++ b/board/BuR/tseries/board.c @@ -128,6 +128,9 @@ void am33xx_spl_board_init(void) i2c_set_bus_num(0); i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); pmicsetup(0); + + gpio_direction_output(64+29, 1); /* switch NAND_RnB to GPMC_WAIT1 */ + gpio_direction_output(64+28, 1); /* switch MII2_CRS to GPMC_WAIT0 */ } const struct dpll_params *get_dpll_ddr_params(void) diff --git a/board/BuR/tseries/mux.c b/board/BuR/tseries/mux.c index ac7e885f61..c5dc4b7625 100644 --- a/board/BuR/tseries/mux.c +++ b/board/BuR/tseries/mux.c @@ -17,8 +17,10 @@ #include <i2c.h> static struct module_pin_mux uart0_pin_mux[] = { + /* UART0_RTS */ + {OFFSET(uart0_rtsn), (MODE(0) | PULLUDEN)}, /* UART0_CTS */ - {OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, + {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* UART0_TXD */ @@ -26,9 +28,13 @@ static struct module_pin_mux uart0_pin_mux[] = { {-1}, }; static struct module_pin_mux uart1_pin_mux[] = { - /* UART0_RXD */ + /* UART1_RTS as I2C2-SCL */ + {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, + /* UART1_CTS as I2C2-SDA */ + {OFFSET(uart1_ctsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, + /* UART1_RXD */ {OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, - /* UART0_TXD */ + /* UART1_TXD */ {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, {-1}, }; @@ -123,7 +129,7 @@ static struct module_pin_mux nand_pin_mux[] = { {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ - {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ + {OFFSET(gpmc_clk), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ diff --git a/board/BuS/eb_cpu5282/u-boot.lds b/board/BuS/eb_cpu5282/u-boot.lds deleted file mode 100644 index 0df2a0aaf6..0000000000 --- a/board/BuS/eb_cpu5282/u-boot.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/armltd/integrator/Kconfig b/board/armltd/integrator/Kconfig deleted file mode 100644 index 6153b5dd7d..0000000000 --- a/board/armltd/integrator/Kconfig +++ /dev/null @@ -1,103 +0,0 @@ -if TARGET_INTEGRATORAP_CM720T - -config SYS_BOARD - default "integrator" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "integratorap" - -endif - -if TARGET_INTEGRATORAP_CM920T - -config SYS_BOARD - default "integrator" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "integratorap" - -endif - -if TARGET_INTEGRATORCP_CM920T - -config SYS_BOARD - default "integrator" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "integratorcp" - -endif - -if TARGET_INTEGRATORAP_CM926EJS - -config SYS_BOARD - default "integrator" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "integratorap" - -endif - -if TARGET_INTEGRATORCP_CM926EJS - -config SYS_BOARD - default "integrator" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "integratorcp" - -endif - -if TARGET_INTEGRATORCP_CM1136 - -config SYS_BOARD - default "integrator" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "integratorcp" - -endif - -if TARGET_INTEGRATORAP_CM946ES - -config SYS_BOARD - default "integrator" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "integratorap" - -endif - -if TARGET_INTEGRATORCP_CM946ES - -config SYS_BOARD - default "integrator" - -config SYS_VENDOR - default "armltd" - -config SYS_CONFIG_NAME - default "integratorcp" - -endif diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c index f0fe0fd3aa..e94ac850c7 100644 --- a/board/armltd/integrator/integrator.c +++ b/board/armltd/integrator/integrator.c @@ -54,8 +54,6 @@ int board_init (void) /* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100; - gd->flags = 0; - #ifdef CONFIG_CM_REMAP extern void cm_remap(void); cm_remap(); /* remaps writeable memory to 0x00000000 */ diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index 13dd667436..7cb4e0021f 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR; static const struct pl01x_serial_platdata serial_platdata = { .base = V2M_UART0, .type = TYPE_PL011, - .clock = 2400 * 1000, + .clock = CONFIG_PL011_CLOCK, }; U_BOOT_DEVICE(vexpress_serials) = { diff --git a/board/astro/mcf5373l/u-boot.lds b/board/astro/mcf5373l/u-boot.lds deleted file mode 100644 index 8ef0620ee1..0000000000 --- a/board/astro/mcf5373l/u-boot.lds +++ /dev/null @@ -1,86 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf532x/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss : - { - _sbss = .; - *(.sbss*) - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/cobra5272/u-boot.lds b/board/cobra5272/u-boot.lds deleted file mode 100644 index e91b7e1ec7..0000000000 --- a/board/cobra5272/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/davinci/da8xxevm/Kconfig b/board/davinci/da8xxevm/Kconfig index 1108e4b164..33bfcc3558 100644 --- a/board/davinci/da8xxevm/Kconfig +++ b/board/davinci/da8xxevm/Kconfig @@ -23,3 +23,16 @@ config SYS_CONFIG_NAME default "da850evm" endif + +if TARGET_OMAPL138_LCDK + +config SYS_BOARD + default "da8xxevm" + +config SYS_VENDOR + default "davinci" + +config SYS_CONFIG_NAME + default "omapl138_lcdk" + +endif diff --git a/board/davinci/da8xxevm/MAINTAINERS b/board/davinci/da8xxevm/MAINTAINERS index 10c4e2ffc0..f32ce6633a 100644 --- a/board/davinci/da8xxevm/MAINTAINERS +++ b/board/davinci/da8xxevm/MAINTAINERS @@ -12,3 +12,9 @@ F: include/configs/da850evm.h F: configs/da850_am18xxevm_defconfig F: configs/da850evm_defconfig F: configs/da850evm_direct_nor_defconfig + +OMAPL138_LCDK BOARD +M: Peter Howard <phoward@gme.net.au> +S: Maintained +F: include/configs/omap1l38_lcdk.h +F: configs/omapl138_lcdk_defconfig diff --git a/board/davinci/da8xxevm/Makefile b/board/davinci/da8xxevm/Makefile index 4da509b5e1..93e1f1d070 100644 --- a/board/davinci/da8xxevm/Makefile +++ b/board/davinci/da8xxevm/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o +obj-$(CONFIG_MACH_OMAPL138_LCDK) += omapl138_lcdk.o diff --git a/board/davinci/da8xxevm/README.omapl138-lcdk b/board/davinci/da8xxevm/README.omapl138-lcdk new file mode 100644 index 0000000000..ea0c53d043 --- /dev/null +++ b/board/davinci/da8xxevm/README.omapl138-lcdk @@ -0,0 +1,28 @@ +Summary +======= +This README assumes you have read README.da850. It contains some additional +information specific to building the omapl138-lcdk. The AIS file as generated +by the build is, currently, not useable due to differences in the flash +available on this board, as compared to the da850evm boards. + +Flash Differences +================= +Refer to the discussion in [1] for more detail - basically the da850evm uses +SPI flash whereas the lcdk uses NAND flash to store the bootloader, and +the support isn't there in the SPL code. + +It should be possible to add the support in the SPL code should someone be +sufficiently motivated. + +Using the built image +===================== +The output image to use is u-boot.bin. This needs to be converted to an +AIS file as described in [1] and then flashed using the utitilty linked to +there and also described in README.da850. You _may_ be able to write using +u-boot itself, but the commands in README.da850 won't work as they write to +SPI rather than NAND. + +Links +===== +[1] + http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/386829
\ No newline at end of file diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c new file mode 100644 index 0000000000..bef2570af6 --- /dev/null +++ b/board/davinci/da8xxevm/omapl138_lcdk.c @@ -0,0 +1,383 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * Based on da850evm.c. Original Copyrights follow: + * + * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <i2c.h> +#include <net.h> +#include <netdev.h> +#include <spi.h> +#include <spi_flash.h> +#include <asm/arch/hardware.h> +#include <asm/ti-common/davinci_nand.h> +#include <asm/io.h> +#include <asm/errno.h> +#include <asm/arch/davinci_misc.h> +#ifdef CONFIG_DAVINCI_MMC +#include <mmc.h> +#include <asm/arch/sdmmc_defs.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +#define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) + +#ifdef CONFIG_DAVINCI_MMC +/* MMC0 pin muxer settings */ +const struct pinmux_config mmc0_pins[] = { + /* GP0[11] is required for SD to work on Rev 3 EVMs */ + { pinmux(0), 8, 4 }, /* GP0[11] */ + { pinmux(10), 2, 0 }, /* MMCSD0_CLK */ + { pinmux(10), 2, 1 }, /* MMCSD0_CMD */ + { pinmux(10), 2, 2 }, /* MMCSD0_DAT_0 */ + { pinmux(10), 2, 3 }, /* MMCSD0_DAT_1 */ + { pinmux(10), 2, 4 }, /* MMCSD0_DAT_2 */ + { pinmux(10), 2, 5 }, /* MMCSD0_DAT_3 */ + /* LCDK supports only 4-bit mode, remaining pins are not configured */ +}; +#endif + +/* UART pin muxer settings */ +static const struct pinmux_config uart_pins[] = { + { pinmux(0), 4, 6 }, + { pinmux(0), 4, 7 }, + { pinmux(4), 2, 4 }, + { pinmux(4), 2, 5 } +}; + +#ifdef CONFIG_DRIVER_TI_EMAC +static const struct pinmux_config emac_pins[] = { + { pinmux(2), 8, 1 }, + { pinmux(2), 8, 2 }, + { pinmux(2), 8, 3 }, + { pinmux(2), 8, 4 }, + { pinmux(2), 8, 5 }, + { pinmux(2), 8, 6 }, + { pinmux(2), 8, 7 }, + { pinmux(3), 8, 0 }, + { pinmux(3), 8, 1 }, + { pinmux(3), 8, 2 }, + { pinmux(3), 8, 3 }, + { pinmux(3), 8, 4 }, + { pinmux(3), 8, 5 }, + { pinmux(3), 8, 6 }, + { pinmux(3), 8, 7 }, + { pinmux(4), 8, 0 }, + { pinmux(4), 8, 1 } +}; +#endif /* CONFIG_DRIVER_TI_EMAC */ + +/* I2C pin muxer settings */ +static const struct pinmux_config i2c_pins[] = { + { pinmux(4), 2, 2 }, + { pinmux(4), 2, 3 } +}; + +#ifdef CONFIG_NAND_DAVINCI +const struct pinmux_config nand_pins[] = { + { pinmux(7), 1, 1 }, + { pinmux(7), 1, 2 }, + { pinmux(7), 1, 4 }, + { pinmux(7), 1, 5 }, + { pinmux(8), 1, 0 }, + { pinmux(8), 1, 1 }, + { pinmux(8), 1, 2 }, + { pinmux(8), 1, 3 }, + { pinmux(8), 1, 4 }, + { pinmux(8), 1, 5 }, + { pinmux(8), 1, 6 }, + { pinmux(8), 1, 7 }, + { pinmux(9), 1, 0 }, + { pinmux(9), 1, 1 }, + { pinmux(9), 1, 2 }, + { pinmux(9), 1, 3 }, + { pinmux(9), 1, 4 }, + { pinmux(9), 1, 5 }, + { pinmux(9), 1, 6 }, + { pinmux(9), 1, 7 }, + { pinmux(12), 1, 5 }, + { pinmux(12), 1, 6 } +}; + +#endif + +#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII +#define HAS_RMII 1 +#else +#define HAS_RMII 0 +#endif + +const struct pinmux_resource pinmuxes[] = { + PINMUX_ITEM(uart_pins), + PINMUX_ITEM(i2c_pins), +#ifdef CONFIG_NAND_DAVINCI + PINMUX_ITEM(nand_pins), +#endif +}; + +const int pinmuxes_size = ARRAY_SIZE(pinmuxes); + +const struct lpsc_resource lpsc[] = { + { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ + { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ + { DAVINCI_LPSC_EMAC }, /* image download */ + { DAVINCI_LPSC_UART2 }, /* console */ + { DAVINCI_LPSC_GPIO }, +#ifdef CONFIG_DAVINCI_MMC + { DAVINCI_LPSC_MMC_SD }, +#endif +}; + +const int lpsc_size = ARRAY_SIZE(lpsc); + +#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK +#define CONFIG_DA850_EVM_MAX_CPU_CLK 456000000 +#endif + +/* + * get_board_rev() - setup to pass kernel board revision information + * Returns: + * bit[0-3] Maximum cpu clock rate supported by onboard SoC + * 0000b - 300 MHz + * 0001b - 372 MHz + * 0010b - 408 MHz + * 0011b - 456 MHz + */ +u32 get_board_rev(void) +{ + return 0; +} + +int board_early_init_f(void) +{ + /* + * Power on required peripherals + * ARM does not have access by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) + return 1; + + return 0; +} + +int board_init(void) +{ +#ifndef CONFIG_USE_IRQ + irq_init(); +#endif + + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + + /* setup the SUSPSRC for ARM to control emulation suspend */ + writel(readl(&davinci_syscfg_regs->suspsrc) & + ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | + DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | + DAVINCI_SYSCFG_SUSPSRC_UART2), + &davinci_syscfg_regs->suspsrc); + + /* configure pinmux settings */ + if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) + return 1; + +#ifdef CONFIG_NAND_DAVINCI + /* + * NAND CS setup - cycle counts based on da850evm NAND timings in the + * Linux kernel @ 25MHz EMIFA + */ + writel((DAVINCI_ABCR_WSETUP(15) | + DAVINCI_ABCR_WSTROBE(63) | + DAVINCI_ABCR_WHOLD(7) | + DAVINCI_ABCR_RSETUP(15) | + DAVINCI_ABCR_RSTROBE(63) | + DAVINCI_ABCR_RHOLD(7) | + DAVINCI_ABCR_TA(3) | + DAVINCI_ABCR_ASIZE_16BIT), + &davinci_emif_regs->ab2cr); /* CS3 */ +#endif + + +#ifdef CONFIG_DAVINCI_MMC + if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0) + return 1; +#endif + +#ifdef CONFIG_DRIVER_TI_EMAC + if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) + return 1; + davinci_emac_mii_mode_sel(HAS_RMII); +#endif /* CONFIG_DRIVER_TI_EMAC */ + + /* enable the console UART */ + writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | + DAVINCI_UART_PWREMU_MGMT_UTRST), + &davinci_uart2_ctrl_regs->pwremu_mgmt); + + return 0; +} + +#ifdef CONFIG_DRIVER_TI_EMAC + +/* + * Initializes on-board ethernet controllers. + */ +int board_eth_init(bd_t *bis) +{ + if (!davinci_emac_initialize()) { + printf("Error: Ethernet init failed!\n"); + return -1; + } + + return 0; +} + +#endif /* CONFIG_DRIVER_TI_EMAC */ + +#define CFG_MAC_ADDR_SPI_BUS 0 +#define CFG_MAC_ADDR_SPI_CS 0 +#define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3 + +#define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K) + +static int get_mac_addr(u8 *addr) +{ + /* Need to find a way to get MAC ADDRESS */ + return 0; +} + +void dsp_lpsc_on(unsigned domain, unsigned int id) +{ + dv_reg_p mdstat, mdctl, ptstat, ptcmd; + struct davinci_psc_regs *psc_regs; + + psc_regs = davinci_psc0_regs; + mdstat = &psc_regs->psc0.mdstat[id]; + mdctl = &psc_regs->psc0.mdctl[id]; + ptstat = &psc_regs->ptstat; + ptcmd = &psc_regs->ptcmd; + + while (*ptstat & (0x1 << domain)) + ; + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + *ptcmd = 0x1 << domain; + + while (*ptstat & (0x1 << domain)) + ; + while ((*mdstat & 0x1f) != 0x03) + ; /* Probably an overkill... */ +} + +static void dspwake(void) +{ + unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; + + /* if the device is ARM only, return */ + if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10) + return; + + if (!strcmp(getenv("dspwake"), "no")) + return; + + *resetvect++ = 0x1E000; /* DSP Idle */ + /* clear out the next 10 words as NOP */ + memset(resetvect, 0, sizeof(unsigned) * 10); + + /* setup the DSP reset vector */ + REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE; + + dsp_lpsc_on(1, DAVINCI_LPSC_GEM); + REG(PSC0_MDCTL + (15 * 4)) |= 0x100; +} + +#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII +/** + * rmii_hw_init + * + */ +int rmii_hw_init(void) +{ + return 0; +} +#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ + +int misc_init_r(void) +{ + uint8_t tmp[20], addr[10]; + + + if (getenv("ethaddr") == NULL) { + /* Read Ethernet MAC address from EEPROM */ + if (dvevm_read_mac_address(addr)) { + /* Set Ethernet MAC address from EEPROM */ + davinci_sync_env_enetaddr(addr); + } else { + get_mac_addr(addr); + } + + if (is_multicast_ethaddr(addr) || is_zero_ethaddr(addr)) { + printf("Invalid MAC address read.\n"); + return -EINVAL; + } + sprintf((char *)tmp, "%02x:%02x:%02x:%02x:%02x:%02x", addr[0], + addr[1], addr[2], addr[3], addr[4], addr[5]); + + setenv("ethaddr", (char *)tmp); + } +#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII + /* Select RMII fucntion through the expander */ + if (rmii_hw_init()) + printf("RMII hardware init failed!!!\n"); +#endif + + dspwake(); + + return 0; +} + +#ifdef CONFIG_DAVINCI_MMC +static struct davinci_mmc mmc_sd0 = { + .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, + .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ + .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, + .version = MMC_CTLR_VERSION_2, +}; + +int board_mmc_init(bd_t *bis) +{ + mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); + + /* Add slot-0 to mmc subsystem */ + return davinci_mmc_init(bis, &mmc_sd0); +} +#endif diff --git a/board/freescale/m5208evbe/u-boot.lds b/board/freescale/m5208evbe/u-boot.lds deleted file mode 100644 index 8b1a59df37..0000000000 --- a/board/freescale/m5208evbe/u-boot.lds +++ /dev/null @@ -1,86 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.sbss*) - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m52277evb/u-boot.lds b/board/freescale/m52277evb/u-boot.lds deleted file mode 100644 index 70121d9248..0000000000 --- a/board/freescale/m52277evb/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf5227x/start.o (.text*) - arch/m68k/cpu/mcf5227x/built-in.o (.text*) - arch/m68k/lib/built-in.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.sbss*) - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5235evb/u-boot.lds b/board/freescale/m5235evb/u-boot.lds deleted file mode 100644 index ccfb5d6b15..0000000000 --- a/board/freescale/m5235evb/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - .text : - { - arch/m68k/cpu/mcf523x/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5249evb/u-boot.lds b/board/freescale/m5249evb/u-boot.lds deleted file mode 100644 index e91b7e1ec7..0000000000 --- a/board/freescale/m5249evb/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5253demo/u-boot.lds b/board/freescale/m5253demo/u-boot.lds deleted file mode 100644 index cd3d70a166..0000000000 --- a/board/freescale/m5253demo/u-boot.lds +++ /dev/null @@ -1,86 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss : - { - _sbss = .; - *(.sbss*) - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5253evbe/u-boot.lds b/board/freescale/m5253evbe/u-boot.lds deleted file mode 100644 index e91b7e1ec7..0000000000 --- a/board/freescale/m5253evbe/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5272c3/u-boot.lds b/board/freescale/m5272c3/u-boot.lds deleted file mode 100644 index e91b7e1ec7..0000000000 --- a/board/freescale/m5272c3/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5275evb/u-boot.lds b/board/freescale/m5275evb/u-boot.lds deleted file mode 100644 index 3112cbe4e7..0000000000 --- a/board/freescale/m5275evb/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5282evb/u-boot.lds b/board/freescale/m5282evb/u-boot.lds deleted file mode 100644 index ce62ee9b28..0000000000 --- a/board/freescale/m5282evb/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - .text : - { - arch/m68k/cpu/mcf52x2/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m53017evb/u-boot.lds b/board/freescale/m53017evb/u-boot.lds deleted file mode 100644 index b1cae59890..0000000000 --- a/board/freescale/m53017evb/u-boot.lds +++ /dev/null @@ -1,86 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf532x/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.sbss*) - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5329evb/u-boot.lds b/board/freescale/m5329evb/u-boot.lds deleted file mode 100644 index 097ac2e8f5..0000000000 --- a/board/freescale/m5329evb/u-boot.lds +++ /dev/null @@ -1,86 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf532x/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.sbss*) - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m5373evb/u-boot.lds b/board/freescale/m5373evb/u-boot.lds deleted file mode 100644 index 8ef0620ee1..0000000000 --- a/board/freescale/m5373evb/u-boot.lds +++ /dev/null @@ -1,86 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf532x/start.o (.text*) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss : - { - _sbss = .; - *(.sbss*) - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m54418twr/u-boot.lds b/board/freescale/m54418twr/u-boot.lds deleted file mode 100644 index 5679d498f7..0000000000 --- a/board/freescale/m54418twr/u-boot.lds +++ /dev/null @@ -1,83 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf5445x/start.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m54451evb/u-boot.lds b/board/freescale/m54451evb/u-boot.lds deleted file mode 100644 index 413ca531dc..0000000000 --- a/board/freescale/m54451evb/u-boot.lds +++ /dev/null @@ -1,83 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf5445x/start.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m54455evb/u-boot.lds b/board/freescale/m54455evb/u-boot.lds deleted file mode 100644 index 5679d498f7..0000000000 --- a/board/freescale/m54455evb/u-boot.lds +++ /dev/null @@ -1,83 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf5445x/start.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m547xevb/u-boot.lds b/board/freescale/m547xevb/u-boot.lds deleted file mode 100644 index e2ffae4d55..0000000000 --- a/board/freescale/m547xevb/u-boot.lds +++ /dev/null @@ -1,83 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf547x_8x/start.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/m548xevb/u-boot.lds b/board/freescale/m548xevb/u-boot.lds deleted file mode 100644 index cd6aed6860..0000000000 --- a/board/freescale/m548xevb/u-boot.lds +++ /dev/null @@ -1,83 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf547x_8x/start.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c index b634965ad2..4160acdcc9 100644 --- a/board/freescale/vf610twr/vf610twr.c +++ b/board/freescale/vf610twr/vf610twr.c @@ -8,6 +8,7 @@ #include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/iomux-vf610.h> +#include <asm/arch/ddrmc-vf610.h> #include <asm/arch/crm_regs.h> #include <asm/arch/clock.h> #include <mmc.h> @@ -27,240 +28,63 @@ DECLARE_GLOBAL_DATA_PTR; #define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE) -void setup_iomux_ddr(void) +int dram_init(void) { - static const iomux_v3_cfg_t ddr_pads[] = { - VF610_PAD_DDR_A15__DDR_A_15, - VF610_PAD_DDR_A14__DDR_A_14, - VF610_PAD_DDR_A13__DDR_A_13, - VF610_PAD_DDR_A12__DDR_A_12, - VF610_PAD_DDR_A11__DDR_A_11, - VF610_PAD_DDR_A10__DDR_A_10, - VF610_PAD_DDR_A9__DDR_A_9, - VF610_PAD_DDR_A8__DDR_A_8, - VF610_PAD_DDR_A7__DDR_A_7, - VF610_PAD_DDR_A6__DDR_A_6, - VF610_PAD_DDR_A5__DDR_A_5, - VF610_PAD_DDR_A4__DDR_A_4, - VF610_PAD_DDR_A3__DDR_A_3, - VF610_PAD_DDR_A2__DDR_A_2, - VF610_PAD_DDR_A1__DDR_A_1, - VF610_PAD_DDR_A0__DDR_A_0, - VF610_PAD_DDR_BA2__DDR_BA_2, - VF610_PAD_DDR_BA1__DDR_BA_1, - VF610_PAD_DDR_BA0__DDR_BA_0, - VF610_PAD_DDR_CAS__DDR_CAS_B, - VF610_PAD_DDR_CKE__DDR_CKE_0, - VF610_PAD_DDR_CLK__DDR_CLK_0, - VF610_PAD_DDR_CS__DDR_CS_B_0, - VF610_PAD_DDR_D15__DDR_D_15, - VF610_PAD_DDR_D14__DDR_D_14, - VF610_PAD_DDR_D13__DDR_D_13, - VF610_PAD_DDR_D12__DDR_D_12, - VF610_PAD_DDR_D11__DDR_D_11, - VF610_PAD_DDR_D10__DDR_D_10, - VF610_PAD_DDR_D9__DDR_D_9, - VF610_PAD_DDR_D8__DDR_D_8, - VF610_PAD_DDR_D7__DDR_D_7, - VF610_PAD_DDR_D6__DDR_D_6, - VF610_PAD_DDR_D5__DDR_D_5, - VF610_PAD_DDR_D4__DDR_D_4, - VF610_PAD_DDR_D3__DDR_D_3, - VF610_PAD_DDR_D2__DDR_D_2, - VF610_PAD_DDR_D1__DDR_D_1, - VF610_PAD_DDR_D0__DDR_D_0, - VF610_PAD_DDR_DQM1__DDR_DQM_1, - VF610_PAD_DDR_DQM0__DDR_DQM_0, - VF610_PAD_DDR_DQS1__DDR_DQS_1, - VF610_PAD_DDR_DQS0__DDR_DQS_0, - VF610_PAD_DDR_RAS__DDR_RAS_B, - VF610_PAD_DDR_WE__DDR_WE_B, - VF610_PAD_DDR_ODT1__DDR_ODT_0, - VF610_PAD_DDR_ODT0__DDR_ODT_1, - VF610_PAD_DDR_RESETB, + struct ddrmc_lvl_info lvl = { + .wrlvl_reg_en = 1, + .wrlvl_dl_0 = 0, + .wrlvl_dl_1 = 0, + .rdlvl_gt_reg_en = 1, + .rdlvl_gt_dl_0 = 4, + .rdlvl_gt_dl_1 = 4, + .rdlvl_reg_en = 1, + .rdlvl_dl_0 = 0, + .rdlvl_dl_1 = 0, }; - imx_iomux_v3_setup_multiple_pads(ddr_pads, ARRAY_SIZE(ddr_pads)); -} - -void ddr_phy_init(void) -{ - struct ddrmr_regs *ddrmr = (struct ddrmr_regs *)DDR_BASE_ADDR; - - writel(DDRMC_PHY_DQ_TIMING, &ddrmr->phy[0]); - writel(DDRMC_PHY_DQ_TIMING, &ddrmr->phy[16]); - writel(DDRMC_PHY_DQ_TIMING, &ddrmr->phy[32]); - - writel(DDRMC_PHY_DQS_TIMING, &ddrmr->phy[1]); - writel(DDRMC_PHY_DQS_TIMING, &ddrmr->phy[17]); - - writel(DDRMC_PHY_CTRL, &ddrmr->phy[2]); - writel(DDRMC_PHY_CTRL, &ddrmr->phy[18]); - writel(DDRMC_PHY_CTRL, &ddrmr->phy[34]); - - writel(DDRMC_PHY_MASTER_CTRL, &ddrmr->phy[3]); - writel(DDRMC_PHY_MASTER_CTRL, &ddrmr->phy[19]); - writel(DDRMC_PHY_MASTER_CTRL, &ddrmr->phy[35]); - - writel(DDRMC_PHY_SLAVE_CTRL, &ddrmr->phy[4]); - writel(DDRMC_PHY_SLAVE_CTRL, &ddrmr->phy[20]); - writel(DDRMC_PHY_SLAVE_CTRL, &ddrmr->phy[36]); - - /* LPDDR2 only parameter */ - writel(DDRMC_PHY_OFF, &ddrmr->phy[49]); - - writel(DDRMC_PHY50_DDR3_MODE | DDRMC_PHY50_EN_SW_HALF_CYCLE, - &ddrmr->phy[50]); - - /* Processor Pad ODT settings */ - writel(DDRMC_PHY_PROC_PAD_ODT, &ddrmr->phy[52]); -} - -void ddr_ctrl_init(void) -{ - struct ddrmr_regs *ddrmr = (struct ddrmr_regs *)DDR_BASE_ADDR; - - writel(DDRMC_CR00_DRAM_CLASS_DDR3, &ddrmr->cr[0]); - writel(DDRMC_CR02_DRAM_TINIT(32), &ddrmr->cr[2]); - writel(DDRMC_CR10_TRST_PWRON(80000), &ddrmr->cr[10]); - - writel(DDRMC_CR11_CKE_INACTIVE(200000), &ddrmr->cr[11]); - writel(DDRMC_CR12_WRLAT(5) | DDRMC_CR12_CASLAT_LIN(12), &ddrmr->cr[12]); - writel(DDRMC_CR13_TRC(21) | DDRMC_CR13_TRRD(4) | DDRMC_CR13_TCCD(4), - &ddrmr->cr[13]); - writel(DDRMC_CR14_TFAW(20) | DDRMC_CR14_TRP(6) | DDRMC_CR14_TWTR(4) | - DDRMC_CR14_TRAS_MIN(15), &ddrmr->cr[14]); - writel(DDRMC_CR16_TMRD(4) | DDRMC_CR16_TRTP(4), &ddrmr->cr[16]); - writel(DDRMC_CR17_TRAS_MAX(28080) | DDRMC_CR17_TMOD(12), - &ddrmr->cr[17]); - writel(DDRMC_CR18_TCKESR(4) | DDRMC_CR18_TCKE(3), &ddrmr->cr[18]); - - writel(DDRMC_CR20_AP_EN, &ddrmr->cr[20]); - writel(DDRMC_CR21_TRCD_INT(6) | DDRMC_CR21_CCMAP_EN, &ddrmr->cr[21]); - - writel(DDRMC_CR22_TDAL(12), &ddrmr->cr[22]); - writel(DDRMC_CR23_BSTLEN(3) | DDRMC_CR23_TDLL(512), &ddrmr->cr[23]); - writel(DDRMC_CR24_TRP_AB(6), &ddrmr->cr[24]); - - writel(DDRMC_CR25_TREF_EN, &ddrmr->cr[25]); - writel(DDRMC_CR26_TREF(3120) | DDRMC_CR26_TRFC(44), &ddrmr->cr[26]); - writel(DDRMC_CR28_TREF_INT(0), &ddrmr->cr[28]); - writel(DDRMC_CR29_TPDEX(3), &ddrmr->cr[29]); - - writel(DDRMC_CR30_TXPDLL(10), &ddrmr->cr[30]); - writel(DDRMC_CR31_TXSNR(48) | DDRMC_CR31_TXSR(468), &ddrmr->cr[31]); - writel(DDRMC_CR33_EN_QK_SREF, &ddrmr->cr[33]); - writel(DDRMC_CR34_CKSRX(5) | DDRMC_CR34_CKSRE(5), &ddrmr->cr[34]); - - writel(DDRMC_CR38_FREQ_CHG_EN(0), &ddrmr->cr[38]); - writel(DDRMC_CR39_PHY_INI_COM(1024) | DDRMC_CR39_PHY_INI_STA(16) | - DDRMC_CR39_FRQ_CH_DLLOFF(2), &ddrmr->cr[39]); - - writel(DDRMC_CR41_PHY_INI_STRT_INI_DIS, &ddrmr->cr[41]); - writel(DDRMC_CR48_MR1_DA_0(70) | DDRMC_CR48_MR0_DA_0(1056), - &ddrmr->cr[48]); - - writel(DDRMC_CR66_ZQCL(256) | DDRMC_CR66_ZQINIT(512), &ddrmr->cr[66]); - writel(DDRMC_CR67_ZQCS(64), &ddrmr->cr[67]); - writel(DDRMC_CR69_ZQ_ON_SREF_EX(2), &ddrmr->cr[69]); - - writel(DDRMC_CR70_REF_PER_ZQ(64), &ddrmr->cr[70]); - writel(DDRMC_CR72_ZQCS_ROTATE(0), &ddrmr->cr[72]); - - writel(DDRMC_CR73_APREBIT(10) | DDRMC_CR73_COL_DIFF(1) | - DDRMC_CR73_ROW_DIFF(3), &ddrmr->cr[73]); - writel(DDRMC_CR74_BANKSPLT_EN | DDRMC_CR74_ADDR_CMP_EN | - DDRMC_CR74_CMD_AGE_CNT(64) | DDRMC_CR74_AGE_CNT(64), - &ddrmr->cr[74]); - writel(DDRMC_CR75_RW_PG_EN | DDRMC_CR75_RW_EN | DDRMC_CR75_PRI_EN | - DDRMC_CR75_PLEN, &ddrmr->cr[75]); - writel(DDRMC_CR76_NQENT_ACTDIS(3) | DDRMC_CR76_D_RW_G_BKCN(3) | - DDRMC_CR76_W2R_SPLT_EN, &ddrmr->cr[76]); - writel(DDRMC_CR77_CS_MAP | DDRMC_CR77_DI_RD_INTLEAVE | - DDRMC_CR77_SWAP_EN, &ddrmr->cr[77]); - writel(DDRMC_CR78_Q_FULLNESS(7) | DDRMC_CR78_BUR_ON_FLY_BIT(12), - &ddrmr->cr[78]); - writel(DDRMC_CR79_CTLUPD_AREF(0), &ddrmr->cr[79]); - - writel(DDRMC_CR82_INT_MASK, &ddrmr->cr[82]); - - writel(DDRMC_CR87_ODT_WR_MAPCS0, &ddrmr->cr[87]); - writel(DDRMC_CR88_TODTL_CMD(4), &ddrmr->cr[88]); - writel(DDRMC_CR89_AODT_RWSMCS(2), &ddrmr->cr[89]); - - writel(DDRMC_CR91_R2W_SMCSDL(2), &ddrmr->cr[91]); - writel(DDRMC_CR96_WLMRD(40) | DDRMC_CR96_WLDQSEN(25), &ddrmr->cr[96]); - writel(DDRMC_CR97_WRLVL_EN, &ddrmr->cr[97]); - writel(DDRMC_CR98_WRLVL_DL_0, &ddrmr->cr[98]); - writel(DDRMC_CR99_WRLVL_DL_1, &ddrmr->cr[99]); - - writel(DDRMC_CR102_RDLVL_GT_REGEN | DDRMC_CR102_RDLVL_REG_EN, - &ddrmr->cr[102]); - - writel(DDRMC_CR105_RDLVL_DL_0(0), &ddrmr->cr[105]); - writel(DDRMC_CR106_RDLVL_GTDL_0(4), &ddrmr->cr[106]); - writel(DDRMC_CR110_RDLVL_GTDL_1(4), &ddrmr->cr[110]); - writel(DDRMC_CR114_RDLVL_GTDL_2(0), &ddrmr->cr[114]); - writel(DDRMC_CR115_RDLVL_GTDL_2(0), &ddrmr->cr[115]); - - writel(DDRMC_CR117_AXI0_W_PRI(0) | DDRMC_CR117_AXI0_R_PRI(0), - &ddrmr->cr[117]); - writel(DDRMC_CR118_AXI1_W_PRI(1) | DDRMC_CR118_AXI1_R_PRI(1), - &ddrmr->cr[118]); - - writel(DDRMC_CR120_AXI0_PRI1_RPRI(2) | DDRMC_CR120_AXI0_PRI0_RPRI(2), - &ddrmr->cr[120]); - writel(DDRMC_CR121_AXI0_PRI3_RPRI(2) | DDRMC_CR121_AXI0_PRI2_RPRI(2), - &ddrmr->cr[121]); - writel(DDRMC_CR122_AXI1_PRI1_RPRI(1) | DDRMC_CR122_AXI1_PRI0_RPRI(1) | - DDRMC_CR122_AXI0_PRIRLX(100), &ddrmr->cr[122]); - writel(DDRMC_CR123_AXI1_P_ODR_EN | DDRMC_CR123_AXI1_PRI3_RPRI(1) | - DDRMC_CR123_AXI1_PRI2_RPRI(1), &ddrmr->cr[123]); - writel(DDRMC_CR124_AXI1_PRIRLX(100), &ddrmr->cr[124]); - - writel(DDRMC_CR126_PHY_RDLAT(8), &ddrmr->cr[126]); - writel(DDRMC_CR132_WRLAT_ADJ(5) | DDRMC_CR132_RDLAT_ADJ(6), - &ddrmr->cr[132]); - writel(DDRMC_CR137_PHYCTL_DL(2), &ddrmr->cr[137]); - writel(DDRMC_CR138_PHY_WRLV_MXDL(256) | DDRMC_CR138_PHYDRAM_CK_EN(1), - &ddrmr->cr[138]); - writel(DDRMC_CR139_PHY_WRLV_RESPLAT(4) | DDRMC_CR139_PHY_WRLV_LOAD(7) | - DDRMC_CR139_PHY_WRLV_DLL(3) | DDRMC_CR139_PHY_WRLV_EN(3), - &ddrmr->cr[139]); - writel(DDRMC_CR140_PHY_WRLV_WW(64), &ddrmr->cr[140]); - writel(DDRMC_CR143_RDLV_GAT_MXDL(1536) | DDRMC_CR143_RDLV_MXDL(128), - &ddrmr->cr[143]); - writel(DDRMC_CR144_PHY_RDLVL_RES(4) | DDRMC_CR144_PHY_RDLV_LOAD(7) | - DDRMC_CR144_PHY_RDLV_DLL(3) | DDRMC_CR144_PHY_RDLV_EN(3), - &ddrmr->cr[144]); - writel(DDRMC_CR145_PHY_RDLV_RR(64), &ddrmr->cr[145]); - writel(DDRMC_CR146_PHY_RDLVL_RESP(64), &ddrmr->cr[146]); - writel(DDRMC_CR147_RDLV_RESP_MASK(983040), &ddrmr->cr[147]); - writel(DDRMC_CR148_RDLV_GATE_RESP_MASK(983040), &ddrmr->cr[148]); - writel(DDRMC_CR151_RDLV_GAT_DQ_ZERO_CNT(1) | - DDRMC_CR151_RDLVL_DQ_ZERO_CNT(1), &ddrmr->cr[151]); - - writel(DDRMC_CR154_PAD_ZQ_EARLY_CMP_EN_TIMER(13) | - DDRMC_CR154_PAD_ZQ_MODE(1) | DDRMC_CR154_DDR_SEL_PAD_CONTR(3) | - DDRMC_CR154_PAD_ZQ_HW_FOR(1), &ddrmr->cr[154]); - writel(DDRMC_CR155_PAD_ODT_BYTE1(2) | DDRMC_CR155_PAD_ODT_BYTE0(2), - &ddrmr->cr[155]); - writel(DDRMC_CR158_TWR(6), &ddrmr->cr[158]); - writel(DDRMC_CR161_ODT_EN(1) | DDRMC_CR161_TODTH_RD(2) | - DDRMC_CR161_TODTH_WR(2), &ddrmr->cr[161]); - - ddr_phy_init(); - - writel(DDRMC_CR00_DRAM_CLASS_DDR3 | DDRMC_CR00_START, &ddrmr->cr[0]); - - udelay(200); -} + static const struct ddr3_jedec_timings timings = { + .tinit = 5, + .trst_pwron = 80000, + .cke_inactive = 200000, + .wrlat = 5, + .caslat_lin = 12, + .trc = 21, + .trrd = 4, + .tccd = 4, + .tfaw = 20, + .trp = 6, + .twtr = 4, + .tras_min = 15, + .tmrd = 4, + .trtp = 4, + .tras_max = 28080, + .tmod = 12, + .tckesr = 4, + .tcke = 3, + .trcd_int = 6, + .tdal = 12, + .tdll = 512, + .trp_ab = 6, + .tref = 3120, + .trfc = 44, + .tpdex = 3, + .txpdll = 10, + .txsnr = 48, + .txsr = 468, + .cksrx = 5, + .cksre = 5, + .zqcl = 256, + .zqinit = 512, + .zqcs = 64, + .ref_per_zq = 64, + .aprebit = 10, + .wlmrd = 40, + .wldqsen = 25, + }; -int dram_init(void) -{ - setup_iomux_ddr(); + ddrmc_setup_iomux(); - ddr_ctrl_init(); + ddrmc_ctrl_init_ddr3(&timings, &lvl, 1, 3); gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); return 0; @@ -403,7 +227,7 @@ static void clock_init(void) CCM_CCGR2_PORTD_CTRL_MASK | CCM_CCGR2_PORTE_CTRL_MASK | CCM_CCGR2_QSPI0_CTRL_MASK); clrsetbits_le32(&ccm->ccgr3, CCM_REG_CTRL_MASK, - CCM_CCGR3_ANADIG_CTRL_MASK); + CCM_CCGR3_ANADIG_CTRL_MASK | CCM_CCGR3_SCSC_CTRL_MASK); clrsetbits_le32(&ccm->ccgr4, CCM_REG_CTRL_MASK, CCM_CCGR4_WKUP_CTRL_MASK | CCM_CCGR4_CCM_CTRL_MASK | CCM_CCGR4_GPC_CTRL_MASK | CCM_CCGR4_I2C0_CTRL_MASK); @@ -484,9 +308,20 @@ int board_early_init_f(void) int board_init(void) { + struct scsc_reg *scsc = (struct scsc_reg *)SCSC_BASE_ADDR; + /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + /* + * Enable external 32K Oscillator + * + * The internal clock experiences significant drift + * so we must use the external oscillator in order + * to maintain correct time in the hwclock + */ + setbits_le32(&scsc->sosc_ctr, SCSC_SOSC_CTR_SOSC_EN); + return 0; } diff --git a/board/st/stm32f429-discovery/Kconfig b/board/st/stm32f429-discovery/Kconfig new file mode 100644 index 0000000000..e73d11bada --- /dev/null +++ b/board/st/stm32f429-discovery/Kconfig @@ -0,0 +1,19 @@ +if TARGET_STM32F429_DISCOVERY + +config SYS_BOARD + string + default "stm32f429-discovery" + +config SYS_VENDOR + string + default "st" + +config SYS_SOC + string + default "stm32f4" + +config SYS_CONFIG_NAME + string + default "stm32f429-discovery" + +endif diff --git a/board/st/stm32f429-discovery/MAINTAINERS b/board/st/stm32f429-discovery/MAINTAINERS new file mode 100644 index 0000000000..78b0d28790 --- /dev/null +++ b/board/st/stm32f429-discovery/MAINTAINERS @@ -0,0 +1,5 @@ +M: Kamil Lulko <rev13@wp.pl> +S: Maintained +F: board/st/stm32f429-discovery/ +F: include/configs/stm32f429-discovery.h +F: configs/stm32f429-discovery_defconfig diff --git a/board/st/stm32f429-discovery/Makefile b/board/st/stm32f429-discovery/Makefile new file mode 100644 index 0000000000..7e764e3308 --- /dev/null +++ b/board/st/stm32f429-discovery/Makefile @@ -0,0 +1,12 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2015 +# Kamil Lulko, <rev13@wp.pl> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := stm32f429-discovery.o +obj-y += led.o diff --git a/board/st/stm32f429-discovery/led.c b/board/st/stm32f429-discovery/led.c new file mode 100644 index 0000000000..306e550a7c --- /dev/null +++ b/board/st/stm32f429-discovery/led.c @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2015 + * Kamil Lulko, <rev13@wp.pl> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm-generic/gpio.h> + +void coloured_LED_init(void) +{ + gpio_direction_output(CONFIG_RED_LED, 0); + gpio_direction_output(CONFIG_GREEN_LED, 0); +} + +void red_led_off(void) +{ + gpio_set_value(CONFIG_RED_LED, 0); +} + +void green_led_off(void) +{ + gpio_set_value(CONFIG_GREEN_LED, 0); +} + +void red_led_on(void) +{ + gpio_set_value(CONFIG_RED_LED, 1); +} + +void green_led_on(void) +{ + gpio_set_value(CONFIG_GREEN_LED, 1); +} diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c new file mode 100644 index 0000000000..2c4830f790 --- /dev/null +++ b/board/st/stm32f429-discovery/stm32f429-discovery.c @@ -0,0 +1,287 @@ +/* + * (C) Copyright 2011, 2012, 2013 + * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com + * Alexander Potashev, Emcraft Systems, aspotashev@emcraft.com + * Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com + * Pavel Boldin, Emcraft Systems, paboldin@emcraft.com + * + * (C) Copyright 2015 + * Kamil Lulko, <rev13@wp.pl> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/armv7m.h> +#include <asm/arch/stm32.h> +#include <asm/arch/gpio.h> +#include <asm/arch/fmc.h> + +DECLARE_GLOBAL_DATA_PTR; + +const struct stm32_gpio_ctl gpio_ctl_gpout = { + .mode = STM32_GPIO_MODE_OUT, + .otype = STM32_GPIO_OTYPE_PP, + .speed = STM32_GPIO_SPEED_50M, + .pupd = STM32_GPIO_PUPD_NO, + .af = STM32_GPIO_AF0 +}; + +const struct stm32_gpio_ctl gpio_ctl_usart = { + .mode = STM32_GPIO_MODE_AF, + .otype = STM32_GPIO_OTYPE_PP, + .speed = STM32_GPIO_SPEED_50M, + .pupd = STM32_GPIO_PUPD_UP, + .af = STM32_GPIO_AF7 +}; + +static const struct stm32_gpio_dsc usart1_gpio[] = { + {STM32_GPIO_PORT_A, STM32_GPIO_PIN_9}, /* TX */ + {STM32_GPIO_PORT_A, STM32_GPIO_PIN_10}, /* RX */ +}; + +int uart1_setup_gpio(void) +{ + int i; + int rv = 0; + + for (i = 0; i < ARRAY_SIZE(usart1_gpio); i++) { + rv = stm32_gpio_config(&usart1_gpio[i], &gpio_ctl_usart); + if (rv) + goto out; + } + +out: + return rv; +} + +const struct stm32_gpio_ctl gpio_ctl_fmc = { + .mode = STM32_GPIO_MODE_AF, + .otype = STM32_GPIO_OTYPE_PP, + .speed = STM32_GPIO_SPEED_100M, + .pupd = STM32_GPIO_PUPD_NO, + .af = STM32_GPIO_AF12 +}; + +static const struct stm32_gpio_dsc ext_ram_fmc_gpio[] = { + /* Chip is LQFP144, see DM00077036.pdf for details */ + {STM32_GPIO_PORT_D, STM32_GPIO_PIN_10}, /* 79, FMC_D15 */ + {STM32_GPIO_PORT_D, STM32_GPIO_PIN_9}, /* 78, FMC_D14 */ + {STM32_GPIO_PORT_D, STM32_GPIO_PIN_8}, /* 77, FMC_D13 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_15}, /* 68, FMC_D12 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_14}, /* 67, FMC_D11 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_13}, /* 66, FMC_D10 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_12}, /* 65, FMC_D9 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_11}, /* 64, FMC_D8 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_10}, /* 63, FMC_D7 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_9}, /* 60, FMC_D6 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_8}, /* 59, FMC_D5 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_7}, /* 58, FMC_D4 */ + {STM32_GPIO_PORT_D, STM32_GPIO_PIN_1}, /* 115, FMC_D3 */ + {STM32_GPIO_PORT_D, STM32_GPIO_PIN_0}, /* 114, FMC_D2 */ + {STM32_GPIO_PORT_D, STM32_GPIO_PIN_15}, /* 86, FMC_D1 */ + {STM32_GPIO_PORT_D, STM32_GPIO_PIN_14}, /* 85, FMC_D0 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_1}, /* 142, FMC_NBL1 */ + {STM32_GPIO_PORT_E, STM32_GPIO_PIN_0}, /* 141, FMC_NBL0 */ + {STM32_GPIO_PORT_G, STM32_GPIO_PIN_5}, /* 90, FMC_A15, BA1 */ + {STM32_GPIO_PORT_G, STM32_GPIO_PIN_4}, /* 89, FMC_A14, BA0 */ + {STM32_GPIO_PORT_G, STM32_GPIO_PIN_1}, /* 57, FMC_A11 */ + {STM32_GPIO_PORT_G, STM32_GPIO_PIN_0}, /* 56, FMC_A10 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_15}, /* 55, FMC_A9 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_14}, /* 54, FMC_A8 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_13}, /* 53, FMC_A7 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_12}, /* 50, FMC_A6 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_5}, /* 15, FMC_A5 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_4}, /* 14, FMC_A4 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_3}, /* 13, FMC_A3 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_2}, /* 12, FMC_A2 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_1}, /* 11, FMC_A1 */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_0}, /* 10, FMC_A0 */ + {STM32_GPIO_PORT_B, STM32_GPIO_PIN_6}, /* 136, SDRAM_NE */ + {STM32_GPIO_PORT_F, STM32_GPIO_PIN_11}, /* 49, SDRAM_NRAS */ + {STM32_GPIO_PORT_G, STM32_GPIO_PIN_15}, /* 132, SDRAM_NCAS */ + {STM32_GPIO_PORT_C, STM32_GPIO_PIN_0}, /* 26, SDRAM_NWE */ + {STM32_GPIO_PORT_B, STM32_GPIO_PIN_5}, /* 135, SDRAM_CKE */ + {STM32_GPIO_PORT_G, STM32_GPIO_PIN_8}, /* 93, SDRAM_CLK */ +}; + +static int fmc_setup_gpio(void) +{ + int rv = 0; + int i; + + for (i = 0; i < ARRAY_SIZE(ext_ram_fmc_gpio); i++) { + rv = stm32_gpio_config(&ext_ram_fmc_gpio[i], + &gpio_ctl_fmc); + if (rv) + goto out; + } + +out: + return rv; +} + +/* + * STM32 RCC FMC specific definitions + */ +#define STM32_RCC_ENR_FMC (1 << 0) /* FMC module clock */ + +static inline u32 _ns2clk(u32 ns, u32 freq) +{ + u32 tmp = freq/1000000; + return (tmp * ns) / 1000; +} + +#define NS2CLK(ns) (_ns2clk(ns, freq)) + +/* + * Following are timings for IS42S16400J, from corresponding datasheet + */ +#define SDRAM_CAS 3 /* 3 cycles */ +#define SDRAM_NB 1 /* Number of banks */ +#define SDRAM_MWID 1 /* 16 bit memory */ + +#define SDRAM_NR 0x1 /* 12-bit row */ +#define SDRAM_NC 0x0 /* 8-bit col */ +#define SDRAM_RBURST 0x1 /* Single read requests always as bursts */ +#define SDRAM_RPIPE 0x0 /* No HCLK clock cycle delay */ + +#define SDRAM_TRRD (NS2CLK(14) - 1) +#define SDRAM_TRCD (NS2CLK(15) - 1) +#define SDRAM_TRP (NS2CLK(15) - 1) +#define SDRAM_TRAS (NS2CLK(42) - 1) +#define SDRAM_TRC (NS2CLK(63) - 1) +#define SDRAM_TRFC (NS2CLK(63) - 1) +#define SDRAM_TCDL (1 - 1) +#define SDRAM_TRDL (2 - 1) +#define SDRAM_TBDL (1 - 1) +#define SDRAM_TREF 1386 +#define SDRAM_TCCD (1 - 1) + +#define SDRAM_TXSR (NS2CLK(70) - 1)/* Row cycle time after precharge */ +#define SDRAM_TMRD (3 - 1) /* Page 10, Mode Register Set */ + +/* Last data-in to row precharge, need also comply ineq from RM 37.7.5 */ +#define SDRAM_TWR max(\ + (int)max((int)SDRAM_TRDL, (int)(SDRAM_TRAS - SDRAM_TRCD - 1)), \ + (int)(SDRAM_TRC - SDRAM_TRCD - SDRAM_TRP - 2)\ +) + +#define SDRAM_MODE_BL_SHIFT 0 +#define SDRAM_MODE_CAS_SHIFT 4 +#define SDRAM_MODE_BL 0 +#define SDRAM_MODE_CAS SDRAM_CAS + +int dram_init(void) +{ + u32 freq; + int rv; + + rv = fmc_setup_gpio(); + if (rv) + return rv; + + setbits_le32(&STM32_RCC->ahb3enr, STM32_RCC_ENR_FMC); + + /* + * Get frequency for NS2CLK calculation. + */ + freq = clock_get(CLOCK_AHB) / CONFIG_SYS_RAM_FREQ_DIV; + + writel(CONFIG_SYS_RAM_FREQ_DIV << FMC_SDCR_SDCLK_SHIFT + | SDRAM_RPIPE << FMC_SDCR_RPIPE_SHIFT + | SDRAM_RBURST << FMC_SDCR_RBURST_SHIFT, + &STM32_SDRAM_FMC->sdcr1); + + writel(CONFIG_SYS_RAM_FREQ_DIV << FMC_SDCR_SDCLK_SHIFT + | SDRAM_CAS << FMC_SDCR_CAS_SHIFT + | SDRAM_NB << FMC_SDCR_NB_SHIFT + | SDRAM_MWID << FMC_SDCR_MWID_SHIFT + | SDRAM_NR << FMC_SDCR_NR_SHIFT + | SDRAM_NC << FMC_SDCR_NC_SHIFT + | SDRAM_RPIPE << FMC_SDCR_RPIPE_SHIFT + | SDRAM_RBURST << FMC_SDCR_RBURST_SHIFT, + &STM32_SDRAM_FMC->sdcr2); + + writel(SDRAM_TRP << FMC_SDTR_TRP_SHIFT + | SDRAM_TRC << FMC_SDTR_TRC_SHIFT, + &STM32_SDRAM_FMC->sdtr1); + + writel(SDRAM_TRCD << FMC_SDTR_TRCD_SHIFT + | SDRAM_TRP << FMC_SDTR_TRP_SHIFT + | SDRAM_TWR << FMC_SDTR_TWR_SHIFT + | SDRAM_TRC << FMC_SDTR_TRC_SHIFT + | SDRAM_TRAS << FMC_SDTR_TRAS_SHIFT + | SDRAM_TXSR << FMC_SDTR_TXSR_SHIFT + | SDRAM_TMRD << FMC_SDTR_TMRD_SHIFT, + &STM32_SDRAM_FMC->sdtr2); + + writel(FMC_SDCMR_BANK_2 | FMC_SDCMR_MODE_START_CLOCK, + &STM32_SDRAM_FMC->sdcmr); + + udelay(200); /* 200 us delay, page 10, "Power-Up" */ + FMC_BUSY_WAIT(); + + writel(FMC_SDCMR_BANK_2 | FMC_SDCMR_MODE_PRECHARGE, + &STM32_SDRAM_FMC->sdcmr); + + udelay(100); + FMC_BUSY_WAIT(); + + writel((FMC_SDCMR_BANK_2 | FMC_SDCMR_MODE_AUTOREFRESH + | 7 << FMC_SDCMR_NRFS_SHIFT), &STM32_SDRAM_FMC->sdcmr); + + udelay(100); + FMC_BUSY_WAIT(); + + writel(FMC_SDCMR_BANK_2 | (SDRAM_MODE_BL << SDRAM_MODE_BL_SHIFT + | SDRAM_MODE_CAS << SDRAM_MODE_CAS_SHIFT) + << FMC_SDCMR_MODE_REGISTER_SHIFT | FMC_SDCMR_MODE_WRITE_MODE, + &STM32_SDRAM_FMC->sdcmr); + + udelay(100); + + FMC_BUSY_WAIT(); + + writel(FMC_SDCMR_BANK_2 | FMC_SDCMR_MODE_NORMAL, + &STM32_SDRAM_FMC->sdcmr); + + FMC_BUSY_WAIT(); + + /* Refresh timer */ + writel(SDRAM_TREF, &STM32_SDRAM_FMC->sdrtr); + + /* + * Fill in global info with description of SRAM configuration + */ + gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE; + gd->bd->bi_dram[0].size = CONFIG_SYS_RAM_SIZE; + + gd->ram_size = CONFIG_SYS_RAM_SIZE; + + return rv; +} + +u32 get_board_rev(void) +{ + return 0; +} + +int board_early_init_f(void) +{ + int res; + + res = uart1_setup_gpio(); + if (res) + return res; + + return 0; +} + +int board_init(void) +{ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} diff --git a/board/sysam/amcore/u-boot.lds b/board/sysam/amcore/u-boot.lds deleted file mode 100644 index 2f7a24132c..0000000000 --- a/board/sysam/amcore/u-boot.lds +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Linker script for Sysam AMCORE board - * - * (C) Copyright 2014 Angelo Dureghello <angelo@sysam.it> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(m68k) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - .text : - { - arch/m68k/cpu/mcf530x/start.o (.text) - - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.text) - - *(.text) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - - .reloc : - { - __got_start = .; - KEEP(*(.got)) - __got_end = .; - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.sdata) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - _sbss = .; - *(.sbss*) - *(.bss*) - *(COMMON) - . = ALIGN(4); - _ebss = .; - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index c1019289ba..d4648558ec 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -93,10 +93,16 @@ int board_init(void) int board_late_init(void) { #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + u32 id[4]; + if (omap_revision() == DRA722_ES1_0) setenv("board_name", "dra72x"); else setenv("board_name", "dra7xx"); + + id[0] = readl((*ctrl)->control_std_fuse_die_id_0); + id[1] = readl((*ctrl)->control_std_fuse_die_id_1); + usb_set_serial_num_from_die_id(id); #endif return 0; } diff --git a/board/toradex/colibri_vf/Kconfig b/board/toradex/colibri_vf/Kconfig new file mode 100644 index 0000000000..2c3cb307fd --- /dev/null +++ b/board/toradex/colibri_vf/Kconfig @@ -0,0 +1,18 @@ +if TARGET_COLIBRI_VF + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "colibri_vf" + +config SYS_VENDOR + default "toradex" + +config SYS_SOC + default "vf610" + +config SYS_CONFIG_NAME + default "colibri_vf" + +endif diff --git a/board/toradex/colibri_vf/MAINTAINERS b/board/toradex/colibri_vf/MAINTAINERS new file mode 100644 index 0000000000..551c575c9d --- /dev/null +++ b/board/toradex/colibri_vf/MAINTAINERS @@ -0,0 +1,6 @@ +Colibri VFxx +M: Stefan Agner <stefan.agner@toradex.com> +S: Maintained +F: board/toradex/colibri_vf/ +F: include/configs/colibri_vf.h +F: configs/colibri_vf_defconfig diff --git a/board/toradex/colibri_vf/Makefile b/board/toradex/colibri_vf/Makefile new file mode 100644 index 0000000000..c7e5134ba1 --- /dev/null +++ b/board/toradex/colibri_vf/Makefile @@ -0,0 +1,7 @@ +# +# Copyright 2013 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := colibri_vf.o diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c new file mode 100644 index 0000000000..31ebb1935f --- /dev/null +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -0,0 +1,385 @@ +/* + * Copyright 2015 Toradex, Inc. + * + * Based on vf610twr.c: + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux-vf610.h> +#include <asm/arch/ddrmc-vf610.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/clock.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <miiphy.h> +#include <netdev.h> +#include <i2c.h> +#include <g_dnl.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE) + +#define ESDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \ + PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ + PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE) + +int dram_init(void) +{ + static const struct ddr3_jedec_timings timings = { + .tinit = 5, + .trst_pwron = 80000, + .cke_inactive = 200000, + .wrlat = 5, + .caslat_lin = 12, + .trc = 21, + .trrd = 4, + .tccd = 4, + .tfaw = 20, + .trp = 6, + .twtr = 4, + .tras_min = 15, + .tmrd = 4, + .trtp = 4, + .tras_max = 28080, + .tmod = 12, + .tckesr = 4, + .tcke = 3, + .trcd_int = 6, + .tdal = 12, + .tdll = 512, + .trp_ab = 6, + .tref = 3120, + .trfc = 64, + .tpdex = 3, + .txpdll = 10, + .txsnr = 48, + .txsr = 468, + .cksrx = 5, + .cksre = 5, + .zqcl = 256, + .zqinit = 512, + .zqcs = 64, + .ref_per_zq = 64, + .aprebit = 10, + .wlmrd = 40, + .wldqsen = 25, + }; + + ddrmc_setup_iomux(); + + ddrmc_ctrl_init_ddr3(&timings, NULL, 1, 2); + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + + return 0; +} + +static void setup_iomux_uart(void) +{ + static const iomux_v3_cfg_t uart_pads[] = { + NEW_PAD_CTRL(VF610_PAD_PTB4__UART1_TX, UART_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTB5__UART1_RX, UART_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTB10__UART0_TX, UART_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTB11__UART0_RX, UART_PAD_CTRL), + }; + + imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); +} + +static void setup_iomux_enet(void) +{ + static const iomux_v3_cfg_t enet0_pads[] = { + NEW_PAD_CTRL(VF610_PAD_PTA6__RMII0_CLKOUT, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC10__RMII1_MDIO, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC9__RMII1_MDC, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC11__RMII1_CRS_DV, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC12__RMII1_RD1, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC13__RMII1_RD0, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC14__RMII1_RXER, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC15__RMII1_TD1, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC16__RMII1_TD0, ENET_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTC17__RMII1_TXEN, ENET_PAD_CTRL), + }; + + imx_iomux_v3_setup_multiple_pads(enet0_pads, ARRAY_SIZE(enet0_pads)); +} + +static void setup_iomux_i2c(void) +{ + static const iomux_v3_cfg_t i2c0_pads[] = { + VF610_PAD_PTB14__I2C0_SCL, + VF610_PAD_PTB15__I2C0_SDA, + }; + + imx_iomux_v3_setup_multiple_pads(i2c0_pads, ARRAY_SIZE(i2c0_pads)); +} + +#ifdef CONFIG_NAND_VF610_NFC +static void setup_iomux_nfc(void) +{ + static const iomux_v3_cfg_t nfc_pads[] = { + VF610_PAD_PTD23__NF_IO7, + VF610_PAD_PTD22__NF_IO6, + VF610_PAD_PTD21__NF_IO5, + VF610_PAD_PTD20__NF_IO4, + VF610_PAD_PTD19__NF_IO3, + VF610_PAD_PTD18__NF_IO2, + VF610_PAD_PTD17__NF_IO1, + VF610_PAD_PTD16__NF_IO0, + VF610_PAD_PTB24__NF_WE_B, + VF610_PAD_PTB25__NF_CE0_B, + VF610_PAD_PTB27__NF_RE_B, + VF610_PAD_PTC26__NF_RB_B, + VF610_PAD_PTC27__NF_ALE, + VF610_PAD_PTC28__NF_CLE + }; + + imx_iomux_v3_setup_multiple_pads(nfc_pads, ARRAY_SIZE(nfc_pads)); +} +#endif + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1] = { + {ESDHC1_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + /* eSDHC1 is always present */ + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + static const iomux_v3_cfg_t esdhc1_pads[] = { + NEW_PAD_CTRL(VF610_PAD_PTA24__ESDHC1_CLK, ESDHC_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTA25__ESDHC1_CMD, ESDHC_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTA26__ESDHC1_DAT0, ESDHC_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTA27__ESDHC1_DAT1, ESDHC_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTA28__ESDHC1_DAT2, ESDHC_PAD_CTRL), + NEW_PAD_CTRL(VF610_PAD_PTA29__ESDHC1_DAT3, ESDHC_PAD_CTRL), + }; + + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + imx_iomux_v3_setup_multiple_pads( + esdhc1_pads, ARRAY_SIZE(esdhc1_pads)); + + return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); +} +#endif + +static inline int is_colibri_vf61(void) +{ + struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR; + + /* + * Detect board type by Level 2 Cache: VF50 don't have any + * Level 2 Cache. + */ + return !!mscm->cpxcfg1; +} + +static void clock_init(void) +{ + struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR; + struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR; + u32 pfd_clk_sel, ddr_clk_sel; + + clrsetbits_le32(&ccm->ccgr0, CCM_REG_CTRL_MASK, + CCM_CCGR0_UART0_CTRL_MASK); + clrsetbits_le32(&ccm->ccgr1, CCM_REG_CTRL_MASK, + CCM_CCGR1_PIT_CTRL_MASK | CCM_CCGR1_WDOGA5_CTRL_MASK); + clrsetbits_le32(&ccm->ccgr2, CCM_REG_CTRL_MASK, + CCM_CCGR2_IOMUXC_CTRL_MASK | CCM_CCGR2_PORTA_CTRL_MASK | + CCM_CCGR2_PORTB_CTRL_MASK | CCM_CCGR2_PORTC_CTRL_MASK | + CCM_CCGR2_PORTD_CTRL_MASK | CCM_CCGR2_PORTE_CTRL_MASK); + clrsetbits_le32(&ccm->ccgr3, CCM_REG_CTRL_MASK, + CCM_CCGR3_ANADIG_CTRL_MASK | CCM_CCGR3_SCSC_CTRL_MASK); + clrsetbits_le32(&ccm->ccgr4, CCM_REG_CTRL_MASK, + CCM_CCGR4_WKUP_CTRL_MASK | CCM_CCGR4_CCM_CTRL_MASK | + CCM_CCGR4_GPC_CTRL_MASK | CCM_CCGR4_I2C0_CTRL_MASK); + clrsetbits_le32(&ccm->ccgr6, CCM_REG_CTRL_MASK, + CCM_CCGR6_OCOTP_CTRL_MASK | CCM_CCGR6_DDRMC_CTRL_MASK); + clrsetbits_le32(&ccm->ccgr7, CCM_REG_CTRL_MASK, + CCM_CCGR7_SDHC1_CTRL_MASK); + clrsetbits_le32(&ccm->ccgr9, CCM_REG_CTRL_MASK, + CCM_CCGR9_FEC0_CTRL_MASK | CCM_CCGR9_FEC1_CTRL_MASK); + clrsetbits_le32(&ccm->ccgr10, CCM_REG_CTRL_MASK, + CCM_CCGR10_NFC_CTRL_MASK); + +#ifdef CONFIG_CI_UDC + setbits_le32(&ccm->ccgr1, CCM_CCGR1_USBC0_CTRL_MASK); +#endif + +#ifdef CONFIG_USB_EHCI + setbits_le32(&ccm->ccgr7, CCM_CCGR7_USBC1_CTRL_MASK); +#endif + + clrsetbits_le32(&anadig->pll5_ctrl, ANADIG_PLL5_CTRL_BYPASS | + ANADIG_PLL5_CTRL_POWERDOWN, ANADIG_PLL5_CTRL_ENABLE | + ANADIG_PLL5_CTRL_DIV_SELECT); + + if (is_colibri_vf61()) { + clrsetbits_le32(&anadig->pll2_ctrl, ANADIG_PLL5_CTRL_BYPASS | + ANADIG_PLL2_CTRL_POWERDOWN, + ANADIG_PLL2_CTRL_ENABLE | + ANADIG_PLL2_CTRL_DIV_SELECT); + } + + clrsetbits_le32(&anadig->pll1_ctrl, ANADIG_PLL1_CTRL_POWERDOWN, + ANADIG_PLL1_CTRL_ENABLE | ANADIG_PLL1_CTRL_DIV_SELECT); + + clrsetbits_le32(&ccm->ccr, CCM_CCR_OSCNT_MASK, + CCM_CCR_FIRC_EN | CCM_CCR_OSCNT(5)); + + /* See "Typical PLL Configuration" */ + if (is_colibri_vf61()) { + pfd_clk_sel = CCM_CCSR_PLL1_PFD_CLK_SEL(1); + ddr_clk_sel = CCM_CCSR_DDRC_CLK_SEL(0); + } else { + pfd_clk_sel = CCM_CCSR_PLL1_PFD_CLK_SEL(3); + ddr_clk_sel = CCM_CCSR_DDRC_CLK_SEL(1); + } + + clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, pfd_clk_sel | + CCM_CCSR_PLL2_PFD4_EN | CCM_CCSR_PLL2_PFD3_EN | + CCM_CCSR_PLL2_PFD2_EN | CCM_CCSR_PLL2_PFD1_EN | + CCM_CCSR_PLL1_PFD4_EN | CCM_CCSR_PLL1_PFD3_EN | + CCM_CCSR_PLL1_PFD2_EN | CCM_CCSR_PLL1_PFD1_EN | + ddr_clk_sel | CCM_CCSR_FAST_CLK_SEL(1) | + CCM_CCSR_SYS_CLK_SEL(4)); + + clrsetbits_le32(&ccm->cacrr, CCM_REG_CTRL_MASK, + CCM_CACRR_IPG_CLK_DIV(1) | CCM_CACRR_BUS_CLK_DIV(2) | + CCM_CACRR_ARM_CLK_DIV(0)); + clrsetbits_le32(&ccm->cscmr1, CCM_REG_CTRL_MASK, + CCM_CSCMR1_ESDHC1_CLK_SEL(3) | + CCM_CSCMR1_NFC_CLK_SEL(0)); + clrsetbits_le32(&ccm->cscdr1, CCM_REG_CTRL_MASK, + CCM_CSCDR1_RMII_CLK_EN); + clrsetbits_le32(&ccm->cscdr2, CCM_REG_CTRL_MASK, + CCM_CSCDR2_ESDHC1_EN | CCM_CSCDR2_ESDHC1_CLK_DIV(0) | + CCM_CSCDR2_NFC_EN); + clrsetbits_le32(&ccm->cscdr3, CCM_REG_CTRL_MASK, + CCM_CSCDR3_NFC_PRE_DIV(5)); + clrsetbits_le32(&ccm->cscmr2, CCM_REG_CTRL_MASK, + CCM_CSCMR2_RMII_CLK_SEL(2)); +} + +static void mscm_init(void) +{ + struct mscm_ir *mscmir = (struct mscm_ir *)MSCM_IR_BASE_ADDR; + int i; + + for (i = 0; i < MSCM_IRSPRC_NUM; i++) + writew(MSCM_IRSPRC_CP0_EN, &mscmir->irsprc[i]); +} + +int board_phy_config(struct phy_device *phydev) +{ + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_early_init_f(void) +{ + clock_init(); + mscm_init(); + + setup_iomux_uart(); + setup_iomux_enet(); + setup_iomux_i2c(); +#ifdef CONFIG_NAND_VF610_NFC + setup_iomux_nfc(); +#endif + + return 0; +} + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ + struct src *src = (struct src *)SRC_BASE_ADDR; + + /* Default memory arguments */ + if (!getenv("memargs")) { + switch (gd->ram_size) { + case 0x08000000: + /* 128 MB */ + setenv("memargs", "mem=128M"); + break; + case 0x10000000: + /* 256 MB */ + setenv("memargs", "mem=256M"); + break; + default: + printf("Failed detecting RAM size.\n"); + } + } + + if (((src->sbmr2 & SRC_SBMR2_BMOD_MASK) >> SRC_SBMR2_BMOD_SHIFT) + == SRC_SBMR2_BMOD_SERIAL) { + printf("Serial Downloader recovery mode, disable autoboot\n"); + setenv("bootdelay", "-1"); + } + + return 0; +} +#endif /* CONFIG_BOARD_LATE_INIT */ + +int board_init(void) +{ + struct scsc_reg *scsc = (struct scsc_reg *)SCSC_BASE_ADDR; + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + /* + * Enable external 32K Oscillator + * + * The internal clock experiences significant drift + * so we must use the external oscillator in order + * to maintain correct time in the hwclock + */ + + setbits_le32(&scsc->sosc_ctr, SCSC_SOSC_CTR_SOSC_EN); + + return 0; +} + +int checkboard(void) +{ + if (is_colibri_vf61()) + puts("Board: Colibri VF61\n"); + else + puts("Board: Colibri VF50\n"); + + return 0; +} + +int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) +{ + unsigned short usb_pid; + + put_unaligned(CONFIG_TRDX_VID, &dev->idVendor); + + if (is_colibri_vf61()) + usb_pid = CONFIG_TRDX_PID_COLIBRI_VF61IT; + else + usb_pid = CONFIG_TRDX_PID_COLIBRI_VF50IT; + + put_unaligned(usb_pid, &dev->idProduct); + + return 0; +} diff --git a/board/toradex/colibri_vf/imximage.cfg b/board/toradex/colibri_vf/imximage.cfg new file mode 100644 index 0000000000..8c528863ad --- /dev/null +++ b/board/toradex/colibri_vf/imximage.cfg @@ -0,0 +1,17 @@ +/* + * Copyright 2014 Toradex, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +#include <asm/imx-common/imximage.cfg> + +/* image version */ +IMAGE_VERSION 2 + +/* Boot Offset 0x400, valid for both SD and NAND boot */ +BOOT_OFFSET FLASH_OFFSET_STANDARD |