diff options
Diffstat (limited to 'board')
39 files changed, 157 insertions, 606 deletions
diff --git a/board/altera/arria5-socdk/socfpga.c b/board/altera/arria5-socdk/socfpga.c index 0fbbc3456c..97fb902f8e 100644 --- a/board/altera/arria5-socdk/socfpga.c +++ b/board/altera/arria5-socdk/socfpga.c @@ -3,83 +3,4 @@ * * SPDX-License-Identifier: GPL-2.0+ */ - #include <common.h> -#include <asm/arch/reset_manager.h> -#include <asm/io.h> - -#include <usb.h> -#include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> - -#include <micrel.h> -#include <netdev.h> -#include <phy.h> - -DECLARE_GLOBAL_DATA_PTR; - -void s_init(void) {} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - /* Address of boot parameters for ATAG (if ATAG is used) */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9021 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, - 0xf0f0); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif - -#ifdef CONFIG_USB_GADGET -struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, - .usb_gusbcfg = 0x1417, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - return dwc2_udc_probe(&socfpga_otg_data); -} - -int g_dnl_board_usb_cable_connected(void) -{ - return 1; -} -#endif diff --git a/board/altera/cyclone5-socdk/qts/pinmux_config.h b/board/altera/cyclone5-socdk/qts/pinmux_config.h index 33cf1fdb64..f1e6d2b0bc 100644 --- a/board/altera/cyclone5-socdk/qts/pinmux_config.h +++ b/board/altera/cyclone5-socdk/qts/pinmux_config.h @@ -9,19 +9,19 @@ const u8 sys_mgr_init_table[] = { 3, /* EMACIO0 */ - 3, /* EMACIO1 */ - 3, /* EMACIO2 */ - 3, /* EMACIO3 */ - 3, /* EMACIO4 */ - 3, /* EMACIO5 */ - 3, /* EMACIO6 */ - 3, /* EMACIO7 */ - 3, /* EMACIO8 */ + 2, /* EMACIO1 */ + 2, /* EMACIO2 */ + 2, /* EMACIO3 */ + 2, /* EMACIO4 */ + 2, /* EMACIO5 */ + 2, /* EMACIO6 */ + 2, /* EMACIO7 */ + 2, /* EMACIO8 */ 3, /* EMACIO9 */ - 3, /* EMACIO10 */ - 3, /* EMACIO11 */ - 3, /* EMACIO12 */ - 3, /* EMACIO13 */ + 2, /* EMACIO10 */ + 2, /* EMACIO11 */ + 2, /* EMACIO12 */ + 2, /* EMACIO13 */ 0, /* EMACIO14 */ 0, /* EMACIO15 */ 0, /* EMACIO16 */ @@ -55,8 +55,8 @@ const u8 sys_mgr_init_table[] = { 0, /* GENERALIO12 */ 2, /* GENERALIO13 */ 2, /* GENERALIO14 */ - 0, /* GENERALIO15 */ - 0, /* GENERALIO16 */ + 3, /* GENERALIO15 */ + 3, /* GENERALIO16 */ 2, /* GENERALIO17 */ 2, /* GENERALIO18 */ 0, /* GENERALIO19 */ @@ -72,27 +72,27 @@ const u8 sys_mgr_init_table[] = { 0, /* GENERALIO29 */ 0, /* GENERALIO30 */ 0, /* GENERALIO31 */ - 0, /* MIXED1IO0 */ - 1, /* MIXED1IO1 */ - 1, /* MIXED1IO2 */ - 1, /* MIXED1IO3 */ - 1, /* MIXED1IO4 */ - 0, /* MIXED1IO5 */ - 0, /* MIXED1IO6 */ - 0, /* MIXED1IO7 */ - 1, /* MIXED1IO8 */ - 1, /* MIXED1IO9 */ - 1, /* MIXED1IO10 */ - 1, /* MIXED1IO11 */ - 0, /* MIXED1IO12 */ - 0, /* MIXED1IO13 */ + 2, /* MIXED1IO0 */ + 2, /* MIXED1IO1 */ + 2, /* MIXED1IO2 */ + 2, /* MIXED1IO3 */ + 2, /* MIXED1IO4 */ + 2, /* MIXED1IO5 */ + 2, /* MIXED1IO6 */ + 2, /* MIXED1IO7 */ + 2, /* MIXED1IO8 */ + 2, /* MIXED1IO9 */ + 2, /* MIXED1IO10 */ + 2, /* MIXED1IO11 */ + 2, /* MIXED1IO12 */ + 2, /* MIXED1IO13 */ 0, /* MIXED1IO14 */ - 1, /* MIXED1IO15 */ - 1, /* MIXED1IO16 */ - 1, /* MIXED1IO17 */ - 1, /* MIXED1IO18 */ - 0, /* MIXED1IO19 */ - 0, /* MIXED1IO20 */ + 3, /* MIXED1IO15 */ + 3, /* MIXED1IO16 */ + 3, /* MIXED1IO17 */ + 3, /* MIXED1IO18 */ + 3, /* MIXED1IO19 */ + 3, /* MIXED1IO20 */ 0, /* MIXED1IO21 */ 0, /* MIXED2IO0 */ 0, /* MIXED2IO1 */ diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h b/board/altera/cyclone5-socdk/qts/pll_config.h index 3d621ed9c1..4abd2e0aac 100644 --- a/board/altera/cyclone5-socdk/qts/pll_config.h +++ b/board/altera/cyclone5-socdk/qts/pll_config.h @@ -14,7 +14,7 @@ #define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT 0 #define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT 0 #define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT 0 -#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 511 +#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 3 #define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT 511 #define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 15 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK 1 @@ -31,7 +31,7 @@ #define CONFIG_HPS_PERPLLGRP_VCO_NUMER 79 #define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0 #define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3 -#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 511 +#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3 #define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511 #define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4 #define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4 diff --git a/board/altera/cyclone5-socdk/socfpga.c b/board/altera/cyclone5-socdk/socfpga.c index 0fbbc3456c..97fb902f8e 100644 --- a/board/altera/cyclone5-socdk/socfpga.c +++ b/board/altera/cyclone5-socdk/socfpga.c @@ -3,83 +3,4 @@ * * SPDX-License-Identifier: GPL-2.0+ */ - #include <common.h> -#include <asm/arch/reset_manager.h> -#include <asm/io.h> - -#include <usb.h> -#include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> - -#include <micrel.h> -#include <netdev.h> -#include <phy.h> - -DECLARE_GLOBAL_DATA_PTR; - -void s_init(void) {} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - /* Address of boot parameters for ATAG (if ATAG is used) */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9021 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, - 0xf0f0); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif - -#ifdef CONFIG_USB_GADGET -struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, - .usb_gusbcfg = 0x1417, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - return dwc2_udc_probe(&socfpga_otg_data); -} - -int g_dnl_board_usb_cable_connected(void) -{ - return 1; -} -#endif diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c index c9da80d5eb..723293fef3 100644 --- a/board/compulab/trimslice/trimslice.c +++ b/board/compulab/trimslice/trimslice.c @@ -13,7 +13,6 @@ #include <asm/arch/pinmux.h> #include <asm/gpio.h> #include <i2c.h> -#include <netdev.h> void pin_mux_usb(void) { @@ -41,10 +40,3 @@ void pin_mux_mmc(void) /* For CD GPIO PP1 */ pinmux_tristate_disable(PMUX_PINGRP_DAP3); } - -#ifdef CONFIG_PCI -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} -#endif diff --git a/board/congatec/cgtqmx6eval/MAINTAINERS b/board/congatec/cgtqmx6eval/MAINTAINERS index c41ebf5f9e..48c08891b3 100644 --- a/board/congatec/cgtqmx6eval/MAINTAINERS +++ b/board/congatec/cgtqmx6eval/MAINTAINERS @@ -3,4 +3,4 @@ M: Otavio Salvador <otavio@ossystems.com.br> S: Maintained F: board/congatec/cgtqmx6eval/ F: include/configs/cgtqmx6eval.h -F: configs/cgtqmx6qeval_defconfig +F: configs/cgtqmx6eval_defconfig diff --git a/board/congatec/cgtqmx6eval/README b/board/congatec/cgtqmx6eval/README index 1d736dc351..f2c959949c 100644 --- a/board/congatec/cgtqmx6eval/README +++ b/board/congatec/cgtqmx6eval/README @@ -25,11 +25,15 @@ host PC (/tftpboot , for example). => sf probe +=> setenv serverip <server_ip_address> + +=> setenv ipaddr <board_ip_address> + => tftp 0x12000000 SPL => sf erase 0x0 0x10000 -=> sf write 0x12000000 0x400 0x100 +=> sf write 0x12000000 0x400 0x10000 => tftp 0x12000000 u-boot.img diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 5fd526d478..225de7c543 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -404,7 +404,7 @@ static void setup_iomux_uart(void) #ifdef CONFIG_MXC_SPI static void setup_spi(void) { - imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); + SETUP_IOMUX_PADS(ecspi1_pads); gpio_direction_output(IMX_GPIO_NR(3, 19), 0); } #endif diff --git a/board/denx/mcvevk/socfpga.c b/board/denx/mcvevk/socfpga.c index 0f93722dfb..6be58f047f 100644 --- a/board/denx/mcvevk/socfpga.c +++ b/board/denx/mcvevk/socfpga.c @@ -3,43 +3,4 @@ * * SPDX-License-Identifier: GPL-2.0+ */ - #include <common.h> -#include <asm/arch/reset_manager.h> -#include <asm/io.h> - -#include <usb.h> -#include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> - -DECLARE_GLOBAL_DATA_PTR; - -void s_init(void) {} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - /* Address of boot parameters for ATAG (if ATAG is used) */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -#ifdef CONFIG_USB_GADGET -struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, - .usb_gusbcfg = 0x1417, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - return dwc2_udc_probe(&socfpga_otg_data); -} - -int g_dnl_board_usb_cable_connected(void) -{ - return 1; -} -#endif diff --git a/board/ebv/socrates/socfpga.c b/board/ebv/socrates/socfpga.c index 0fbbc3456c..97fb902f8e 100644 --- a/board/ebv/socrates/socfpga.c +++ b/board/ebv/socrates/socfpga.c @@ -3,83 +3,4 @@ * * SPDX-License-Identifier: GPL-2.0+ */ - #include <common.h> -#include <asm/arch/reset_manager.h> -#include <asm/io.h> - -#include <usb.h> -#include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> - -#include <micrel.h> -#include <netdev.h> -#include <phy.h> - -DECLARE_GLOBAL_DATA_PTR; - -void s_init(void) {} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - /* Address of boot parameters for ATAG (if ATAG is used) */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9021 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, - 0xf0f0); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif - -#ifdef CONFIG_USB_GADGET -struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, - .usb_gusbcfg = 0x1417, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - return dwc2_udc_probe(&socfpga_otg_data); -} - -int g_dnl_board_usb_cable_connected(void) -{ - return 1; -} -#endif diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c index 783c46d882..69afa83562 100644 --- a/board/freescale/common/pfuze.c +++ b/board/freescale/common/pfuze.c @@ -13,7 +13,8 @@ int pfuze_mode_init(struct pmic *p, u32 mode) { unsigned char offset, i, switch_num; - u32 id, ret; + u32 id; + int ret; pmic_reg_read(p, PFUZE100_DEVICEID, &id); id = id & 0xf; diff --git a/board/freescale/ls2080a/MAINTAINERS b/board/freescale/ls2080a/MAINTAINERS index 03ca168f15..975ea2da48 100644 --- a/board/freescale/ls2080a/MAINTAINERS +++ b/board/freescale/ls2080a/MAINTAINERS @@ -1,5 +1,5 @@ LS2080A BOARD -M: York Sun <yorksun@freescale.com> +M: York Sun <york.sun@nxp.com> S: Maintained F: board/freescale/ls2080a/ F: include/configs/ls2080a_emu.h diff --git a/board/freescale/mpc8572ds/MAINTAINERS b/board/freescale/mpc8572ds/MAINTAINERS index 4c9b968cd0..46c2903a0c 100644 --- a/board/freescale/mpc8572ds/MAINTAINERS +++ b/board/freescale/mpc8572ds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8572DS BOARD -M: York Sun <yorksun@freescale.com> +M: York Sun <york.sun@nxp.com> S: Maintained F: board/freescale/mpc8572ds/ F: include/configs/MPC8572DS.h diff --git a/board/freescale/mx25pdk/MAINTAINERS b/board/freescale/mx25pdk/MAINTAINERS index 63221765c7..fa4651e2df 100644 --- a/board/freescale/mx25pdk/MAINTAINERS +++ b/board/freescale/mx25pdk/MAINTAINERS @@ -1,5 +1,5 @@ MX25PDK BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/freescale/mx25pdk/ F: include/configs/mx25pdk.h diff --git a/board/freescale/mx28evk/MAINTAINERS b/board/freescale/mx28evk/MAINTAINERS index 1caf5fb22a..a98a70558a 100644 --- a/board/freescale/mx28evk/MAINTAINERS +++ b/board/freescale/mx28evk/MAINTAINERS @@ -1,5 +1,5 @@ MX28EVK BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/freescale/mx28evk/ F: include/configs/mx28evk.h diff --git a/board/freescale/mx53ard/MAINTAINERS b/board/freescale/mx53ard/MAINTAINERS index 7cc0e5e222..fa81afe9a3 100644 --- a/board/freescale/mx53ard/MAINTAINERS +++ b/board/freescale/mx53ard/MAINTAINERS @@ -1,5 +1,5 @@ MX53ARD BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/freescale/mx53ard/ F: include/configs/mx53ard.h diff --git a/board/freescale/mx53smd/MAINTAINERS b/board/freescale/mx53smd/MAINTAINERS index 8830321495..17ec376f2a 100644 --- a/board/freescale/mx53smd/MAINTAINERS +++ b/board/freescale/mx53smd/MAINTAINERS @@ -1,5 +1,5 @@ MX53SMD BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/freescale/mx53smd/ F: include/configs/mx53smd.h diff --git a/board/freescale/mx6qsabreauto/MAINTAINERS b/board/freescale/mx6qsabreauto/MAINTAINERS index 75a8862ef6..687f68c2f9 100644 --- a/board/freescale/mx6qsabreauto/MAINTAINERS +++ b/board/freescale/mx6qsabreauto/MAINTAINERS @@ -1,5 +1,5 @@ MX6QSABREAUTO BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> M: Peng Fan <Peng.Fan@freescale.com> S: Maintained F: board/freescale/mx6qsabreauto/ diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 7c0e90ad0b..c2e9c5739b 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -412,14 +412,44 @@ u32 get_board_rev(void) } #if defined(CONFIG_VIDEO_IPUV3) +static void disable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrbits_le32(&iomux->gpr[2], + IOMUXC_GPR2_LVDS_CH0_MODE_MASK | + IOMUXC_GPR2_LVDS_CH1_MODE_MASK); +} + static void do_enable_hdmi(struct display_info_t const *dev) { + disable_lvds(dev); imx_enable_hdmi_phy(); } struct display_info_t const displays[] = {{ .bus = -1, .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB666, + .detect = NULL, + .enable = NULL, + .mode = { + .name = "Hannstar-XGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = -1, + .addr = 0, .pixfmt = IPU_PIX_FMT_RGB24, .detect = detect_hdmi, .enable = do_enable_hdmi, @@ -440,18 +470,69 @@ struct display_info_t const displays[] = {{ } } }; size_t display_count = ARRAY_SIZE(displays); +iomux_v3_cfg_t const backlight_pads[] = { + MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static void setup_iomux_backlight(void) +{ + gpio_direction_output(IMX_GPIO_NR(2, 9), 1); + imx_iomux_v3_setup_multiple_pads(backlight_pads, + ARRAY_SIZE(backlight_pads)); +} + static void setup_display(void) { struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; int reg; + setup_iomux_backlight(); enable_ipu_clock(); imx_setup_hdmi(); + /* Turn on LDB_DI0 and LDB_DI1 clocks */ + reg = readl(&mxc_ccm->CCGR3); + reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK; + writel(reg, &mxc_ccm->CCGR3); + + /* Set LDB_DI0 and LDB_DI1 clk select to 3b'011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | + MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | + (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->cs2cdr); + + reg = readl(&mxc_ccm->cscmr2); + reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV; + writel(reg, &mxc_ccm->cscmr2); + reg = readl(&mxc_ccm->chsccdr); reg |= (CHSCCDR_CLK_SEL_LDB_DI0 << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET); writel(reg, &mxc_ccm->chsccdr); + + reg = IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW | + IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW | + IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT | + IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | + IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 | + IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED; + writel(reg, &iomux->gpr[2]); + + reg = readl(&iomux->gpr[3]); + reg &= ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK | + IOMUXC_GPR3_HDMI_MUX_CTL_MASK); + reg |= (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET) | + (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET); + writel(reg, &iomux->gpr[3]); } #endif /* CONFIG_VIDEO_IPUV3 */ @@ -467,9 +548,6 @@ int overwrite_console(void) int board_early_init_f(void) { setup_iomux_uart(); -#ifdef CONFIG_VIDEO_IPUV3 - setup_display(); -#endif #ifdef CONFIG_NAND_MXS setup_gpmi_nand(); @@ -494,6 +572,9 @@ int board_init(void) gpio_direction_output(IMX_GPIO_NR(1, 15), 1); imx_iomux_v3_setup_multiple_pads(port_exp, ARRAY_SIZE(port_exp)); +#ifdef CONFIG_VIDEO_IPUV3 + setup_display(); +#endif setup_iomux_eimnor(); return 0; } diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS index 0011ec7b49..add23143a3 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/mx6sabresd/MAINTAINERS @@ -1,5 +1,5 @@ MX6SABRESD BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/freescale/mx6sabresd/ F: include/configs/mx6sabresd.h diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 581c9d5560..d20953d2ca 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -94,8 +94,9 @@ static void setup_iomux_enet(void) /* Reset AR8031 PHY */ gpio_direction_output(IMX_GPIO_NR(1, 25) , 0); - udelay(500); + mdelay(10); gpio_set_value(IMX_GPIO_NR(1, 25), 1); + udelay(100); } static iomux_v3_cfg_t const usdhc2_pads[] = { @@ -340,39 +341,6 @@ int board_mmc_init(bd_t *bis) } #endif -int mx6_rgmii_rework(struct phy_device *phydev) -{ - unsigned short val; - - /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); - - val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); - val &= 0xffe3; - val |= 0x18; - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); - - /* introduce tx clock delay */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); - val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); - val |= 0x0100; - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - mx6_rgmii_rework(phydev); - - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - #if defined(CONFIG_VIDEO_IPUV3) static void disable_lvds(struct display_info_t const *dev) { diff --git a/board/freescale/mx6slevk/MAINTAINERS b/board/freescale/mx6slevk/MAINTAINERS index f4e74ba725..2e25433828 100644 --- a/board/freescale/mx6slevk/MAINTAINERS +++ b/board/freescale/mx6slevk/MAINTAINERS @@ -1,5 +1,5 @@ MX6SLEVK BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> M: Peng Fan <Peng.Fan@freescale.com> S: Maintained F: board/freescale/mx6slevk/ diff --git a/board/freescale/mx6sxsabresd/MAINTAINERS b/board/freescale/mx6sxsabresd/MAINTAINERS index c0f5d9c8e4..1dcec67545 100644 --- a/board/freescale/mx6sxsabresd/MAINTAINERS +++ b/board/freescale/mx6sxsabresd/MAINTAINERS @@ -1,5 +1,5 @@ MX6SXSABRESD BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/freescale/mx6sxsabresd/ F: include/configs/mx6sxsabresd.h diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 3ee46629ee..56dc0208c7 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -150,11 +150,15 @@ static int setup_fec(void) { struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; - int reg; + int reg, ret; /* Use 125MHz anatop loopback REF_CLK1 for ENET1 */ clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, 0); + ret = enable_fec_anatop_clock(0, ENET_125MHZ); + if (ret) + return ret; + imx_iomux_v3_setup_multiple_pads(phy_control_pads, ARRAY_SIZE(phy_control_pads)); @@ -163,14 +167,14 @@ static int setup_fec(void) /* Reset AR8031 PHY */ gpio_direction_output(IMX_GPIO_NR(2, 7) , 0); - udelay(500); + mdelay(10); gpio_set_value(IMX_GPIO_NR(2, 7), 1); reg = readl(&anatop->pll_enet); reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE; writel(reg, &anatop->pll_enet); - return enable_fec_anatop_clock(0, ENET_125MHZ); + return 0; } int board_eth_init(bd_t *bis) diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index a0fca0d880..6cb5692eda 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -81,7 +81,7 @@ static int pci_map_region(void *fdt, int pci_node, int range_id, ulong map_addr; int r; - r = fdt_read_range(fdt, pci_node, 0, NULL, &addr, &size); + r = fdt_read_range(fdt, pci_node, range_id, NULL, &addr, &size); if (r) return r; diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c index 1540526a61..ba15e2e6cf 100644 --- a/board/nvidia/cardhu/cardhu.c +++ b/board/nvidia/cardhu/cardhu.c @@ -13,7 +13,6 @@ #include <asm/gpio.h> #include "pinmux-config-cardhu.h" #include <i2c.h> -#include <netdev.h> #define PMU_I2C_ADDRESS 0x2D #define MAX_I2C_RETRY 3 @@ -129,9 +128,4 @@ int tegra_pcie_board_init(void) return 0; } - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} #endif /* PCI */ diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c index 52425a8f6d..6f189aa74e 100644 --- a/board/nvidia/jetson-tk1/jetson-tk1.c +++ b/board/nvidia/jetson-tk1/jetson-tk1.c @@ -6,7 +6,6 @@ */ #include <common.h> -#include <netdev.h> #include <power/as3722.h> #include <asm/arch/gpio.h> @@ -73,9 +72,4 @@ int tegra_pcie_board_init(void) return 0; } - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} #endif /* PCI */ diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c index 57f577d85d..0f587eaaa7 100644 --- a/board/nvidia/p2371-2180/p2371-2180.c +++ b/board/nvidia/p2371-2180/p2371-2180.c @@ -6,7 +6,6 @@ */ #include <common.h> -#include <netdev.h> #include <i2c.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> @@ -73,9 +72,4 @@ int tegra_pcie_board_init(void) return 0; } - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} #endif /* PCI */ diff --git a/board/solidrun/mx6cuboxi/MAINTAINERS b/board/solidrun/mx6cuboxi/MAINTAINERS index a3506c2f8f..81f82bc9b5 100644 --- a/board/solidrun/mx6cuboxi/MAINTAINERS +++ b/board/solidrun/mx6cuboxi/MAINTAINERS @@ -1,5 +1,5 @@ MX6CUBOXI BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/solidrun/mx6cuboxi/ F: include/configs/mx6cuboxi.h diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index fc37f1eef0..823b70f7ed 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -143,8 +143,9 @@ static void setup_iomux_enet(void) SETUP_IOMUX_PADS(enet_pads); gpio_direction_output(ETH_PHY_RESET, 0); - mdelay(2); + mdelay(10); gpio_set_value(ETH_PHY_RESET, 1); + udelay(100); } int board_phy_config(struct phy_device *phydev) @@ -594,10 +595,6 @@ static void gpr_init(void) writel(0x007F007F, &iomux->gpr[7]); } -/* - * This section requires the differentiation between Solidrun mx6 boards, but - * for now, it will configure only for the mx6dual hummingboard version. - */ static void spl_dram_init(int width) { struct mx6_ddr_sysinfo sysinfo = { diff --git a/board/spear/spear600/spear600.c b/board/spear/spear600/spear600.c index fc0918f91d..858a9cae76 100644 --- a/board/spear/spear600/spear600.c +++ b/board/spear/spear600/spear600.c @@ -48,9 +48,6 @@ int board_eth_init(bd_t *bis) #if defined(CONFIG_ETH_DESIGNWARE) u32 interface = PHY_INTERFACE_MODE_MII; -#if defined(CONFIG_DW_AUTONEG) - interface = PHY_INTERFACE_MODE_GMII; -#endif if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0) ret++; #endif diff --git a/board/sr1500/socfpga.c b/board/sr1500/socfpga.c index 9f895842f7..617dffa136 100644 --- a/board/sr1500/socfpga.c +++ b/board/sr1500/socfpga.c @@ -5,27 +5,10 @@ */ #include <common.h> -#include <i2c.h> -#include <miiphy.h> #include <asm/arch/reset_manager.h> #include <asm/gpio.h> #include <asm/io.h> -DECLARE_GLOBAL_DATA_PTR; - -void s_init(void) {} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - /* Address of boot parameters for ATAG (if ATAG is used) */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - int board_early_init_f(void) { int ret; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 57acc20d03..131c3415aa 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -25,6 +25,7 @@ F: configs/A13-OLinuXinoM_defconfig F: configs/Auxtek-T003_defconfig F: configs/Auxtek-T004_defconfig F: configs/CHIP_defconfig +F: configs/Empire_electronix_d709_defconfig F: configs/inet98v_rev2_defconfig F: configs/mk802_a10s_defconfig F: configs/q8_a13_tablet_defconfig diff --git a/board/terasic/de0-nano-soc/socfpga.c b/board/terasic/de0-nano-soc/socfpga.c index 85700b05be..97fb902f8e 100644 --- a/board/terasic/de0-nano-soc/socfpga.c +++ b/board/terasic/de0-nano-soc/socfpga.c @@ -3,70 +3,4 @@ * * SPDX-License-Identifier: GPL-2.0+ */ - #include <common.h> - -#include <micrel.h> -#include <netdev.h> -#include <phy.h> - -DECLARE_GLOBAL_DATA_PTR; - -void s_init(void) {} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - /* Address of boot parameters for ATAG (if ATAG is used) */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9031 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x70); - if (ret) - return ret; - - ret = ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x7777); - if (ret) - return ret; - - ret = ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0); - if (ret) - return ret; - - ret = ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x03FC); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif diff --git a/board/terasic/sockit/socfpga.c b/board/terasic/sockit/socfpga.c index 0fbbc3456c..97fb902f8e 100644 --- a/board/terasic/sockit/socfpga.c +++ b/board/terasic/sockit/socfpga.c @@ -3,83 +3,4 @@ * * SPDX-License-Identifier: GPL-2.0+ */ - #include <common.h> -#include <asm/arch/reset_manager.h> -#include <asm/io.h> - -#include <usb.h> -#include <usb/dwc2_udc.h> -#include <usb_mass_storage.h> - -#include <micrel.h> -#include <netdev.h> -#include <phy.h> - -DECLARE_GLOBAL_DATA_PTR; - -void s_init(void) {} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - /* Address of boot parameters for ATAG (if ATAG is used) */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - - return 0; -} - -/* - * PHY configuration - */ -#ifdef CONFIG_PHY_MICREL_KSZ9021 -int board_phy_config(struct phy_device *phydev) -{ - int ret; - /* - * These skew settings for the KSZ9021 ethernet phy is required for ethernet - * to work reliably on most flavors of cyclone5 boards. - */ - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, - 0x0); - if (ret) - return ret; - - ret = ksz9021_phy_extended_write(phydev, - MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, - 0xf0f0); - if (ret) - return ret; - - if (phydev->drv->config) - return phydev->drv->config(phydev); - - return 0; -} -#endif - -#ifdef CONFIG_USB_GADGET -struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, - .usb_gusbcfg = 0x1417, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - return dwc2_udc_probe(&socfpga_otg_data); -} - -int g_dnl_board_usb_cable_connected(void) -{ - return 1; -} -#endif diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c index 879006f8e0..3f56971a13 100644 --- a/board/toradex/apalis_t30/apalis_t30.c +++ b/board/toradex/apalis_t30/apalis_t30.c @@ -14,7 +14,6 @@ #include <asm/io.h> #include <dm.h> #include <i2c.h> -#include <netdev.h> #include "pinmux-config-apalis_t30.h" @@ -92,9 +91,4 @@ int tegra_pcie_board_init(void) return 0; } - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} #endif /* CONFIG_PCI_TEGRA */ diff --git a/board/udoo/MAINTAINERS b/board/udoo/MAINTAINERS index 789e98ff85..b05243c429 100644 --- a/board/udoo/MAINTAINERS +++ b/board/udoo/MAINTAINERS @@ -1,5 +1,5 @@ UDOO BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/udoo/ F: include/configs/udoo.h diff --git a/board/wandboard/MAINTAINERS b/board/wandboard/MAINTAINERS index 0680517c36..d7cbae8f95 100644 --- a/board/wandboard/MAINTAINERS +++ b/board/wandboard/MAINTAINERS @@ -1,5 +1,5 @@ WANDBOARD BOARD -M: Fabio Estevam <fabio.estevam@freescale.com> +M: Fabio Estevam <fabio.estevam@nxp.com> S: Maintained F: board/wandboard/ F: include/configs/wandboard.h diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 0af63d291f..ac001edf3a 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -121,8 +121,9 @@ static void setup_iomux_enet(void) /* Reset AR8031 PHY */ gpio_direction_output(ETH_PHY_RESET, 0); - udelay(500); + mdelay(10); gpio_set_value(ETH_PHY_RESET, 1); + udelay(100); } static struct fsl_esdhc_cfg usdhc_cfg[2] = { @@ -187,39 +188,6 @@ int board_mmc_init(bd_t *bis) return 0; } -static int mx6_rgmii_rework(struct phy_device *phydev) -{ - unsigned short val; - - /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); - - val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); - val &= 0xffe3; - val |= 0x18; - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); - - /* introduce tx clock delay */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); - val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); - val |= 0x0100; - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - mx6_rgmii_rework(phydev); - - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - #if defined(CONFIG_VIDEO_IPUV3) struct i2c_pads_info mx6q_i2c2_pad_info = { .scl = { |