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-rw-r--r--board/keymile/km_arm/MAINTAINERS1
-rw-r--r--board/keymile/km_arm/fpga_config.c23
-rw-r--r--board/keymile/km_arm/km_arm.c4
3 files changed, 0 insertions, 28 deletions
diff --git a/board/keymile/km_arm/MAINTAINERS b/board/keymile/km_arm/MAINTAINERS
index 538f90f48b..45c0b5651d 100644
--- a/board/keymile/km_arm/MAINTAINERS
+++ b/board/keymile/km_arm/MAINTAINERS
@@ -8,6 +8,5 @@ F: configs/km_kirkwood_128m16_defconfig
F: configs/km_kirkwood_pci_defconfig
F: configs/kmcoge5un_defconfig
F: configs/kmnusa_defconfig
-F: configs/kmsugp1_defconfig
F: configs/kmsuse2_defconfig
F: configs/kmsuv31_defconfig
diff --git a/board/keymile/km_arm/fpga_config.c b/board/keymile/km_arm/fpga_config.c
index 99bea009fa..8bb0470bc3 100644
--- a/board/keymile/km_arm/fpga_config.c
+++ b/board/keymile/km_arm/fpga_config.c
@@ -199,29 +199,6 @@ int fpga_reset(void)
/* no dedicated reset pin for FPGA */
return 0;
}
-#elif defined(KM_PCIE_RESET_MPP7)
-
-#define KM_PEX_RST_GPIO_PIN 7
-int fpga_reset(void)
-{
- if (!check_boco2()) {
- /* we do not have BOCO2, this is not really used */
- return 0;
- }
-
- printf("PCIe reset through GPIO7: ");
- /* apply PCIe reset via GPIO */
- kw_gpio_set_valid(KM_PEX_RST_GPIO_PIN, 1);
- kw_gpio_direction_output(KM_PEX_RST_GPIO_PIN, 1);
- kw_gpio_set_value(KM_PEX_RST_GPIO_PIN, 0);
- udelay(1000*10);
- kw_gpio_set_value(KM_PEX_RST_GPIO_PIN, 1);
-
- printf(" done\n");
-
- return 0;
-}
-
#else
#define PRST1 0x4
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 473acfca68..7d191ab860 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -69,11 +69,7 @@ static const u32 kwmpp_config[] = {
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
-#if defined(KM_PCIE_RESET_MPP7)
- MPP7_GPO,
-#else
MPP7_PEX_RST_OUTn,
-#endif
#if defined(CONFIG_SYS_I2C_SOFT)
MPP8_GPIO, /* SDA */
MPP9_GPIO, /* SCL */