diff options
Diffstat (limited to 'board')
40 files changed, 1359 insertions, 107 deletions
diff --git a/board/CZ.NIC/turris_mox/Makefile b/board/CZ.NIC/turris_mox/Makefile index 619704288b..33a52b63d7 100644 --- a/board/CZ.NIC/turris_mox/Makefile +++ b/board/CZ.NIC/turris_mox/Makefile @@ -2,4 +2,4 @@ # # Copyright (C) 2018 Marek Behun <marek.behun@nic.cz> -obj-y := turris_mox.o +obj-y := turris_mox.o mox_sp.o diff --git a/board/CZ.NIC/turris_mox/mox_sp.c b/board/CZ.NIC/turris_mox/mox_sp.c new file mode 100644 index 0000000000..0b29ffcc67 --- /dev/null +++ b/board/CZ.NIC/turris_mox/mox_sp.c @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz> + */ + +#include <common.h> +#include <asm/io.h> + +#define RWTM_CMD_PARAM(i) (size_t)(0xd00b0000 + (i) * 4) +#define RWTM_CMD 0xd00b0040 +#define RWTM_CMD_RETSTATUS 0xd00b0080 +#define RWTM_CMD_STATUS(i) (size_t)(0xd00b0084 + (i) * 4) + +#define RWTM_HOST_INT_RESET 0xd00b00c8 +#define RWTM_HOST_INT_MASK 0xd00b00cc +#define SP_CMD_COMPLETE BIT(0) + +#define MBOX_STS_SUCCESS (0x0 << 30) +#define MBOX_STS_FAIL (0x1 << 30) +#define MBOX_STS_BADCMD (0x2 << 30) +#define MBOX_STS_LATER (0x3 << 30) +#define MBOX_STS_ERROR(s) ((s) & (3 << 30)) +#define MBOX_STS_VALUE(s) (((s) >> 10) & 0xfffff) +#define MBOX_STS_CMD(s) ((s) & 0x3ff) + +enum mbox_cmd { + MBOX_CMD_GET_RANDOM = 1, + MBOX_CMD_BOARD_INFO, + MBOX_CMD_ECDSA_PUB_KEY, + MBOX_CMD_HASH, + MBOX_CMD_SIGN, + MBOX_CMD_VERIFY, + + MBOX_CMD_OTP_READ, + MBOX_CMD_OTP_WRITE +}; + +static int mbox_do_cmd(enum mbox_cmd cmd, u32 *out, int nout) +{ + const int tries = 50; + int i; + u32 status; + + clrbits_le32(RWTM_HOST_INT_MASK, SP_CMD_COMPLETE); + + writel(cmd, RWTM_CMD); + + for (i = 0; i < tries; ++i) { + mdelay(10); + if (readl(RWTM_HOST_INT_RESET) & SP_CMD_COMPLETE) + break; + } + + if (i == tries) { + /* if timed out, don't read status */ + setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE); + return -ETIMEDOUT; + } + + for (i = 0; i < nout; ++i) + out[i] = readl(RWTM_CMD_STATUS(i)); + status = readl(RWTM_CMD_RETSTATUS); + + setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE); + + if (MBOX_STS_CMD(status) != cmd) + return -EIO; + else if (MBOX_STS_ERROR(status) == MBOX_STS_FAIL) + return -(int)MBOX_STS_VALUE(status); + else if (MBOX_STS_ERROR(status) != MBOX_STS_SUCCESS) + return -EIO; + else + return MBOX_STS_VALUE(status); +} + +const char *mox_sp_get_ecdsa_public_key(void) +{ + static char public_key[135]; + u32 out[16]; + int res; + + if (public_key[0]) + return public_key; + + res = mbox_do_cmd(MBOX_CMD_ECDSA_PUB_KEY, out, 16); + if (res < 0) + return NULL; + + sprintf(public_key, + "%06x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x", + (u32)res, out[0], out[1], out[2], out[3], out[4], out[5], + out[6], out[7], out[8], out[9], out[10], out[11], out[12], + out[13], out[14], out[15]); + + return public_key; +} + +static inline void res_to_mac(u8 *mac, u32 t1, u32 t2) +{ + mac[0] = t1 >> 8; + mac[1] = t1; + mac[2] = t2 >> 24; + mac[3] = t2 >> 16; + mac[4] = t2 >> 8; + mac[5] = t2; +} + +int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, int *ram) +{ + u32 out[8]; + int res; + + res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, out, 8); + if (res < 0) + return res; + + if (sn) { + *sn = out[1]; + *sn <<= 32; + *sn |= out[0]; + } + + if (bv) + *bv = out[2]; + + if (ram) + *ram = out[3]; + + if (mac1) + res_to_mac(mac1, out[4], out[5]); + + if (mac2) + res_to_mac(mac2, out[6], out[7]); + + return 0; +} diff --git a/board/CZ.NIC/turris_mox/mox_sp.h b/board/CZ.NIC/turris_mox/mox_sp.h new file mode 100644 index 0000000000..49a4ed80ea --- /dev/null +++ b/board/CZ.NIC/turris_mox/mox_sp.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz> + */ + +#ifndef _BOARD_CZNIC_TURRIS_MOX_MOX_SP_H_ +#define _BOARD_CZNIC_TURRIS_MOX_MOX_SP_H_ + +#include <common.h> + +const char *mox_sp_get_ecdsa_public_key(void); +int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, + int *ram); + +#endif /* _BOARD_CZNIC_TURRIS_MOX_MOX_SP_H_ */ diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index c4622a49c2..65d50a92dd 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -4,18 +4,24 @@ */ #include <common.h> +#include <asm/gpio.h> #include <asm/io.h> #include <dm.h> #include <clk.h> #include <spi.h> +#include <mvebu/comphy.h> +#include <miiphy.h> #include <linux/string.h> #include <linux/libfdt.h> #include <fdt_support.h> +#include <environment.h> #ifdef CONFIG_WDT_ARMADA_37XX #include <wdt.h> #endif +#include "mox_sp.h" + #define MAX_MOX_MODULES 10 #define MOX_MODULE_SFP 0x1 @@ -35,6 +41,22 @@ DECLARE_GLOBAL_DATA_PTR; +int dram_init(void) +{ + gd->ram_base = 0; + gd->ram_size = (phys_size_t)get_ram_size(0, 0x40000000); + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = (phys_addr_t)0; + gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; +} + #if defined(CONFIG_OF_BOARD_FIXUP) int board_fix_fdt(void *blob) { @@ -135,17 +157,15 @@ int board_init(void) return 0; } -int last_stage_init(void) +static int mox_do_spi(u8 *in, u8 *out, size_t size) { struct spi_slave *slave; struct udevice *dev; - u8 din[10], dout[10]; - int ret, i; - size_t len = 0; - char module_topology[128]; + int ret; - ret = spi_get_bus_and_cs(0, 1, 20000000, SPI_CPHA, "spi_generic_drv", - "mox-modules@1", &dev, &slave); + ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL, + "spi_generic_drv", "moxtet@1", &dev, + &slave); if (ret) goto fail; @@ -153,57 +173,411 @@ int last_stage_init(void) if (ret) goto fail_free; - memset(din, 0, 10); - memset(dout, 0, 10); + ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE); + + spi_release_bus(slave); +fail_free: + spi_free_slave(slave); +fail: + return ret; +} + +static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd) +{ + static int is_sd; + static u8 topology[MAX_MOX_MODULES - 1]; + static int size; + u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES]; + int ret, i; + + if (size) { + if (ptopology) + *ptopology = topology; + if (psize) + *psize = size; + if (pis_sd) + *pis_sd = is_sd; + return 0; + } + + memset(din, 0, MAX_MOX_MODULES); + memset(dout, 0, MAX_MOX_MODULES); + + ret = mox_do_spi(din, dout, MAX_MOX_MODULES); + if (ret) + return ret; + + if (din[0] == 0x10) + is_sd = 1; + else if (din[0] == 0x00) + is_sd = 0; + else + return -ENODEV; + + for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i) + topology[i - 1] = din[i] & 0xf; + size = i - 1; + + if (ptopology) + *ptopology = topology; + if (psize) + *psize = size; + if (pis_sd) + *pis_sd = is_sd; + + return 0; +} + +int comphy_update_map(struct comphy_map *serdes_map, int count) +{ + int ret, i, size, sfpindex = -1, swindex = -1; + const u8 *topology; - ret = spi_xfer(slave, 80, dout, din, SPI_XFER_ONCE); + ret = mox_get_topology(&topology, &size, NULL); if (ret) - goto fail_release; + return ret; + + for (i = 0; i < size; ++i) { + if (topology[i] == MOX_MODULE_SFP && sfpindex == -1) + sfpindex = i; + else if ((topology[i] == MOX_MODULE_TOPAZ || + topology[i] == MOX_MODULE_PERIDOT) && + swindex == -1) + swindex = i; + } + + if (sfpindex >= 0 && swindex >= 0) { + if (sfpindex < swindex) + serdes_map[0].speed = PHY_SPEED_1_25G; + else + serdes_map[0].speed = PHY_SPEED_3_125G; + } else if (sfpindex >= 0) { + serdes_map[0].speed = PHY_SPEED_1_25G; + } else if (swindex >= 0) { + serdes_map[0].speed = PHY_SPEED_3_125G; + } + + return 0; +} + +#define SW_SMI_CMD_R(d, r) (0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f)) +#define SW_SMI_CMD_W(d, r) (0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f)) + +static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg) +{ + bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg)); + mdelay(5); + return bus->read(bus, sw, 0, 1); +} + +static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg, + u16 val) +{ + bus->write(bus, sw, 0, 1, val); + bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg)); + mdelay(5); +} + +static int sw_scratch_read(struct mii_dev *bus, int sw, int reg) +{ + sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8); + return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff; +} + +static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg, + u16 val) +{ + sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12) + | (val & 0x7ff)); +} + +static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz) +{ + int i, p; + struct { + int port; + u16 val; + int wait; + } regs[] = { + { 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 }, + { 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 }, + { 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 }, + { 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 } + }; + + for (i = 0; i < 12; ++i) { + for (p = 0; p < peridot; ++p) { + sw_led_write(bus, 0x10 + p, regs[i].port, 0, + regs[i].val); + sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0, + regs[i].val); + } + if (topaz) { + sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0, + regs[i].val); + } + + if (regs[i].wait) + mdelay(75); + } +} + +static void check_switch_address(struct mii_dev *bus, int addr) +{ + if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr) + printf("Check of switch MDIO address failed for 0x%02x\n", + addr); +} + +static int sfp, pci, topaz, peridot, usb, passpci; +static int sfp_pos, peridot_pos[3]; +static int module_count; + +static int configure_peridots(struct gpio_desc *reset_gpio) +{ + int i, ret; + u8 dout[MAX_MOX_MODULES]; + + memset(dout, 0, MAX_MOX_MODULES); + + /* set addresses of Peridot modules */ + for (i = 0; i < peridot; ++i) + dout[module_count - peridot_pos[i]] = (~i) & 3; + + /* + * if there is a SFP module connected to the last Peridot module, set + * the P10_SMODE to 1 for the Peridot module + */ + if (sfp) + dout[module_count - peridot_pos[i - 1]] |= 1 << 3; + + dm_gpio_set_value(reset_gpio, 1); + mdelay(10); - if (din[0] != 0x00 && din[0] != 0xff) - goto fail_release; + ret = mox_do_spi(NULL, dout, module_count + 1); - printf("Module Topology:\n"); - for (i = 1; i < 10 && din[i] != 0xff; ++i) { - u8 mid = din[i] & 0xf; - size_t mlen; - const char *mname = ""; + mdelay(10); + dm_gpio_set_value(reset_gpio, 0); - switch (mid) { - case 0x1: - mname = "sfp-"; - printf("% 4i: SFP Module\n", i); + mdelay(50); + + return ret; +} + +static int get_reset_gpio(struct gpio_desc *reset_gpio) +{ + int node; + + node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet"); + if (node < 0) { + printf("Cannot find Moxtet bus device node!\n"); + return -1; + } + + gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0, + reset_gpio, GPIOD_IS_OUT); + + if (!dm_gpio_is_valid(reset_gpio)) { + printf("Cannot find reset GPIO for Moxtet bus!\n"); + return -1; + } + + return 0; +} + +int misc_init_r(void) +{ + int ret; + u8 mac1[6], mac2[6]; + + ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL); + if (ret < 0) { + printf("Cannot read data from OTP!\n"); + return 0; + } + + if (is_valid_ethaddr(mac1) && !env_get("ethaddr")) + eth_env_set_enetaddr("ethaddr", mac1); + + if (is_valid_ethaddr(mac2) && !env_get("eth1addr")) + eth_env_set_enetaddr("eth1addr", mac2); + + return 0; +} + +static void mox_print_info(void) +{ + int ret, board_version, ram_size; + u64 serial_number; + const char *pub_key; + + ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version, + &ram_size); + if (ret < 0) + return; + + printf("Turris Mox:\n"); + printf(" Board version: %i\n", board_version); + printf(" RAM size: %i MiB\n", ram_size); + printf(" Serial Number: %016llX\n", serial_number); + + pub_key = mox_sp_get_ecdsa_public_key(); + if (pub_key) + printf(" ECDSA Public Key: %s\n", pub_key); + else + printf("Cannot read ECDSA Public Key\n"); +} + +int last_stage_init(void) +{ + int ret, i; + const u8 *topology; + int is_sd; + struct mii_dev *bus; + struct gpio_desc reset_gpio = {}; + + mox_print_info(); + + ret = mox_get_topology(&topology, &module_count, &is_sd); + if (ret) { + printf("Cannot read module topology!\n"); + return 0; + } + + printf(" SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC"); + + if (module_count) + printf("Module Topology:\n"); + + for (i = 0; i < module_count; ++i) { + switch (topology[i]) { + case MOX_MODULE_SFP: + printf("% 4i: SFP Module\n", i + 1); + break; + case MOX_MODULE_PCI: + printf("% 4i: Mini-PCIe Module\n", i + 1); + break; + case MOX_MODULE_TOPAZ: + printf("% 4i: Topaz Switch Module (4-port)\n", i + 1); break; - case 0x2: - mname = "pci-"; - printf("% 4i: Mini-PCIe Module\n", i); + case MOX_MODULE_PERIDOT: + printf("% 4i: Peridot Switch Module (8-port)\n", i + 1); break; - case 0x3: - mname = "topaz-"; - printf("% 4i: Topaz Switch Module\n", i); + case MOX_MODULE_USB3: + printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1); + break; + case MOX_MODULE_PASSPCI: + printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1); break; default: - printf("% 4i: unknown (ID %i)\n", i, mid); + printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]); } + } - mlen = strlen(mname); - if (len + mlen < sizeof(module_topology)) { - strcpy(module_topology + len, mname); - len += mlen; + /* now check if modules are connected in supported mode */ + + for (i = 0; i < module_count; ++i) { + switch (topology[i]) { + case MOX_MODULE_SFP: + if (sfp) { + printf("Error: Only one SFP module is supported!\n"); + } else if (topaz) { + printf("Error: SFP module cannot be connected after Topaz Switch module!\n"); + } else { + sfp_pos = i; + ++sfp; + } + break; + case MOX_MODULE_PCI: + if (pci) { + printf("Error: Only one Mini-PCIe module is supported!\n"); + } else if (usb) { + printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n"); + } else if (i && (i != 1 || !passpci)) { + printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n"); + } else { + ++pci; + } + break; + case MOX_MODULE_TOPAZ: + if (topaz) { + printf("Error: Only one Topaz module is supported!\n"); + } else if (peridot >= 3) { + printf("Error: At most two Peridot modules can come before Topaz module!\n"); + } else { + ++topaz; + } + break; + case MOX_MODULE_PERIDOT: + if (sfp || topaz) { + printf("Error: Peridot module must come before SFP or Topaz module!\n"); + } else if (peridot >= 3) { + printf("Error: At most three Peridot modules are supported!\n"); + } else { + peridot_pos[peridot] = i; + ++peridot; + } + break; + case MOX_MODULE_USB3: + if (pci) { + printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n"); + } else if (usb) { + printf("Error: Only one USB 3.0 module is supported!\n"); + } else if (i && (i != 1 || !passpci)) { + printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n"); + } else { + ++usb; + } + break; + case MOX_MODULE_PASSPCI: + if (passpci) { + printf("Error: Only one Passthrough Mini-PCIe module is supported!\n"); + } else if (i != 0) { + printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n"); + } else { + ++passpci; + } } } - printf("\n"); - module_topology[len > 0 ? len - 1 : 0] = '\0'; + /* now configure modules */ - env_set("module_topology", module_topology); + if (get_reset_gpio(&reset_gpio) < 0) + return 0; -fail_release: - spi_release_bus(slave); -fail_free: - spi_free_slave(slave); -fail: - if (ret) - printf("Cannot read module topology!\n"); - return ret; + if (peridot > 0) { + if (configure_peridots(&reset_gpio) < 0) { + printf("Cannot configure Peridot modules!\n"); + peridot = 0; + } + } else { + dm_gpio_set_value(&reset_gpio, 1); + mdelay(50); + dm_gpio_set_value(&reset_gpio, 0); + mdelay(50); + } + + if (peridot || topaz) { + /* + * now check if the addresses are set by reading Scratch & Misc + * register 0x70 of Peridot (and potentially Topaz) modules + */ + + bus = miiphy_get_dev_by_name("neta@30000"); + if (!bus) { + printf("Cannot get MDIO bus device!\n"); + } else { + for (i = 0; i < peridot; ++i) + check_switch_address(bus, 0x10 + i); + + if (topaz) + check_switch_address(bus, 0x2); + + sw_blink_leds(bus, peridot, topaz); + } + } + + printf("\n"); + + return 0; } diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c index bc18fe6ddf..922576e9d5 100644 --- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c +++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c @@ -16,10 +16,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define ETH_PHY_CTRL_REG 0 -#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 -#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) - /* * Those values and defines are taken from the Marvell U-Boot version * "u-boot-2013.01-2016_T1.0.eng_drop_v10" diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c index 9368bce26c..1a0746b9d3 100644 --- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c +++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c @@ -16,10 +16,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define ETH_PHY_CTRL_REG 0 -#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 -#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) - /* * Those values and defines are taken from the Marvell U-Boot version * "u-boot-2013.01-2014_T3.0" diff --git a/board/alliedtelesis/common/gpio_hog.c b/board/alliedtelesis/common/gpio_hog.c new file mode 100644 index 0000000000..1f87b3ac1b --- /dev/null +++ b/board/alliedtelesis/common/gpio_hog.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Allied Telesis Labs + */ + +#include <common.h> +#include <dm.h> +#include <asm/gpio.h> + +DECLARE_GLOBAL_DATA_PTR; + +int gpio_hog_list(struct gpio_desc *gpiod, int max_count, + const char *node_name, const char *gpio_name, int value) +{ + int node; + int count; + int i; + + node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, node_name); + if (node < 0) + return -ENODEV; + + if (!dm_gpio_is_valid(gpiod)) { + count = + gpio_request_list_by_name_nodev(offset_to_ofnode(node), + gpio_name, gpiod, max_count, + GPIOD_IS_OUT); + if (count < 0) + return count; + + for (i = 0; i < count; i++) + dm_gpio_set_value(&gpiod[i], value); + } + + return 0; +} diff --git a/board/alliedtelesis/common/gpio_hog.h b/board/alliedtelesis/common/gpio_hog.h new file mode 100644 index 0000000000..edb7443131 --- /dev/null +++ b/board/alliedtelesis/common/gpio_hog.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2017 Allied Telesis Labs + */ + +int gpio_hog_list(struct gpio_desc *gpiod, int max_count, const char *node_name, + const char *gpio_name, int value); + +static inline int gpio_hog(struct gpio_desc *gpiod, const char *node_name, + const char *gpio_name, int value) +{ + return gpio_hog_list(gpiod, 1, node_name, gpio_name, value); +} diff --git a/board/alliedtelesis/x530/MAINTAINERS b/board/alliedtelesis/x530/MAINTAINERS new file mode 100644 index 0000000000..8d2d7271b9 --- /dev/null +++ b/board/alliedtelesis/x530/MAINTAINERS @@ -0,0 +1,12 @@ +x530 BOARD +M: Chris Packham <chris.packham@alliedtelesis.co.nz> +S: Maintained +F: board/alliedtelesis/x530/ +F: board/alliedtelesis/common/gpio_hog.c +F: board/alliedtelesis/common/gpio_hog.h +F: arch/arm/dts/armada-385-atl-x530.dts +F: arch/arm/dts/armada-385-atl-x530.dtsi +F: arch/arm/dts/armada-385-atl-x530DP.dts +F: arch/arm/dts/armada-385-atl-x530DP.dtsi +F: include/configs/x530.h +F: configs/x530_defconfig diff --git a/board/alliedtelesis/x530/Makefile b/board/alliedtelesis/x530/Makefile new file mode 100644 index 0000000000..97de1d463f --- /dev/null +++ b/board/alliedtelesis/x530/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2017 Allied Telesis Labs +# + +obj-y := $(BOARD).o +ifndef CONFIG_SPL_BUILD +obj-y += ../common/gpio_hog.o +endif diff --git a/board/alliedtelesis/x530/kwbimage.cfg b/board/alliedtelesis/x530/kwbimage.cfg new file mode 100644 index 0000000000..f58d388825 --- /dev/null +++ b/board/alliedtelesis/x530/kwbimage.cfg @@ -0,0 +1,12 @@ +# +# Copyright (C) 2017 Allied Telesis Labs +# + +# Armada XP uses version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM spi + +# Binary Header (bin_hdr) with DDR3 training code +BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c new file mode 100644 index 0000000000..b34ae51345 --- /dev/null +++ b/board/alliedtelesis/x530/x530.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 Allied Telesis Labs + */ + +#include <common.h> +#include <command.h> +#include <dm.h> +#include <i2c.h> +#include <asm/gpio.h> +#include <linux/mbus.h> +#include <linux/io.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> +#include "../common/gpio_hog.h" + +#include "../drivers/ddr/marvell/a38x/ddr3_init.h" +#include <../serdes/a38x/high_speed_env_spec.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define MVEBU_DEV_BUS_BASE (MVEBU_REGISTER(0x10400)) + +#define CONFIG_NVS_LOCATION 0xf4800000 +#define CONFIG_NVS_SIZE (512 << 10) + +static struct serdes_map board_serdes_map[] = { + {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, + {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, + {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0} +}; + +int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) +{ + *serdes_map_array = board_serdes_map; + *count = ARRAY_SIZE(board_serdes_map); + return 0; +} + +/* + * Define the DDR layout / topology here in the board file. This will + * be used by the DDR3 init code in the SPL U-Boot version to configure + * the DDR3 controller. + */ +static struct mv_ddr_topology_map board_topology_map = { + DEBUG_LEVEL_ERROR, + 0x1, /* active interfaces */ + /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */ + { { { {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0} }, + SPEED_BIN_DDR_1866M, /* speed_bin */ + MV_DDR_DEV_WIDTH_16BIT, /* sdram device width */ + MV_DDR_DIE_CAP_4GBIT, /* die capacity */ + MV_DDR_FREQ_933, /* frequency */ + 0, 0, /* cas_l cas_wl */ + MV_DDR_TEMP_LOW, /* temperature */ + MV_DDR_TIM_2T} }, /* timing */ + BUS_MASK_32BIT_ECC, /* subphys mask */ + MV_DDR_CFG_DEFAULT, /* ddr configuration data source */ + { {0} }, /* raw spd data */ + {0} /* timing parameters */ +}; + +struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) +{ + /* Return the board topology as defined in the board code */ + return &board_topology_map; +} + +int board_early_init_f(void) +{ + /* Configure MPP */ + writel(0x00001111, MVEBU_MPP_BASE + 0x00); + writel(0x00000000, MVEBU_MPP_BASE + 0x04); + writel(0x55000000, MVEBU_MPP_BASE + 0x08); + writel(0x55550550, MVEBU_MPP_BASE + 0x0c); + writel(0x55555555, MVEBU_MPP_BASE + 0x10); + writel(0x00100565, MVEBU_MPP_BASE + 0x14); + writel(0x40000000, MVEBU_MPP_BASE + 0x18); + writel(0x00004444, MVEBU_MPP_BASE + 0x1c); + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + /* window for NVS */ + mbus_dt_setup_win(&mbus_state, CONFIG_NVS_LOCATION, CONFIG_NVS_SIZE, + CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS1); + + /* DEV_READYn is not needed for NVS, ignore it when accessing CS1 */ + writel(0x00004001, MVEBU_DEV_BUS_BASE + 0xc8); + + return 0; +} + +static int led_7seg_init(unsigned int segments) +{ + int node; + int ret; + int i; + struct gpio_desc desc[8]; + + node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, + "atl,of-led-7seg"); + if (node < 0) + return -ENODEV; + + ret = gpio_request_list_by_name_nodev(offset_to_ofnode(node), + "segment-gpios", desc, + ARRAY_SIZE(desc), GPIOD_IS_OUT); + if (ret < 0) + return ret; + + for (i = 0; i < ARRAY_SIZE(desc); i++) { + ret = dm_gpio_set_value(&desc[i], !(segments & BIT(i))); + if (ret) + return ret; + } + + return 0; +} + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + static struct gpio_desc usb_en = {}, nand_wp = {}, phy_reset[2] = {}, + led_en = {}; + + gpio_hog(&usb_en, "atl,usb-enable", "enable-gpio", 1); + gpio_hog(&nand_wp, "atl,nand-protect", "protect-gpio", 1); + gpio_hog_list(phy_reset, ARRAY_SIZE(phy_reset), "atl,phy-reset", "reset-gpio", 0); + gpio_hog(&led_en, "atl,led-enable", "enable-gpio", 1); + +#ifdef MTDPARTS_MTDOOPS + env_set("mtdoops", MTDPARTS_MTDOOPS); +#endif + + led_7seg_init(0xff); + + return 0; +} +#endif + +#ifdef CONFIG_DISPLAY_BOARDINFO +int checkboard(void) +{ + puts("Board: " CONFIG_SYS_BOARD "\n"); + + return 0; +} +#endif diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c index d3e8831f84..abe8ee95d4 100644 --- a/board/freescale/ls1046aqds/eth.c +++ b/board/freescale/ls1046aqds/eth.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2018 NXP */ #include <common.h> @@ -153,6 +154,9 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, enum fm_port port, int offset) { struct fixed_link f_link; + const u32 *handle; + const char *prop = NULL; + int off; if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { switch (port) { @@ -208,16 +212,27 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, "qsgmii"); } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_XGMII && (port == FM1_10GEC1 || port == FM1_10GEC2)) { - /* XFI interface */ - f_link.phy_id = cpu_to_fdt32(port); - f_link.duplex = cpu_to_fdt32(1); - f_link.link_speed = cpu_to_fdt32(10000); - f_link.pause = 0; - f_link.asym_pause = 0; - /* no PHY for XFI */ - fdt_delprop(fdt, offset, "phy-handle"); - fdt_setprop(fdt, offset, "fixed-link", &f_link, sizeof(f_link)); - fdt_setprop_string(fdt, offset, "phy-connection-type", "xgmii"); + handle = fdt_getprop(fdt, offset, "phy-handle", NULL); + prop = NULL; + if (handle) { + off = fdt_node_offset_by_phandle(fdt, + fdt32_to_cpu(*handle)); + prop = fdt_getprop(fdt, off, "backplane-mode", NULL); + } + if (!prop || strcmp(prop, "10gbase-kr")) { + /* XFI interface */ + f_link.phy_id = cpu_to_fdt32(port); + f_link.duplex = cpu_to_fdt32(1); + f_link.link_speed = cpu_to_fdt32(10000); + f_link.pause = 0; + f_link.asym_pause = 0; + /* no PHY for XFI */ + fdt_delprop(fdt, offset, "phy-handle"); + fdt_setprop(fdt, offset, "fixed-link", &f_link, + sizeof(f_link)); + fdt_setprop_string(fdt, offset, "phy-connection-type", + "xgmii"); + } } } diff --git a/board/freescale/ls1088a/MAINTAINERS b/board/freescale/ls1088a/MAINTAINERS index 4d804d9447..98ecb88e3b 100644 --- a/board/freescale/ls1088a/MAINTAINERS +++ b/board/freescale/ls1088a/MAINTAINERS @@ -1,15 +1,19 @@ LS1088ARDB BOARD M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> M: Ashish Kumar <Ashish.Kumar@nxp.com> +M: Rajesh Bhagat <rajesh.bhagat@nxp.com> S: Maintained F: board/freescale/ls1088a/ F: include/configs/ls1088ardb.h F: configs/ls1088ardb_qspi_defconfig F: configs/ls1088ardb_sdcard_qspi_defconfig +F: configs/ls1088ardb_tfa_defconfig +F: configs/ls1088ardb_tfa_SECURE_BOOT_defconfig LS1088AQDS BOARD M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> M: Ashish Kumar <Ashish.Kumar@nxp.com> +M: Rajesh Bhagat <rajesh.bhagat@nxp.com> S: Maintained F: board/freescale/ls1088a/ F: include/configs/ls1088aqds.h @@ -17,6 +21,7 @@ F: configs/ls1088aqds_qspi_defconfig F: configs/ls1088aqds_sdcard_qspi_defconfig F: configs/ls1088aqds_defconfig F: configs/ls1088aqds_sdcard_ifc_defconfig +F: configs/ls1088aqds_tfa_defconfig LS1088AQDS_QSPI_SECURE_BOOT BOARD M: Udit Agarwal <udit.agarwal@nxp.com> diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c index 78d573a845..c21a2ce059 100644 --- a/board/freescale/ls1088a/ddr.c +++ b/board/freescale/ls1088a/ddr.c @@ -111,7 +111,17 @@ found: DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2; } +#ifdef CONFIG_TFABOOT +int fsl_initdram(void) +{ + gd->ram_size = tfa_get_dram_size(); + + if (!gd->ram_size) + gd->ram_size = fsl_ddr_sdram_size(); + return 0; +} +#else int fsl_initdram(void) { puts("Initializing DDR....using SPD\n"); @@ -123,3 +133,4 @@ int fsl_initdram(void) #endif return 0; } +#endif /* CONFIG_TFABOOT */ diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 1e2ad98c6e..953aab6e88 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -28,6 +28,121 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_TARGET_LS1088AQDS +#ifdef CONFIG_TFABOOT +struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { + { + "nor0", + CONFIG_SYS_NOR0_CSPR_EARLY, + CONFIG_SYS_NOR0_CSPR_EXT, + CONFIG_SYS_NOR_AMASK, + CONFIG_SYS_NOR_CSOR, + { + CONFIG_SYS_NOR_FTIM0, + CONFIG_SYS_NOR_FTIM1, + CONFIG_SYS_NOR_FTIM2, + CONFIG_SYS_NOR_FTIM3 + }, + 0, + CONFIG_SYS_NOR0_CSPR, + 0, + }, + { + "nor1", + CONFIG_SYS_NOR1_CSPR_EARLY, + CONFIG_SYS_NOR0_CSPR_EXT, + CONFIG_SYS_NOR_AMASK_EARLY, + CONFIG_SYS_NOR_CSOR, + { + CONFIG_SYS_NOR_FTIM0, + CONFIG_SYS_NOR_FTIM1, + CONFIG_SYS_NOR_FTIM2, + CONFIG_SYS_NOR_FTIM3 + }, + 0, + CONFIG_SYS_NOR1_CSPR, + CONFIG_SYS_NOR_AMASK, + }, + { + "nand", + CONFIG_SYS_NAND_CSPR, + CONFIG_SYS_NAND_CSPR_EXT, + CONFIG_SYS_NAND_AMASK, + CONFIG_SYS_NAND_CSOR, + { + CONFIG_SYS_NAND_FTIM0, + CONFIG_SYS_NAND_FTIM1, + CONFIG_SYS_NAND_FTIM2, + CONFIG_SYS_NAND_FTIM3 + }, + }, + { + "fpga", + CONFIG_SYS_FPGA_CSPR, + CONFIG_SYS_FPGA_CSPR_EXT, + SYS_FPGA_AMASK, + CONFIG_SYS_FPGA_CSOR, + { + SYS_FPGA_CS_FTIM0, + SYS_FPGA_CS_FTIM1, + SYS_FPGA_CS_FTIM2, + SYS_FPGA_CS_FTIM3 + }, + 0, + SYS_FPGA_CSPR_FINAL, + 0, + } +}; + +struct ifc_regs ifc_cfg_qspi_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { + { + "nand", + CONFIG_SYS_NAND_CSPR, + CONFIG_SYS_NAND_CSPR_EXT, + CONFIG_SYS_NAND_AMASK, + CONFIG_SYS_NAND_CSOR, + { + CONFIG_SYS_NAND_FTIM0, + CONFIG_SYS_NAND_FTIM1, + CONFIG_SYS_NAND_FTIM2, + CONFIG_SYS_NAND_FTIM3 + }, + }, + { + "reserved", + }, + { + "fpga", + CONFIG_SYS_FPGA_CSPR, + CONFIG_SYS_FPGA_CSPR_EXT, + SYS_FPGA_AMASK, + CONFIG_SYS_FPGA_CSOR, + { + SYS_FPGA_CS_FTIM0, + SYS_FPGA_CS_FTIM1, + SYS_FPGA_CS_FTIM2, + SYS_FPGA_CS_FTIM3 + }, + 0, + SYS_FPGA_CSPR_FINAL, + 0, + } +}; + +void ifc_cfg_boot_info(struct ifc_regs_info *regs_info) +{ + enum boot_src src = get_boot_src(); + + if (src == BOOT_SOURCE_QSPI_NOR) + regs_info->regs = ifc_cfg_qspi_nor_boot; + else + regs_info->regs = ifc_cfg_ifc_nor_boot; + + regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT; +} +#endif /* CONFIG_TFABOOT */ +#endif /* CONFIG_TARGET_LS1088AQDS */ + int board_early_init_f(void) { #if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_TARGET_LS1088AQDS) @@ -88,6 +203,9 @@ int fixup_ls1088ardb_pb_banner(void *fdt) #if !defined(CONFIG_SPL_BUILD) int checkboard(void) { +#ifdef CONFIG_TFABOOT + enum boot_src src = get_boot_src(); +#endif char buf[64]; u8 sw; static const char *const freq[] = {"100", "125", "156.25", @@ -117,9 +235,14 @@ int checkboard(void) sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; +#ifdef CONFIG_TFABOOT + if (src == BOOT_SOURCE_SD_MMC) + puts("SD card\n"); +#else #ifdef CONFIG_SD_BOOT puts("SD card\n"); #endif +#endif /* CONFIG_TFABOOT */ switch (sw) { #ifdef CONFIG_TARGET_LS1088AQDS case 0: @@ -535,7 +658,8 @@ void fdt_fixup_board_enet(void *fdt) return; } - if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) + if (get_mc_boot_status() == 0 && + (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) fdt_status_okay(fdt, offset); else fdt_status_fail(fdt, offset); @@ -546,6 +670,10 @@ void fdt_fixup_board_enet(void *fdt) void fsl_fdt_fixup_flash(void *fdt) { int offset; +#ifdef CONFIG_TFABOOT + u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE; + u32 val; +#endif /* * IFC-NOR and QSPI are muxed on SoC. @@ -553,6 +681,37 @@ void fsl_fdt_fixup_flash(void *fdt) * disable QSPI node in dts in case QSPI is not enabled. */ +#ifdef CONFIG_TFABOOT + enum boot_src src = get_boot_src(); + bool disable_ifc = false; + + switch (src) { + case BOOT_SOURCE_IFC_NOR: + disable_ifc = false; + break; + case BOOT_SOURCE_QSPI_NOR: + disable_ifc = true; + break; + default: + val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4); + if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3)) + disable_ifc = true; + break; + } + + if (disable_ifc) { + offset = fdt_path_offset(fdt, "/soc/ifc/nor"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/ifc/nor"); + } else { + offset = fdt_path_offset(fdt, "/soc/quadspi"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/quadspi"); + } + +#else #ifdef CONFIG_FSL_QSPI offset = fdt_path_offset(fdt, "/soc/ifc/nor"); @@ -564,6 +723,7 @@ void fsl_fdt_fixup_flash(void *fdt) if (offset < 0) offset = fdt_path_offset(fdt, "/quadspi"); #endif +#endif if (offset < 0) return; @@ -613,3 +773,37 @@ int ft_board_setup(void *blob, bd_t *bd) } #endif #endif /* defined(CONFIG_SPL_BUILD) */ + +#ifdef CONFIG_TFABOOT +#ifdef CONFIG_MTD_NOR_FLASH +int is_flash_available(void) +{ + char *env_hwconfig = env_get("hwconfig"); + enum boot_src src = get_boot_src(); + int is_nor_flash_available = 1; + + switch (src) { + case BOOT_SOURCE_IFC_NOR: + is_nor_flash_available = 1; + break; + case BOOT_SOURCE_QSPI_NOR: + is_nor_flash_available = 0; + break; + /* + * In Case of SD boot,if qspi is defined in env_hwconfig + * disable nor flash probe. + */ + default: + if (hwconfig_f("qspi", env_hwconfig)) + is_nor_flash_available = 0; + break; + } + return is_nor_flash_available; +} +#endif + +void *env_sf_get_env_addr(void) +{ + return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET); +} +#endif diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c index 698ae1f9a6..cc1822d0f5 100644 --- a/board/freescale/ls2080a/ls2080a.c +++ b/board/freescale/ls2080a/ls2080a.c @@ -89,7 +89,8 @@ void fdt_fixup_board_enet(void *fdt) return; } - if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) + if (get_mc_boot_status() == 0 && + (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) fdt_status_okay(fdt, offset); else fdt_status_fail(fdt, offset); @@ -142,3 +143,10 @@ void reset_phy(void) { } #endif + +#ifdef CONFIG_TFABOOT +void *env_sf_get_env_addr(void) +{ + return (void *)(CONFIG_SYS_FSL_QSPI_BASE1 + CONFIG_ENV_OFFSET); +} +#endif diff --git a/board/freescale/ls2080aqds/MAINTAINERS b/board/freescale/ls2080aqds/MAINTAINERS index f7f1f09513..e3d7635476 100644 --- a/board/freescale/ls2080aqds/MAINTAINERS +++ b/board/freescale/ls2080aqds/MAINTAINERS @@ -1,5 +1,6 @@ LS2080A BOARD M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>, Priyanka Jain <priyanka.jain@nxp.com> +M: Rajesh Bhagat <rajesh.bhagat@nxp.com> S: Maintained F: board/freescale/ls2080aqds/ F: board/freescale/ls2080a/ls2080aqds.c @@ -8,6 +9,7 @@ F: configs/ls2080aqds_defconfig F: configs/ls2080aqds_nand_defconfig F: configs/ls2080aqds_qspi_defconfig F: configs/ls2080aqds_sdcard_defconfig +F: configs/ls2088aqds_tfa_defconfig LS2080A_SECURE_BOOT BOARD #M: Saksham Jain <saksham.jain@nxp.freescale.com> diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c index e9e7333c0a..fffe78c301 100644 --- a/board/freescale/ls2080aqds/ddr.c +++ b/board/freescale/ls2080aqds/ddr.c @@ -155,6 +155,17 @@ found: } } +#ifdef CONFIG_TFABOOT +int fsl_initdram(void) +{ + gd->ram_size = tfa_get_dram_size(); + + if (!gd->ram_size) + gd->ram_size = fsl_ddr_sdram_size(); + + return 0; +} +#else int fsl_initdram(void) { #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) @@ -167,3 +178,4 @@ int fsl_initdram(void) return 0; } +#endif /* CONFIG_TFABOOT */ diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index d336ef840c..a0a3301691 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -294,7 +294,8 @@ void fdt_fixup_board_enet(void *fdt) return; } - if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) + if (get_mc_boot_status() == 0 && + (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) fdt_status_okay(fdt, offset); else fdt_status_fail(fdt, offset); diff --git a/board/freescale/ls2080ardb/MAINTAINERS b/board/freescale/ls2080ardb/MAINTAINERS index bbe56e2052..113b7ab3fd 100644 --- a/board/freescale/ls2080ardb/MAINTAINERS +++ b/board/freescale/ls2080ardb/MAINTAINERS @@ -9,8 +9,11 @@ F: configs/ls2080ardb_nand_defconfig LS2088A_QSPI-boot BOARD M: Priyanka Jain <priyanka.jain@nxp.com> +M: Rajesh Bhagat <rajesh.bhagat@nxp.com> S: Maintained F: configs/ls2088ardb_qspi_defconfig +F: configs/ls2088ardb_tfa_defconfig +F: configs/ls2088ardb_tfa_SECURE_BOOT_defconfig LS2081ARDB BOARD M: Priyanka Jain <priyanka.jain@nxp.com> diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c index 26eb14b812..72ce872c75 100644 --- a/board/freescale/ls2080ardb/ddr.c +++ b/board/freescale/ls2080ardb/ddr.c @@ -160,6 +160,17 @@ found: } } +#ifdef CONFIG_TFABOOT +int fsl_initdram(void) +{ + gd->ram_size = tfa_get_dram_size(); + + if (!gd->ram_size) + gd->ram_size = fsl_ddr_sdram_size(); + + return 0; +} +#else int fsl_initdram(void) { #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) @@ -172,3 +183,4 @@ int fsl_initdram(void) return 0; } +#endif /* CONFIG_TFABOOT */ diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index cf91bc30fb..ce419dfcae 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -330,7 +330,8 @@ void fdt_fixup_board_enet(void *fdt) return; } - if ((get_mc_boot_status() == 0) && (get_dpl_apply_status() == 0)) + if (get_mc_boot_status() == 0 && + (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) fdt_status_okay(fdt, offset); else fdt_status_fail(fdt, offset); @@ -346,12 +347,47 @@ void board_quiesce_devices(void) void fsl_fdt_fixup_flash(void *fdt) { int offset; +#ifdef CONFIG_TFABOOT + u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE; + u32 val; +#endif /* * IFC and QSPI are muxed on board. * So disable IFC node in dts if QSPI is enabled or * disable QSPI node in dts in case QSPI is not enabled. */ +#ifdef CONFIG_TFABOOT + enum boot_src src = get_boot_src(); + bool disable_ifc = false; + + switch (src) { + case BOOT_SOURCE_IFC_NOR: + disable_ifc = false; + break; + case BOOT_SOURCE_QSPI_NOR: + disable_ifc = true; + break; + default: + val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4); + if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3)) + disable_ifc = true; + break; + } + + if (disable_ifc) { + offset = fdt_path_offset(fdt, "/soc/ifc"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/ifc"); + } else { + offset = fdt_path_offset(fdt, "/soc/quadspi"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/quadspi"); + } + +#else #ifdef CONFIG_FSL_QSPI offset = fdt_path_offset(fdt, "/soc/ifc"); @@ -363,6 +399,8 @@ void fsl_fdt_fixup_flash(void *fdt) if (offset < 0) offset = fdt_path_offset(fdt, "/quadspi"); #endif +#endif + if (offset < 0) return; diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c index 86051aedf8..9e448fcd10 100644 --- a/board/gdsys/a38x/controlcenterdc.c +++ b/board/gdsys/a38x/controlcenterdc.c @@ -22,10 +22,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define ETH_PHY_CTRL_REG 0 -#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 -#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) - #define DB_GP_88F68XX_GPP_OUT_ENA_LOW 0x7fffffff #define DB_GP_88F68XX_GPP_OUT_ENA_MID 0xffffefff diff --git a/board/kobol/helios4/helios4.c b/board/kobol/helios4/helios4.c index 8c0864bcdd..3c3592ecf5 100644 --- a/board/kobol/helios4/helios4.c +++ b/board/kobol/helios4/helios4.c @@ -17,10 +17,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define ETH_PHY_CTRL_REG 0 -#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 -#define ETH_PHY_CTRL_POWER_DOWN_MASK BIT(ETH_PHY_CTRL_POWER_DOWN_BIT) - /* * Those values and defines are taken from the Marvell U-Boot version * "u-boot-2013.01-15t1-helios4" as well as the upstream config for clearfog diff --git a/board/mediatek/mt7623/mt7623_rfb.c b/board/mediatek/mt7623/mt7623_rfb.c index 08468b50ea..4ec2764976 100644 --- a/board/mediatek/mt7623/mt7623_rfb.c +++ b/board/mediatek/mt7623/mt7623_rfb.c @@ -14,3 +14,22 @@ int board_init(void) return 0; } + +int mmc_get_boot_dev(void) +{ + int g_mmc_devid = -1; + char *uflag = (char *)0x81DFFFF0; + if (strncmp(uflag,"eMMC",4)==0) { + g_mmc_devid = 0; + printf("Boot From Emmc(id:%d)\n\n", g_mmc_devid); + } else { + g_mmc_devid = 1; + printf("Boot From SD(id:%d)\n\n", g_mmc_devid); + } + return g_mmc_devid; +} + +int mmc_get_env_dev(void) +{ + return mmc_get_boot_dev(); +} diff --git a/board/mscc/ocelot/ocelot.c b/board/mscc/ocelot/ocelot.c index 0f7a532158..532d06f000 100644 --- a/board/mscc/ocelot/ocelot.c +++ b/board/mscc/ocelot/ocelot.c @@ -10,6 +10,7 @@ #include <environment.h> #include <spi.h> #include <led.h> +#include <wait_bit.h> DECLARE_GLOBAL_DATA_PTR; @@ -18,6 +19,29 @@ enum { BOARD_TYPE_PCB123, }; +void mscc_switch_reset(bool enter) +{ + /* Nasty workaround to avoid GPIO19 (DDR!) being reset */ + mscc_gpio_set_alternate(19, 2); + + debug("applying SwC reset\n"); + + writel(ICPU_RESET_CORE_RST_PROTECT, BASE_CFG + ICPU_RESET); + writel(PERF_SOFT_RST_SOFT_CHIP_RST, BASE_DEVCPU_GCB + PERF_SOFT_RST); + + if (wait_for_bit_le32(BASE_DEVCPU_GCB + PERF_SOFT_RST, + PERF_SOFT_RST_SOFT_CHIP_RST, false, 5000, false)) + pr_err("Tiemout while waiting for switch reset\n"); + + /* + * Reset GPIO19 mode back as regular GPIO, output, high (DDR + * not reset) (Order is important) + */ + setbits_le32(BASE_DEVCPU_GCB + PERF_GPIO_OE, BIT(19)); + writel(BIT(19), BASE_DEVCPU_GCB + PERF_GPIO_OUT_SET); + mscc_gpio_set_alternate(19, 0); +} + void board_debug_uart_init(void) { /* too early for the pinctrl driver, so configure the UART pins here */ diff --git a/board/mscc/serval/Kconfig b/board/mscc/serval/Kconfig new file mode 100644 index 0000000000..64f1c683e4 --- /dev/null +++ b/board/mscc/serval/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +config SYS_VENDOR + default "mscc" + +if SOC_SERVAL + +config SYS_BOARD + default "serval" + +config SYS_CONFIG_NAME + default "serval" + +endif diff --git a/board/mscc/serval/Makefile b/board/mscc/serval/Makefile new file mode 100644 index 0000000000..c7ba56e951 --- /dev/null +++ b/board/mscc/serval/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +obj-$(CONFIG_SOC_SERVAL) := serval.o diff --git a/board/mscc/serval/serval.c b/board/mscc/serval/serval.c new file mode 100644 index 0000000000..24ee5e528d --- /dev/null +++ b/board/mscc/serval/serval.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Microsemi Corporation + */ + +#include <common.h> +#include <asm/io.h> +#include <led.h> + +enum { + BOARD_TYPE_PCB106 = 0xAABBCD00, + BOARD_TYPE_PCB105, +}; + +int board_early_init_r(void) +{ + /* Prepare SPI controller to be used in master mode */ + writel(0, BASE_CFG + ICPU_SW_MODE); + + /* Address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE; + + /* LED setup */ + if (IS_ENABLED(CONFIG_LED)) + led_default_state(); + + return 0; +} + +static void do_board_detect(void) +{ + u16 gpio_in_reg; + + /* Set MDIO and MDC */ + mscc_gpio_set_alternate(9, 2); + mscc_gpio_set_alternate(10, 2); + + /* Set GPIO page */ + mscc_phy_wr(1, 16, 31, 0x10); + if (!mscc_phy_rd(1, 16, 15, &gpio_in_reg)) { + if (gpio_in_reg & 0x200) + gd->board_type = BOARD_TYPE_PCB106; + else + gd->board_type = BOARD_TYPE_PCB105; + mscc_phy_wr(1, 16, 15, 0); + } else { + gd->board_type = BOARD_TYPE_PCB105; + } +} + +#if defined(CONFIG_MULTI_DTB_FIT) +int board_fit_config_name_match(const char *name) +{ + if (gd->board_type == BOARD_TYPE_PCB106 && + strcmp(name, "serval_pcb106") == 0) + return 0; + + if (gd->board_type == BOARD_TYPE_PCB105 && + strcmp(name, "serval_pcb105") == 0) + return 0; + + return -1; +} +#endif + +#if defined(CONFIG_DTB_RESELECT) +int embedded_dtb_select(void) +{ + do_board_detect(); + fdtdec_setup(); + + return 0; +} +#endif diff --git a/board/mscc/servalt/Kconfig b/board/mscc/servalt/Kconfig new file mode 100644 index 0000000000..61140f89bf --- /dev/null +++ b/board/mscc/servalt/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +config SYS_VENDOR + default "mscc" + +if SOC_SERVALT + +config SYS_BOARD + default "servalt" + +config SYS_CONFIG_NAME + default "servalt" + +endif diff --git a/board/mscc/servalt/Makefile b/board/mscc/servalt/Makefile new file mode 100644 index 0000000000..9a37eeabaf --- /dev/null +++ b/board/mscc/servalt/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +obj-$(CONFIG_SOC_SERVALT) := servalt.o diff --git a/board/mscc/servalt/servalt.c b/board/mscc/servalt/servalt.c new file mode 100644 index 0000000000..566f9765c2 --- /dev/null +++ b/board/mscc/servalt/servalt.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Microsemi Corporation + */ + +#include <common.h> +#include <asm/io.h> +#include <led.h> + +enum { + BOARD_TYPE_PCB116 = 0xAABBCE00, +}; + +int board_early_init_r(void) +{ + /* Prepare SPI controller to be used in master mode */ + writel(0, BASE_CFG + ICPU_SW_MODE); + + /* Address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE; + + /* LED setup */ + if (IS_ENABLED(CONFIG_LED)) + led_default_state(); + + return 0; +} + +static void do_board_detect(void) +{ + gd->board_type = BOARD_TYPE_PCB116; /* ServalT */ +} + +#if defined(CONFIG_MULTI_DTB_FIT) +int board_fit_config_name_match(const char *name) +{ + if (gd->board_type == BOARD_TYPE_PCB116 && + strcmp(name, "servalt_pcb116") == 0) + return 0; + return -1; +} +#endif + +#if defined(CONFIG_DTB_RESELECT) +int embedded_dtb_select(void) +{ + do_board_detect(); + fdtdec_setup(); + + return 0; +} +#endif diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 1742aa8921..03724fee10 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -16,10 +16,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define ETH_PHY_CTRL_REG 0 -#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 -#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) - /* * Those values and defines are taken from the Marvell U-Boot version * "u-boot-2013.01-15t1-clearfog" diff --git a/board/ti/am335x/MAINTAINERS b/board/ti/am335x/MAINTAINERS index c99e06dc10..565f7055cd 100644 --- a/board/ti/am335x/MAINTAINERS +++ b/board/ti/am335x/MAINTAINERS @@ -6,7 +6,4 @@ F: include/configs/am335x_evm.h F: configs/am335x_boneblack_defconfig F: configs/am335x_boneblack_vboot_defconfig F: configs/am335x_evm_defconfig -F: configs/am335x_evm_nor_defconfig -F: configs/am335x_evm_norboot_defconfig -F: configs/am335x_evm_spiboot_defconfig F: configs/am335x_evm_usbspl_defconfig diff --git a/board/ti/am43xx/MAINTAINERS b/board/ti/am43xx/MAINTAINERS index bf098064bd..ab9da22c64 100644 --- a/board/ti/am43xx/MAINTAINERS +++ b/board/ti/am43xx/MAINTAINERS @@ -4,7 +4,6 @@ S: Maintained F: board/ti/am43xx/ F: include/configs/am43xx_evm.h F: configs/am43xx_evm_defconfig -F: configs/am43xx_evm_ethboot_defconfig F: configs/am43xx_evm_qspiboot_defconfig F: configs/am43xx_evm_usbhost_boot_defconfig F: configs/am43xx_evm_rtconly_defconfig diff --git a/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c b/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c index c1cc1df23d..d90a350d3f 100644 --- a/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c +++ b/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c @@ -8,8 +8,8 @@ static unsigned long ps7_pll_init_data_3_0[] = { EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU, 0x0000DF0DU), - EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U, 0x000FA220U), - EMIT_MASKWRITE(0XF8000100, 0x0007F000U, 0x00028000U), + EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U, 0x000FA240U), + EMIT_MASKWRITE(0XF8000100, 0x0007F000U, 0x00030000U), EMIT_MASKWRITE(0XF8000100, 0x00000010U, 0x00000010U), EMIT_MASKWRITE(0XF8000100, 0x00000001U, 0x00000001U), EMIT_MASKWRITE(0XF8000100, 0x00000001U, 0x00000000U), @@ -24,8 +24,8 @@ static unsigned long ps7_pll_init_data_3_0[] = { EMIT_MASKPOLL(0XF800010C, 0x00000002U), EMIT_MASKWRITE(0XF8000104, 0x00000010U, 0x00000000U), EMIT_MASKWRITE(0XF8000124, 0xFFF00003U, 0x0C200003U), - EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U, 0x00113220U), - EMIT_MASKWRITE(0XF8000108, 0x0007F000U, 0x00024000U), + EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U, 0x001452C0U), + EMIT_MASKWRITE(0XF8000108, 0x0007F000U, 0x0001E000U), EMIT_MASKWRITE(0XF8000108, 0x00000010U, 0x00000010U), EMIT_MASKWRITE(0XF8000108, 0x00000001U, 0x00000001U), EMIT_MASKWRITE(0XF8000108, 0x00000001U, 0x00000000U), @@ -37,20 +37,18 @@ static unsigned long ps7_pll_init_data_3_0[] = { static unsigned long ps7_clock_init_data_3_0[] = { EMIT_MASKWRITE(0XF8000008, 0x0000FFFFU, 0x0000DF0DU), - EMIT_MASKWRITE(0XF8000128, 0x03F03F01U, 0x00302301U), - EMIT_MASKWRITE(0XF8000138, 0x00000011U, 0x00000011U), + EMIT_MASKWRITE(0XF8000128, 0x03F03F01U, 0x00700F01U), + EMIT_MASKWRITE(0XF8000138, 0x00000011U, 0x00000001U), EMIT_MASKWRITE(0XF800013C, 0x00000011U, 0x00000011U), - EMIT_MASKWRITE(0XF8000140, 0x03F03F71U, 0x00100141U), - EMIT_MASKWRITE(0XF8000144, 0x03F03F71U, 0x00100141U), - EMIT_MASKWRITE(0XF8000148, 0x00003F31U, 0x00000C01U), - EMIT_MASKWRITE(0XF800014C, 0x00003F31U, 0x00000601U), - EMIT_MASKWRITE(0XF8000150, 0x00003F33U, 0x00001803U), - EMIT_MASKWRITE(0XF8000154, 0x00003F33U, 0x00000C03U), - EMIT_MASKWRITE(0XF8000158, 0x00003F33U, 0x00000601U), - EMIT_MASKWRITE(0XF8000168, 0x00003F31U, 0x00000601U), - EMIT_MASKWRITE(0XF8000170, 0x03F03F30U, 0x00100C00U), - EMIT_MASKWRITE(0XF8000180, 0x03F03F30U, 0x00100C00U), - EMIT_MASKWRITE(0XF8000190, 0x03F03F30U, 0x00100600U), + EMIT_MASKWRITE(0XF8000140, 0x03F03F71U, 0x00100801U), + EMIT_MASKWRITE(0XF800014C, 0x00003F31U, 0x00000501U), + EMIT_MASKWRITE(0XF8000150, 0x00003F33U, 0x00000A01U), + EMIT_MASKWRITE(0XF8000154, 0x00003F33U, 0x00000A03U), + EMIT_MASKWRITE(0XF8000158, 0x00003F33U, 0x00000501U), + EMIT_MASKWRITE(0XF8000168, 0x00003F31U, 0x00000501U), + EMIT_MASKWRITE(0XF8000170, 0x03F03F30U, 0x00200500U), + EMIT_MASKWRITE(0XF8000180, 0x03F03F30U, 0x00100700U), + EMIT_MASKWRITE(0XF8000190, 0x03F03F30U, 0x00100500U), EMIT_MASKWRITE(0XF80001A0, 0x03F03F30U, 0x00101800U), EMIT_MASKWRITE(0XF80001C4, 0x00000001U, 0x00000001U), EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU, 0x01FC4C4DU), @@ -88,7 +86,7 @@ static unsigned long ps7_ddr_init_data_3_0[] = { EMIT_MASKWRITE(0XF8006078, 0x03FFFFFFU, 0x00466111U), EMIT_MASKWRITE(0XF800607C, 0x000FFFFFU, 0x00032222U), EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU, 0x10200802U), - EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU, 0x0690CB73U), + EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU, 0x0690CB52U), EMIT_MASKWRITE(0XF80060AC, 0x000001FFU, 0x000001FEU), EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU), EMIT_MASKWRITE(0XF80060B4, 0x00000200U, 0x00000200U), diff --git a/board/work-microwave/work_92105/Kconfig b/board/work-microwave/work_92105/Kconfig index 32632f5ab5..380e2dfc24 100644 --- a/board/work-microwave/work_92105/Kconfig +++ b/board/work-microwave/work_92105/Kconfig @@ -10,7 +10,7 @@ config SYS_CONFIG_NAME default "work_92105" config CMD_HD44760 - bool "Enable 'hd44780' LCD-control comand" + bool "Enable 'hd44780' LCD-control command" help This controls the LCD driver. diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c index 3e039ccb13..321670d4e3 100644 --- a/board/xilinx/zynqmp/cmds.c +++ b/board/xilinx/zynqmp/cmds.c @@ -174,11 +174,11 @@ static char zynqmp_help_text[] = "zynqmp mmio_write address mask value - write value after masking to\n" " address\n" #ifdef CONFIG_DEFINE_TCM_OCM_MMAP - "zynqmp tcminit mode - Initialize the TCM with zeros. TCM needs to be\n" - " initialized before accessing to avoid ECC\n" - " errors. mode specifies in which mode TCM has\n" - " to be initialized. Supported modes will be\n" - " lock(0)/split(1)\n" + "zynqmp tcminit mode - Initialize the TCM with zeros. TCM needs to be\n" + " initialized before accessing to avoid ECC\n" + " errors. mode specifies in which mode TCM has\n" + " to be initialized. Supported modes will be\n" + " lock(0)/split(1)\n" #endif ; #endif diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 13c404b6ef..41e88b03f9 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -489,6 +489,7 @@ void reset_cpu(ulong addr) { } +#if defined(CONFIG_BOARD_LATE_INIT) static const struct { u32 bit; const char *name; @@ -587,6 +588,8 @@ int board_late_init(void) case SD_MODE: puts("SD_MODE\n"); if (uclass_get_device_by_name(UCLASS_MMC, + "mmc@ff160000", &dev) && + uclass_get_device_by_name(UCLASS_MMC, "sdhci@ff160000", &dev)) { puts("Boot from SD0 but without SD0 enabled!\n"); return -1; @@ -603,6 +606,8 @@ int board_late_init(void) case SD_MODE1: puts("SD_MODE1\n"); if (uclass_get_device_by_name(UCLASS_MMC, + "mmc@ff170000", &dev) && + uclass_get_device_by_name(UCLASS_MMC, "sdhci@ff170000", &dev)) { puts("Boot from SD1 but without SD1 enabled!\n"); return -1; @@ -655,6 +660,7 @@ int board_late_init(void) return 0; } +#endif int checkboard(void) { |