diff options
Diffstat (limited to 'board')
| -rw-r--r-- | board/intel/galileo/.gitignore | 3 | ||||
| -rw-r--r-- | board/intel/galileo/Makefile | 1 | ||||
| -rw-r--r-- | board/intel/galileo/acpi/mainboard.asl | 11 | ||||
| -rw-r--r-- | board/intel/galileo/dsdt.asl | 14 | ||||
| -rw-r--r-- | board/spear/x600/x600.c | 80 |
5 files changed, 88 insertions, 21 deletions
diff --git a/board/intel/galileo/.gitignore b/board/intel/galileo/.gitignore new file mode 100644 index 0000000000..6eb8a5481a --- /dev/null +++ b/board/intel/galileo/.gitignore @@ -0,0 +1,3 @@ +dsdt.aml +dsdt.asl.tmp +dsdt.c diff --git a/board/intel/galileo/Makefile b/board/intel/galileo/Makefile index 8356df198c..bbe2f8bf5b 100644 --- a/board/intel/galileo/Makefile +++ b/board/intel/galileo/Makefile @@ -5,3 +5,4 @@ # obj-y += galileo.o start.o +obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o diff --git a/board/intel/galileo/acpi/mainboard.asl b/board/intel/galileo/acpi/mainboard.asl new file mode 100644 index 0000000000..21785ea73b --- /dev/null +++ b/board/intel/galileo/acpi/mainboard.asl @@ -0,0 +1,11 @@ +/* + * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* Power Button */ +Device (PWRB) +{ + Name(_HID, EISAID("PNP0C0C")) +} diff --git a/board/intel/galileo/dsdt.asl b/board/intel/galileo/dsdt.asl new file mode 100644 index 0000000000..6042011acf --- /dev/null +++ b/board/intel/galileo/dsdt.asl @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000) +{ + /* platform specific */ + #include <asm/arch/acpi/platform.asl> + + /* board specific */ + #include "acpi/mainboard.asl" +} diff --git a/board/spear/x600/x600.c b/board/spear/x600/x600.c index b8edfcd071..f8e9fddb0f 100644 --- a/board/spear/x600/x600.c +++ b/board/spear/x600/x600.c @@ -8,6 +8,7 @@ */ #include <common.h> +#include <micrel.h> #include <nand.h> #include <netdev.h> #include <phy.h> @@ -69,27 +70,64 @@ void board_nand_init(void) int board_phy_config(struct phy_device *phydev) { - /* Extended PHY control 1, select GMII */ - phy_write(phydev, MDIO_DEVAD_NONE, 23, 0x0020); - - /* Software reset necessary after GMII mode selction */ - phy_reset(phydev); - - /* Enable extended page register access */ - phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0001); - - /* 17e: Enhanced LED behavior, needs to be written twice */ - phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff); - phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff); - - /* 16e: Enhanced LED method select */ - phy_write(phydev, MDIO_DEVAD_NONE, 16, 0xe0ea); - - /* Disable extended page register access */ - phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000); - - /* Enable clock output pin */ - phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x0049); + unsigned short id1, id2; + + /* check whether KSZ9031 or AR8035 has to be configured */ + id1 = phy_read(phydev, MDIO_DEVAD_NONE, 2); + id2 = phy_read(phydev, MDIO_DEVAD_NONE, 3); + + if ((id1 == 0x22) && ((id2 & 0xFFF0) == 0x1620)) { + /* PHY configuration for Micrel KSZ9031 */ + printf("PHY KSZ9031 detected - "); + + phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00); + + /* control data pad skew - devaddr = 0x02, register = 0x04 */ + ksz9031_phy_extended_write(phydev, 0x02, + MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, + MII_KSZ9031_MOD_DATA_NO_POST_INC, + 0x0000); + /* rx data pad skew - devaddr = 0x02, register = 0x05 */ + ksz9031_phy_extended_write(phydev, 0x02, + MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, + MII_KSZ9031_MOD_DATA_NO_POST_INC, + 0x0000); + /* tx data pad skew - devaddr = 0x02, register = 0x05 */ + ksz9031_phy_extended_write(phydev, 0x02, + MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, + MII_KSZ9031_MOD_DATA_NO_POST_INC, + 0x0000); + /* gtx and rx clock pad skew - devaddr = 0x02, reg = 0x08 */ + ksz9031_phy_extended_write(phydev, 0x02, + MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, + MII_KSZ9031_MOD_DATA_NO_POST_INC, + 0x03FF); + } else { + /* PHY configuration for Vitesse VSC8641 */ + printf("PHY VSC8641 detected - "); + + /* Extended PHY control 1, select GMII */ + phy_write(phydev, MDIO_DEVAD_NONE, 23, 0x0020); + + /* Software reset necessary after GMII mode selction */ + phy_reset(phydev); + + /* Enable extended page register access */ + phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0001); + + /* 17e: Enhanced LED behavior, needs to be written twice */ + phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff); + phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff); + + /* 16e: Enhanced LED method select */ + phy_write(phydev, MDIO_DEVAD_NONE, 16, 0xe0ea); + + /* Disable extended page register access */ + phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000); + + /* Enable clock output pin */ + phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x0049); + } if (phydev->drv->config) phydev->drv->config(phydev); |