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-rw-r--r--board/BuR/common/common.c9
-rw-r--r--board/compulab/cm_t43/Makefile6
-rw-r--r--board/compulab/cm_t43/cm_t43.c151
-rw-r--r--board/compulab/cm_t43/spl.c (renamed from board/compulab/cm_t43/board.c)153
-rw-r--r--board/logicpd/omap3som/omap3logic.c24
-rw-r--r--board/raspberrypi/rpi/rpi.c33
-rw-r--r--board/samsung/origen/tools/mkorigenspl.c4
-rw-r--r--board/st/stm32f429-discovery/stm32f429-discovery.c8
-rw-r--r--board/st/stm32f746-disco/Kconfig19
-rw-r--r--board/st/stm32f746-disco/MAINTAINERS6
-rw-r--r--board/st/stm32f746-disco/Makefile8
-rw-r--r--board/st/stm32f746-disco/stm32f746-disco.c99
-rw-r--r--board/sunxi/Kconfig5
-rw-r--r--board/sunxi/board.c5
-rw-r--r--board/xilinx/zynq/board.c4
15 files changed, 375 insertions, 159 deletions
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 441465c005..ce4acc13e0 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -12,7 +12,6 @@
#include <version.h>
#include <common.h>
#include <errno.h>
-#include <spl.h>
#include <asm/arch/cpu.h>
#include <asm/arch/hardware.h>
#include <asm/arch/omap.h>
@@ -640,8 +639,7 @@ static struct cpsw_platform_data cpsw_data = {
};
#endif /* CONFIG_DRIVER_TI_CPSW, ... */
-#if defined(CONFIG_DRIVER_TI_CPSW)
-
+#if defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)
int board_eth_init(bd_t *bis)
{
int rv = 0;
@@ -658,8 +656,6 @@ int board_eth_init(bd_t *bis)
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
-#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
if (!getenv("ethaddr")) {
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_FDT)
printf("<ethaddr> not set. trying DTB ... ");
@@ -685,10 +681,9 @@ int board_eth_init(bd_t *bis)
printf("Error %d registering CPSW switch\n", rv);
return 0;
}
-#endif /* CONFIG_DRIVER_TI_CPSW, ... */
return rv;
}
-#endif /* CONFIG_DRIVER_TI_CPSW */
+#endif /* defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD) */
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
diff --git a/board/compulab/cm_t43/Makefile b/board/compulab/cm_t43/Makefile
index 399368920d..c749659b26 100644
--- a/board/compulab/cm_t43/Makefile
+++ b/board/compulab/cm_t43/Makefile
@@ -6,4 +6,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += board.o mux.o
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o mux.o
+else
+obj-y += cm_t43.o mux.o
+endif
diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c
new file mode 100644
index 0000000000..0d5da6f5e9
--- /dev/null
+++ b/board/compulab/cm_t43/cm_t43.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2015 Compulab, Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <miiphy.h>
+#include <cpsw.h>
+#include <asm/gpio.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/emif.h>
+#include <power/pmic.h>
+#include <power/tps65218.h>
+#include "board.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
+/* setup board specific PMIC */
+int power_init_board(void)
+{
+ struct pmic *p;
+ uchar tps_status = 0;
+
+ power_tps65218_init(I2C_PMIC);
+ p = pmic_get("TPS65218_PMIC");
+ if (p && !pmic_probe(p)) {
+ puts("PMIC: TPS65218\n");
+ /* We don't care if fseal is locked, but we do need it set */
+ tps65218_lock_fseal();
+ tps65218_reg_read(TPS65218_STATUS, &tps_status);
+ if (!(tps_status & TPS65218_FSEAL))
+ printf("WARNING: RTC not backed by battery!\n");
+ }
+
+ return 0;
+}
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ gpmc_init();
+ set_i2c_pin_mux();
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ i2c_probe(TPS65218_CHIP_PM);
+
+ return 0;
+}
+
+#ifdef CONFIG_DRIVER_TI_CPSW
+
+static void cpsw_control(int enabled)
+{
+ return;
+}
+
+static struct cpsw_slave_data cpsw_slaves[] = {
+ {
+ .slave_reg_ofs = 0x208,
+ .sliver_reg_ofs = 0xd80,
+ .phy_addr = 0,
+ .phy_if = PHY_INTERFACE_MODE_RGMII,
+ },
+ {
+ .slave_reg_ofs = 0x308,
+ .sliver_reg_ofs = 0xdc0,
+ .phy_addr = 1,
+ .phy_if = PHY_INTERFACE_MODE_RGMII,
+ },
+};
+
+static struct cpsw_platform_data cpsw_data = {
+ .mdio_base = CPSW_MDIO_BASE,
+ .cpsw_base = CPSW_BASE,
+ .mdio_div = 0xff,
+ .channels = 8,
+ .cpdma_reg_ofs = 0x800,
+ .slaves = 2,
+ .slave_data = cpsw_slaves,
+ .ale_reg_ofs = 0xd00,
+ .ale_entries = 1024,
+ .host_port_reg_ofs = 0x108,
+ .hw_stats_reg_ofs = 0x900,
+ .bd_ram_ofs = 0x2000,
+ .mac_control = (1 << 5),
+ .control = cpsw_control,
+ .host_port_num = 0,
+ .version = CPSW_CTRL_VERSION_2,
+};
+
+#define GPIO_PHY1_RST 170
+#define GPIO_PHY2_RST 168
+
+int board_phy_config(struct phy_device *phydev)
+{
+ unsigned short val;
+
+ /* introduce tx clock delay */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
+ val |= 0x0100;
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
+
+ if (phydev->drv->config)
+ return phydev->drv->config(phydev);
+
+ return 0;
+}
+
+static void board_phy_init(void)
+{
+ set_mdio_pin_mux();
+ writel(0x40003, 0x44e10a74); /* Mux pin as clkout2 */
+ writel(0x10006, 0x44df4108); /* Select EXTDEV as clock source */
+ writel(0x4, 0x44df2e60); /* Set EXTDEV as MNbypass */
+
+ /* For revision A */
+ writel(0x2000009, 0x44df2e6c);
+ writel(0x38a, 0x44df2e70);
+
+ mdelay(10);
+
+ gpio_request(GPIO_PHY1_RST, "phy1_rst");
+ gpio_request(GPIO_PHY2_RST, "phy2_rst");
+ gpio_direction_output(GPIO_PHY1_RST, 0);
+ gpio_direction_output(GPIO_PHY2_RST, 0);
+ mdelay(2);
+
+ gpio_set_value(GPIO_PHY1_RST, 1);
+ gpio_set_value(GPIO_PHY2_RST, 1);
+ mdelay(2);
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int rv;
+
+ set_rgmii_pin_mux();
+ writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel);
+ board_phy_init();
+
+ rv = cpsw_register(&cpsw_data);
+ if (rv < 0)
+ printf("Error %d registering CPSW switch\n", rv);
+
+ return rv;
+}
+#endif
diff --git a/board/compulab/cm_t43/board.c b/board/compulab/cm_t43/spl.c
index 4272c45feb..b7d118eb9c 100644
--- a/board/compulab/cm_t43/board.c
+++ b/board/compulab/cm_t43/spl.c
@@ -1,31 +1,21 @@
/*
- * Copyright (C) 2015 Compulab, Ltd.
+ * Copyright (C) 2016 Compulab, Ltd.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <i2c.h>
-#include <miiphy.h>
-#include <cpsw.h>
#include <spl.h>
+#include <i2c.h>
#include <asm/arch/clock.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mux.h>
#include <asm/arch/ddr_defs.h>
-#include <asm/errno.h>
#include <asm/gpio.h>
-#include <asm/emif.h>
#include <power/pmic.h>
#include <power/tps65218.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
-static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-
const struct dpll_params dpll_mpu = { 800, 24, 1, -1, -1, -1, -1 };
const struct dpll_params dpll_core = { 1000, 24, -1, -1, 10, 8, 4 };
const struct dpll_params dpll_per = { 960, 24, 5, -1, -1, -1, -1 };
@@ -114,22 +104,21 @@ const struct dpll_params *get_dpll_per_params(void)
return &dpll_per;
}
-static void enable_vtt_regulator(void)
+void scale_vcores(void)
{
- u32 temp;
+ set_i2c_pin_mux();
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
+ if (i2c_probe(TPS65218_CHIP_PM))
+ return;
- writel(GPIO_CTRL_ENABLEMODULE, AM33XX_GPIO5_BASE + OMAP_GPIO_CTRL);
- writel(GPIO_SETDATAOUT(7), AM33XX_GPIO5_BASE + OMAP_GPIO_SETDATAOUT);
- temp = readl(AM33XX_GPIO5_BASE + OMAP_GPIO_OE);
- temp = temp & ~(GPIO_OE_ENABLE(7));
- writel(temp, AM33XX_GPIO5_BASE + OMAP_GPIO_OE);
+ tps65218_voltage_update(TPS65218_DCDC1, TPS65218_DCDC_VOLT_SEL_1100MV);
+ tps65218_voltage_update(TPS65218_DCDC2, TPS65218_DCDC_VOLT_SEL_1100MV);
}
void sdram_init(void)
{
unsigned long ram_size;
- enable_vtt_regulator();
config_ddr(0, &ioregs_ddr3, NULL, NULL, &ddr3_emif_regs, 0);
ram_size = get_ram_size((long int *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
if (ram_size == 0x80000000 ||
@@ -145,128 +134,4 @@ void sdram_init(void)
hang();
}
-#endif
-
-/* setup board specific PMIC */
-int power_init_board(void)
-{
- struct pmic *p;
-
- power_tps65218_init(I2C_PMIC);
- p = pmic_get("TPS65218_PMIC");
- if (p && !pmic_probe(p))
- puts("PMIC: TPS65218\n");
-
- return 0;
-}
-int board_init(void)
-{
- gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
- gpmc_init();
- set_i2c_pin_mux();
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
- i2c_probe(TPS65218_CHIP_PM);
-
- return 0;
-}
-
-#ifdef CONFIG_DRIVER_TI_CPSW
-
-static void cpsw_control(int enabled)
-{
- return;
-}
-
-static struct cpsw_slave_data cpsw_slaves[] = {
- {
- .slave_reg_ofs = 0x208,
- .sliver_reg_ofs = 0xd80,
- .phy_addr = 0,
- .phy_if = PHY_INTERFACE_MODE_RGMII,
- },
- {
- .slave_reg_ofs = 0x308,
- .sliver_reg_ofs = 0xdc0,
- .phy_addr = 1,
- .phy_if = PHY_INTERFACE_MODE_RGMII,
- },
-};
-
-static struct cpsw_platform_data cpsw_data = {
- .mdio_base = CPSW_MDIO_BASE,
- .cpsw_base = CPSW_BASE,
- .mdio_div = 0xff,
- .channels = 8,
- .cpdma_reg_ofs = 0x800,
- .slaves = 2,
- .slave_data = cpsw_slaves,
- .ale_reg_ofs = 0xd00,
- .ale_entries = 1024,
- .host_port_reg_ofs = 0x108,
- .hw_stats_reg_ofs = 0x900,
- .bd_ram_ofs = 0x2000,
- .mac_control = (1 << 5),
- .control = cpsw_control,
- .host_port_num = 0,
- .version = CPSW_CTRL_VERSION_2,
-};
-
-#define GPIO_PHY1_RST 170
-#define GPIO_PHY2_RST 168
-
-int board_phy_config(struct phy_device *phydev)
-{
- unsigned short val;
-
- /* introduce tx clock delay */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
- val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
- val |= 0x0100;
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
- if (phydev->drv->config)
- return phydev->drv->config(phydev);
-
- return 0;
-}
-
-static void board_phy_init(void)
-{
- set_mdio_pin_mux();
- writel(0x40003, 0x44e10a74); /* Mux pin as clkout2 */
- writel(0x10006, 0x44df4108); /* Select EXTDEV as clock source */
- writel(0x4, 0x44df2e60); /* Set EXTDEV as MNbypass */
-
- /* For revision A */
- writel(0x2000009, 0x44df2e6c);
- writel(0x38a, 0x44df2e70);
-
- mdelay(10);
-
- gpio_request(GPIO_PHY1_RST, "phy1_rst");
- gpio_request(GPIO_PHY2_RST, "phy2_rst");
- gpio_direction_output(GPIO_PHY1_RST, 0);
- gpio_direction_output(GPIO_PHY2_RST, 0);
- mdelay(2);
-
- gpio_set_value(GPIO_PHY1_RST, 1);
- gpio_set_value(GPIO_PHY2_RST, 1);
- mdelay(2);
-}
-
-int board_eth_init(bd_t *bis)
-{
- int rv;
-
- set_rgmii_pin_mux();
- writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel);
- board_phy_init();
-
- rv = cpsw_register(&cpsw_data);
- if (rv < 0)
- printf("Error %d registering CPSW switch\n", rv);
-
- return rv;
-}
-#endif
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index b5c44f915b..668f68476e 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -228,6 +228,30 @@ int board_init(void)
return 0;
}
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+ switch (gd->bd->bi_arch_number) {
+ case MACH_TYPE_DM3730_TORPEDO:
+ setenv("fdtimage", "logicpd-torpedo-37xx-devkit.dtb");
+ break;
+ case MACH_TYPE_DM3730_SOM_LV:
+ setenv("fdtimage", "logicpd-som-lv-37xx-devkit.dtb");
+ break;
+ case MACH_TYPE_OMAP3_TORPEDO:
+ setenv("fdtimage", "logicpd-torpedo-35xx-devkit.dtb");
+ break;
+ case MACH_TYPE_OMAP3530_LV_SOM:
+ setenv("fdtimage", "logicpd-som-lv-35xx-devkit.dtb");
+ break;
+ default:
+ /* unknown machine type */
+ break;
+ }
+ return 0;
+}
+#endif
+
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 7f4fe64385..1d3a4e09cf 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <inttypes.h>
#include <config.h>
#include <dm.h>
#include <fdt_support.h>
@@ -56,6 +57,12 @@ struct msg_get_board_rev {
u32 end_tag;
};
+struct msg_get_board_serial {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_get_board_serial get_board_serial;
+ u32 end_tag;
+};
+
struct msg_get_mac_address {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_mac_address get_mac_address;
@@ -281,6 +288,30 @@ static void set_board_info(void)
}
#endif /* CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG */
+static void set_serial_number(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_board_serial, msg, 1);
+ int ret;
+ char serial_string[17] = { 0 };
+
+ if (getenv("serial#"))
+ return;
+
+ BCM2835_MBOX_INIT_HDR(msg);
+ BCM2835_MBOX_INIT_TAG_NO_REQ(&msg->get_board_serial, GET_BOARD_SERIAL);
+
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
+ if (ret) {
+ printf("bcm2835: Could not query board serial\n");
+ /* Ignore error; not critical */
+ return;
+ }
+
+ snprintf(serial_string, sizeof(serial_string), "%016" PRIx64,
+ msg->get_board_serial.body.resp.serial);
+ setenv("serial#", serial_string);
+}
+
int misc_init_r(void)
{
set_fdtfile();
@@ -288,6 +319,8 @@ int misc_init_r(void)
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
set_board_info();
#endif
+ set_serial_number();
+
return 0;
}
diff --git a/board/samsung/origen/tools/mkorigenspl.c b/board/samsung/origen/tools/mkorigenspl.c
index 8b0c3ac4bd..7b5d93b9ef 100644
--- a/board/samsung/origen/tools/mkorigenspl.c
+++ b/board/samsung/origen/tools/mkorigenspl.c
@@ -83,8 +83,8 @@ int main(int argc, char **argv)
for (i = 0; i < IMG_SIZE - SPL_HEADER_SIZE; i++)
checksum += buffer[i+16];
- *(ulong *)buffer ^= 0x1f;
- *(ulong *)(buffer+4) ^= checksum;
+ *(unsigned long *)buffer ^= 0x1f;
+ *(unsigned long *)(buffer+4) ^= checksum;
for (i = 1; i < SPL_HEADER_SIZE; i++)
buffer[i] ^= buffer[i-1];
diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c
index fb8475f65f..d16d73fc97 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -50,6 +50,7 @@ int uart_setup_gpio(void)
int i;
int rv = 0;
+ clock_setup(GPIO_A_CLOCK_CFG);
for (i = 0; i < ARRAY_SIZE(usart_gpio); i++) {
rv = stm32_gpio_config(&usart_gpio[i], &gpio_ctl_usart);
if (rv)
@@ -115,6 +116,13 @@ static int fmc_setup_gpio(void)
int rv = 0;
int i;
+ clock_setup(GPIO_B_CLOCK_CFG);
+ clock_setup(GPIO_C_CLOCK_CFG);
+ clock_setup(GPIO_D_CLOCK_CFG);
+ clock_setup(GPIO_E_CLOCK_CFG);
+ clock_setup(GPIO_F_CLOCK_CFG);
+ clock_setup(GPIO_G_CLOCK_CFG);
+
for (i = 0; i < ARRAY_SIZE(ext_ram_fmc_gpio); i++) {
rv = stm32_gpio_config(&ext_ram_fmc_gpio[i],
&gpio_ctl_fmc);
diff --git a/board/st/stm32f746-disco/Kconfig b/board/st/stm32f746-disco/Kconfig
new file mode 100644
index 0000000000..09289d2323
--- /dev/null
+++ b/board/st/stm32f746-disco/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STM32F746_DISCO
+
+config SYS_BOARD
+ string
+ default "stm32f746-disco"
+
+config SYS_VENDOR
+ string
+ default "st"
+
+config SYS_SOC
+ string
+ default "stm32f7"
+
+config SYS_CONFIG_NAME
+ string
+ default "stm32f746-disco"
+
+endif
diff --git a/board/st/stm32f746-disco/MAINTAINERS b/board/st/stm32f746-disco/MAINTAINERS
new file mode 100644
index 0000000000..2df0a65ac2
--- /dev/null
+++ b/board/st/stm32f746-disco/MAINTAINERS
@@ -0,0 +1,6 @@
+STM32F746 DISCOVERY BOARD
+M: Vikas Manocha <vikas.manocha@st.com>
+S: Maintained
+F: board/st/stm32f746-disco
+F: include/configs/stm32f746-disco.h
+F: configs/stm32f746-disco_defconfig
diff --git a/board/st/stm32f746-disco/Makefile b/board/st/stm32f746-disco/Makefile
new file mode 100644
index 0000000000..db8a0a4dcf
--- /dev/null
+++ b/board/st/stm32f746-disco/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2016
+# Vikas Manocha <vikas.manocha@st.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := stm32f746-disco.o
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
new file mode 100644
index 0000000000..0e04d14148
--- /dev/null
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -0,0 +1,99 @@
+/*
+ * (C) Copyright 2016
+ * Vikas Manocha, <vikas.manocha@st.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/armv7m.h>
+#include <asm/arch/stm32.h>
+#include <asm/arch/gpio.h>
+#include <dm/platdata.h>
+#include <dm/platform_data/serial_stm32x7.h>
+#include <asm/arch/stm32_periph.h>
+#include <asm/arch/stm32_defs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const struct stm32_gpio_ctl gpio_ctl_gpout = {
+ .mode = STM32_GPIO_MODE_OUT,
+ .otype = STM32_GPIO_OTYPE_PP,
+ .speed = STM32_GPIO_SPEED_50M,
+ .pupd = STM32_GPIO_PUPD_NO,
+ .af = STM32_GPIO_AF0
+};
+
+const struct stm32_gpio_ctl gpio_ctl_usart = {
+ .mode = STM32_GPIO_MODE_AF,
+ .otype = STM32_GPIO_OTYPE_PP,
+ .speed = STM32_GPIO_SPEED_50M,
+ .pupd = STM32_GPIO_PUPD_UP,
+ .af = STM32_GPIO_AF7
+};
+
+static const struct stm32_gpio_dsc usart_gpio[] = {
+ {STM32_GPIO_PORT_A, STM32_GPIO_PIN_9}, /* TX */
+ {STM32_GPIO_PORT_B, STM32_GPIO_PIN_7}, /* RX */
+};
+
+int uart_setup_gpio(void)
+{
+ int i;
+ int rv = 0;
+
+ clock_setup(GPIO_A_CLOCK_CFG);
+ clock_setup(GPIO_B_CLOCK_CFG);
+ for (i = 0; i < ARRAY_SIZE(usart_gpio); i++) {
+ rv = stm32_gpio_config(&usart_gpio[i], &gpio_ctl_usart);
+ if (rv)
+ goto out;
+ }
+
+out:
+ return rv;
+}
+
+static const struct stm32x7_serial_platdata serial_platdata = {
+ .base = (struct stm32_usart *)USART1_BASE,
+ .clock = CONFIG_SYS_CLK_FREQ,
+};
+
+U_BOOT_DEVICE(stm32x7_serials) = {
+ .name = "serial_stm32x7",
+ .platdata = &serial_platdata,
+};
+
+u32 get_board_rev(void)
+{
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ int res;
+
+ res = uart_setup_gpio();
+ clock_setup(USART1_CLOCK_CFG);
+ if (res)
+ return res;
+
+ return 0;
+}
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE;
+ gd->bd->bi_dram[0].size = CONFIG_SYS_RAM_SIZE;
+
+ gd->ram_size = CONFIG_SYS_RAM_SIZE;
+ return 0;
+}
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index a334aa336d..5e9d3af336 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -372,11 +372,14 @@ config I2C3_ENABLE
See I2C0_ENABLE help text.
endif
+if SUNXI_GEN_SUN6I
config R_I2C_ENABLE
bool "Enable the PRCM I2C/TWI controller"
- default n
+ # This is used for the pmic on H3
+ default y if SY8106A_POWER
---help---
Set this to y to enable the I2C controller which is part of the PRCM.
+endif
if MACH_SUN7I
config I2C4_ENABLE
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 420481a9fb..15b7af634c 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -25,6 +25,7 @@
#include <asm/io.h>
#include <nand.h>
#include <net.h>
+#include <sy8106a.h>
#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
/* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */
@@ -436,6 +437,10 @@ void sunxi_board_init(void)
int power_failed = 0;
unsigned long ramsize;
+#ifdef CONFIG_SY8106A_POWER
+ power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT);
+#endif
+
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER
power_failed = axp_init();
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 01bae5d67e..2f17e977a4 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -100,7 +100,6 @@ int checkboard(void)
int dram_init(void)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL)
int node;
fdt_addr_t addr;
fdt_size_t size;
@@ -118,9 +117,6 @@ int dram_init(void)
return -1;
}
gd->ram_size = size;
-#else
- gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
-#endif
zynq_ddrc_init();
return 0;
generated by cgit (git 2.34.1) at 2025-01-09 23:51:08 +0000