diff options
Diffstat (limited to 'board')
| -rw-r--r-- | board/CZ.NIC/turris_omnia/turris_omnia.c | 4 | ||||
| -rw-r--r-- | board/Marvell/db-88f6820-amc/db-88f6820-amc.c | 2 | ||||
| -rw-r--r-- | board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 2 | ||||
| -rw-r--r-- | board/gdsys/a38x/controlcenterdc.c | 2 | ||||
| -rw-r--r-- | board/kobol/helios4/helios4.c | 2 | ||||
| -rw-r--r-- | board/solidrun/clearfog/clearfog.c | 2 |
6 files changed, 7 insertions, 7 deletions
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 160d30cd79..1f7650cb36 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -212,7 +212,7 @@ static struct mv_ddr_topology_map board_topology_map_1g = { SPEED_BIN_DDR_1600K, /* speed_bin */ MV_DDR_DEV_WIDTH_16BIT, /* memory_width */ MV_DDR_DIE_CAP_4GBIT, /* mem_size */ - DDR_FREQ_800, /* frequency */ + MV_DDR_FREQ_800, /* frequency */ 0, 0, /* cas_wl cas_l */ MV_DDR_TEMP_NORMAL, /* temperature */ MV_DDR_TIM_2T} }, /* timing */ @@ -234,7 +234,7 @@ static struct mv_ddr_topology_map board_topology_map_2g = { SPEED_BIN_DDR_1600K, /* speed_bin */ MV_DDR_DEV_WIDTH_16BIT, /* memory_width */ MV_DDR_DIE_CAP_8GBIT, /* mem_size */ - DDR_FREQ_800, /* frequency */ + MV_DDR_FREQ_800, /* frequency */ 0, 0, /* cas_wl cas_l */ MV_DDR_TEMP_NORMAL, /* temperature */ MV_DDR_TIM_2T} }, /* timing */ diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c index 92d7ae77f0..bc18fe6ddf 100644 --- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c +++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c @@ -67,7 +67,7 @@ static struct mv_ddr_topology_map board_topology_map = { SPEED_BIN_DDR_1866L, /* speed_bin */ MV_DDR_DEV_WIDTH_8BIT, /* memory_width */ MV_DDR_DIE_CAP_2GBIT, /* mem_size */ - DDR_FREQ_800, /* frequency */ + MV_DDR_FREQ_800, /* frequency */ 0, 0, /* cas_wl cas_l */ MV_DDR_TEMP_LOW, /* temperature */ MV_DDR_TIM_DEFAULT} }, /* timing */ diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c index a8cfe8af0a..9368bce26c 100644 --- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c +++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c @@ -88,7 +88,7 @@ static struct mv_ddr_topology_map board_topology_map = { SPEED_BIN_DDR_1866L, /* speed_bin */ MV_DDR_DEV_WIDTH_8BIT, /* memory_width */ MV_DDR_DIE_CAP_4GBIT, /* mem_size */ - DDR_FREQ_800, /* frequency */ + MV_DDR_FREQ_800, /* frequency */ 0, 0, /* cas_wl cas_l */ MV_DDR_TEMP_LOW, /* temperature */ MV_DDR_TIM_DEFAULT} }, /* timing */ diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c index dd4c083fbd..86051aedf8 100644 --- a/board/gdsys/a38x/controlcenterdc.c +++ b/board/gdsys/a38x/controlcenterdc.c @@ -64,7 +64,7 @@ static struct mv_ddr_topology_map ddr_topology_map = { SPEED_BIN_DDR_1600K, /* speed_bin */ MV_DDR_DEV_WIDTH_16BIT, /* memory_width */ MV_DDR_DIE_CAP_4GBIT, /* mem_size */ - DDR_FREQ_533, /* frequency */ + MV_DDR_FREQ_533, /* frequency */ 0, 0, /* cas_wl cas_l */ MV_DDR_TEMP_LOW, /* temperature */ MV_DDR_TIM_DEFAULT} }, /* timing */ diff --git a/board/kobol/helios4/helios4.c b/board/kobol/helios4/helios4.c index 341678319a..15e78dee94 100644 --- a/board/kobol/helios4/helios4.c +++ b/board/kobol/helios4/helios4.c @@ -78,7 +78,7 @@ static struct mv_ddr_topology_map board_topology_map = { SPEED_BIN_DDR_1600K, /* speed_bin */ MV_DDR_DEV_WIDTH_16BIT, /* memory_width */ MV_DDR_DIE_CAP_8GBIT, /* mem_size */ - DDR_FREQ_800, /* frequency */ + MV_DDR_FREQ_800, /* frequency */ 0, 0, /* cas_wl cas_l */ MV_DDR_TEMP_LOW, /* temperature */ MV_DDR_TIM_DEFAULT} }, /* timing */ diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 4e1386c8a2..1742aa8921 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -65,7 +65,7 @@ static struct mv_ddr_topology_map board_topology_map = { SPEED_BIN_DDR_1600K, /* speed_bin */ MV_DDR_DEV_WIDTH_16BIT, /* memory_width */ MV_DDR_DIE_CAP_4GBIT, /* mem_size */ - DDR_FREQ_800, /* frequency */ + MV_DDR_FREQ_800, /* frequency */ 0, 0, /* cas_wl cas_l */ MV_DDR_TEMP_LOW, /* temperature */ MV_DDR_TIM_DEFAULT} }, /* timing */ |