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-rw-r--r--board/ti/am335x/board.c74
-rw-r--r--board/ti/am43xx/board.c21
2 files changed, 52 insertions, 43 deletions
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 45c96cecaa..3e81521399 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -256,24 +256,62 @@ int spl_start_uboot(void)
}
#endif
-#define OSC (V_OSCK/1000000)
-const struct dpll_params dpll_ddr = {
- 266, OSC-1, 1, -1, -1, -1, -1};
-const struct dpll_params dpll_ddr_evm_sk = {
- 303, OSC-1, 1, -1, -1, -1, -1};
-const struct dpll_params dpll_ddr_bone_black = {
- 400, OSC-1, 1, -1, -1, -1, -1};
-
const struct dpll_params *get_dpll_ddr_params(void)
{
+ int ind = get_sys_clk_index();
+
if (board_is_evm_sk())
- return &dpll_ddr_evm_sk;
+ return &dpll_ddr3_303MHz[ind];
else if (board_is_bone_lt() || board_is_icev2())
- return &dpll_ddr_bone_black;
+ return &dpll_ddr3_400MHz[ind];
else if (board_is_evm_15_or_later())
- return &dpll_ddr_evm_sk;
+ return &dpll_ddr3_303MHz[ind];
else
- return &dpll_ddr;
+ return &dpll_ddr2_266MHz[ind];
+}
+
+static u8 bone_not_connected_to_ac_power(void)
+{
+ if (board_is_bone()) {
+ uchar pmic_status_reg;
+ if (tps65217_reg_read(TPS65217_STATUS,
+ &pmic_status_reg))
+ return 1;
+ if (!(pmic_status_reg & TPS65217_PWR_SRC_AC_BITMASK)) {
+ puts("No AC power, switching to default OPP\n");
+ return 1;
+ }
+ }
+ return 0;
+}
+
+const struct dpll_params *get_dpll_mpu_params(void)
+{
+ int ind = get_sys_clk_index();
+ int freq = am335x_get_efuse_mpu_max_freq(cdev);
+
+ if (bone_not_connected_to_ac_power())
+ freq = MPUPLL_M_600;
+
+ if (board_is_bone_lt())
+ freq = MPUPLL_M_1000;
+
+ switch (freq) {
+ case MPUPLL_M_1000:
+ return &dpll_mpu_opp[ind][5];
+ case MPUPLL_M_800:
+ return &dpll_mpu_opp[ind][4];
+ case MPUPLL_M_720:
+ return &dpll_mpu_opp[ind][3];
+ case MPUPLL_M_600:
+ return &dpll_mpu_opp[ind][2];
+ case MPUPLL_M_500:
+ return &dpll_mpu_opp100;
+ case MPUPLL_M_300:
+ return &dpll_mpu_opp[ind][0];
+ }
+
+ return &dpll_mpu_opp[ind][0];
}
static void scale_vcores_bone(int freq)
@@ -294,16 +332,8 @@ static void scale_vcores_bone(int freq)
* On Beaglebone White we need to ensure we have AC power
* before increasing the frequency.
*/
- if (board_is_bone()) {
- uchar pmic_status_reg;
- if (tps65217_reg_read(TPS65217_STATUS,
- &pmic_status_reg))
- return;
- if (!(pmic_status_reg & TPS65217_PWR_SRC_AC_BITMASK)) {
- puts("No AC power, switching to default OPP\n");
- freq = MPUPLL_M_600;
- }
- }
+ if (bone_not_connected_to_ac_power())
+ freq = MPUPLL_M_600;
/*
* Override what we have detected since we know if we have
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 2572029a25..f633e2f85d 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -49,8 +49,6 @@ void do_board_detect(void)
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-#define NUM_OPPS 6
-
const struct dpll_params dpll_mpu[NUM_CRYSTAL_FREQ][NUM_OPPS] = {
{ /* 19.2 MHz */
{125, 3, 2, -1, -1, -1, -1}, /* OPP 50 */
@@ -317,25 +315,6 @@ void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size)
return;
}
-/*
- * get_sys_clk_index : returns the index of the sys_clk read from
- * ctrl status register. This value is either
- * read from efuse or sysboot pins.
- */
-static u32 get_sys_clk_index(void)
-{
- struct ctrl_stat *ctrl = (struct ctrl_stat *)CTRL_BASE;
- u32 ind = readl(&ctrl->statusreg), src;
-
- src = (ind & CTRL_CRYSTAL_FREQ_SRC_MASK) >> CTRL_CRYSTAL_FREQ_SRC_SHIFT;
- if (src == CTRL_CRYSTAL_FREQ_SRC_EFUSE) /* Value read from EFUSE */
- return ((ind & CTRL_CRYSTAL_FREQ_SELECTION_MASK) >>
- CTRL_CRYSTAL_FREQ_SELECTION_SHIFT);
- else /* Value read from SYS BOOT pins */
- return ((ind & CTRL_SYSBOOT_15_14_MASK) >>
- CTRL_SYSBOOT_15_14_SHIFT);
-}
-
const struct dpll_params *get_dpll_ddr_params(void)
{
int ind = get_sys_clk_index();