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-rw-r--r--board/Marvell/dkb/Kconfig15
-rw-r--r--board/Marvell/dkb/MAINTAINERS6
-rw-r--r--board/Marvell/dkb/Makefile9
-rw-r--r--board/Marvell/dkb/dkb.c85
-rw-r--r--board/cm4008/Kconfig12
-rw-r--r--board/cm4008/MAINTAINERS6
-rw-r--r--board/cm4008/Makefile8
-rw-r--r--board/cm4008/cm4008.c88
-rw-r--r--board/cm4008/config.mk1
-rw-r--r--board/cm4008/flash.c395
-rw-r--r--board/cm41xx/Kconfig12
-rw-r--r--board/cm41xx/MAINTAINERS6
-rw-r--r--board/cm41xx/Makefile8
-rw-r--r--board/cm41xx/cm41xx.c88
-rw-r--r--board/cm41xx/config.mk1
-rw-r--r--board/cm41xx/flash.c395
-rw-r--r--board/compulab/cm_t335/Kconfig6
-rw-r--r--board/davinci/da8xxevm/Kconfig13
-rw-r--r--board/davinci/da8xxevm/MAINTAINERS8
-rw-r--r--board/davinci/da8xxevm/Makefile1
-rw-r--r--board/davinci/da8xxevm/README.hawkboard92
-rw-r--r--board/davinci/da8xxevm/hawkboard-ais-nand.cfg4
-rw-r--r--board/davinci/da8xxevm/hawkboard.c120
-rw-r--r--board/davinci/da8xxevm/u-boot-spl-hawk.lds69
-rw-r--r--board/faraday/a320evb/Kconfig15
-rw-r--r--board/faraday/a320evb/MAINTAINERS6
-rw-r--r--board/faraday/a320evb/Makefile9
-rw-r--r--board/faraday/a320evb/a320evb.c59
-rw-r--r--board/faraday/a320evb/lowlevel_init.S106
-rw-r--r--board/freescale/common/ls102xa_stream_id.c15
-rw-r--r--board/freescale/ls1021aqds/ls1021aqds.c21
-rw-r--r--board/freescale/ls1021atwr/ls1021atwr.c21
-rw-r--r--board/freescale/ls2085a/ddr.c1
-rw-r--r--board/freescale/ls2085a/ls2085a.c29
-rw-r--r--board/gumstix/pepper/Kconfig6
-rw-r--r--board/isee/igep0033/Kconfig6
-rw-r--r--board/phytec/pcm051/Kconfig6
-rw-r--r--board/samsung/goni/Kconfig6
-rw-r--r--board/samsung/smdkc100/Kconfig6
-rw-r--r--board/silica/pengwyn/Kconfig6
-rw-r--r--board/syteco/jadecpu/Kconfig15
-rw-r--r--board/syteco/jadecpu/MAINTAINERS6
-rw-r--r--board/syteco/jadecpu/Makefile13
-rw-r--r--board/syteco/jadecpu/jadecpu.c160
-rw-r--r--board/syteco/jadecpu/lowlevel_init.S249
-rw-r--r--board/ti/am335x/Kconfig10
-rw-r--r--board/ti/tnetv107xevm/Kconfig15
-rw-r--r--board/ti/tnetv107xevm/MAINTAINERS6
-rw-r--r--board/ti/tnetv107xevm/Makefile5
-rw-r--r--board/ti/tnetv107xevm/config.mk5
-rw-r--r--board/ti/tnetv107xevm/sdb_board.c134
51 files changed, 109 insertions, 2275 deletions
diff --git a/board/Marvell/dkb/Kconfig b/board/Marvell/dkb/Kconfig
deleted file mode 100644
index f6748941c6..0000000000
--- a/board/Marvell/dkb/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_DKB
-
-config SYS_BOARD
- default "dkb"
-
-config SYS_VENDOR
- default "Marvell"
-
-config SYS_SOC
- default "pantheon"
-
-config SYS_CONFIG_NAME
- default "dkb"
-
-endif
diff --git a/board/Marvell/dkb/MAINTAINERS b/board/Marvell/dkb/MAINTAINERS
deleted file mode 100644
index c272b7ae74..0000000000
--- a/board/Marvell/dkb/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-DKB BOARD
-M: Lei Wen <leiwen@marvell.com>
-S: Maintained
-F: board/Marvell/dkb/
-F: include/configs/dkb.h
-F: configs/dkb_defconfig
diff --git a/board/Marvell/dkb/Makefile b/board/Marvell/dkb/Makefile
deleted file mode 100644
index 9d88579120..0000000000
--- a/board/Marvell/dkb/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2011
-# Marvell Semiconductor <www.marvell.com>
-# Written-by: Lei Wen <leiwen@marvell.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := dkb.o
diff --git a/board/Marvell/dkb/dkb.c b/board/Marvell/dkb/dkb.c
deleted file mode 100644
index c0c31259a3..0000000000
--- a/board/Marvell/dkb/dkb.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2011
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Lei Wen <leiwen@marvell.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mvmfp.h>
-#include <i2c.h>
-#include <asm/arch/mfp.h>
-#include <asm/arch/cpu.h>
-#ifdef CONFIG_GENERIC_MMC
-#include <sdhci.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- u32 mfp_cfg[] = {
- /* Enable Console on UART2 */
- MFP47_UART2_RXD,
- MFP48_UART2_TXD,
-
- /* I2C */
- MFP53_CI2C_SCL,
- MFP54_CI2C_SDA,
-
- /* MMC1 */
- MFP_MMC1_DAT7,
- MFP_MMC1_DAT6,
- MFP_MMC1_DAT5,
- MFP_MMC1_DAT4,
- MFP_MMC1_DAT3,
- MFP_MMC1_DAT2,
- MFP_MMC1_DAT1,
- MFP_MMC1_DAT0,
- MFP_MMC1_CMD,
- MFP_MMC1_CLK,
- MFP_MMC1_CD,
- MFP_MMC1_WP,
-
- MFP_EOC /*End of configureation*/
- };
- /* configure MFP's */
- mfp_config(mfp_cfg);
-
- return 0;
-}
-
-int board_init(void)
-{
- /* arch number of Board */
- gd->bd->bi_arch_number = MACH_TYPE_TTC_DKB;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = panth_sdram_base(0) + 0x100;
- return 0;
-}
-
-#ifdef CONFIG_GENERIC_MMC
-#define I2C_SLAVE_ADDR 0x34
-#define LDO13_REG 0x28
-#define LDO_V30 0x6
-#define LDO_VOLTAGE(x) ((x & 0x7) << 1)
-#define LDO_EN 0x1
-int board_mmc_init(bd_t *bd)
-{
- ulong mmc_base_address[CONFIG_SYS_MMC_NUM] = CONFIG_SYS_MMC_BASE;
- u8 i, data;
-
- /* set LDO 13 to 3.0v */
- data = LDO_VOLTAGE(LDO_V30) | LDO_EN;
- i2c_write(I2C_SLAVE_ADDR, LDO13_REG, 1, &data, 1);
-
- for (i = 0; i < CONFIG_SYS_MMC_NUM; i++) {
- if (mv_sdh_init(mmc_base_address[i], 0, 0,
- SDHCI_QUIRK_32BIT_DMA_ADDR))
- return 1;
- }
-
- return 0;
-}
-#endif
diff --git a/board/cm4008/Kconfig b/board/cm4008/Kconfig
deleted file mode 100644
index de87d5bc12..0000000000
--- a/board/cm4008/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_CM4008
-
-config SYS_BOARD
- default "cm4008"
-
-config SYS_SOC
- default "ks8695"
-
-config SYS_CONFIG_NAME
- default "cm4008"
-
-endif
diff --git a/board/cm4008/MAINTAINERS b/board/cm4008/MAINTAINERS
deleted file mode 100644
index 5f08bc3b5c..0000000000
--- a/board/cm4008/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CM4008 BOARD
-M: Greg Ungerer <greg.ungerer@opengear.com>
-S: Maintained
-F: board/cm4008/
-F: include/configs/cm4008.h
-F: configs/cm4008_defconfig
diff --git a/board/cm4008/Makefile b/board/cm4008/Makefile
deleted file mode 100644
index 04b152917b..0000000000
--- a/board/cm4008/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := cm4008.o flash.o
diff --git a/board/cm4008/cm4008.c b/board/cm4008/cm4008.c
deleted file mode 100644
index 740e16443e..0000000000
--- a/board/cm4008/cm4008.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer, OpenGear Inc, <greg.ungerer@opengear.com>
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/platform.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-
-#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
-#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b)
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-int env_flash_cmdline (void)
-{
- char *sp = (char *) 0x0201c020;
- char *ep;
- int len;
-
- /* Check if "erase" push button is depressed */
- if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) {
- printf("### Entering network recovery mode...\n");
- setenv("bootargs", "console=ttyAM0,115200 mem=16M initrd=0x400000,6M root=/dev/ram0");
- setenv("bootcmd", "bootp 0x400000; gofsk 0x400000");
- setenv("bootdelay", "2");
- return 0;
- }
-
- /* Check for flash based kernel boot args to use as default */
- for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++)
- ;
-
- if ((len > 0) && (len <1024))
- setenv("bootargs", sp);
-
- return 0;
-}
-
-int board_late_init (void)
-{
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- return ks8695_eth_initialize();
-}
-
-int board_init (void)
-{
- /* arch number of CM4008 */
- gd->bd->bi_arch_number = 624;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- /* power down all but port 0 on the switch */
- ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005);
- ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005);
-
- return 0;
-}
-
-int dram_init (void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/cm4008/config.mk b/board/cm4008/config.mk
deleted file mode 100644
index 0d5923b941..0000000000
--- a/board/cm4008/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00f00000
diff --git a/board/cm4008/flash.c b/board/cm4008/flash.c
deleted file mode 100644
index 8315a57ed9..0000000000
--- a/board/cm4008/flash.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer, OpenGear Inc, greg.ungerer@opengear.com
- *
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-#include <asm/sections.h>
-
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (unsigned char * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, unsigned char data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((unsigned char *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- /* ignore for now */
- flash_info[i].flash_id = FLASH_UNKNOWN;
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + (__bss_end - __bss_start),
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return;
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (unsigned char * addr, flash_info_t * info)
-{
- volatile unsigned char value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = 0xAA;
- addr[0x2AAA] = 0x55;
- addr[0x5555] = 0x90;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (unsigned char)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = 0xFF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[2]; /* device ID */
-
- switch (value) {
-
- case (unsigned char)INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (unsigned char)INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
- info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- }
-
- addr[0] = 0xFF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int prot, sect;
- ulong type;
- int rcode = 0;
- ulong start;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- else
- printf ("\n");
-
- /* Disable interrupts which might cause a timeout here */
- disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- volatile unsigned char *addr;
- unsigned char status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- addr = (volatile unsigned char *) (info->start[sect]);
- *addr = 0x50; /* clear status register */
- *addr = 0x20; /* erase setup */
- *addr = 0xD0; /* erase confirm */
-
- while (((status = *addr) & 0x80) != 0x80) {
- if (get_timer(start) >
- CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0xB0; /* suspend erase */
- *addr = 0xFF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x50; /* clear status register cmd */
- *addr = 0xFF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- unsigned char data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return 4;
-
- wp = addr;
- port_width = 1;
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, unsigned char data)
-{
- volatile unsigned char *addr = (volatile unsigned char *) dest;
- ulong status;
- ulong start;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr,
- (ulong) * addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- disable_interrupts();
-
- *addr = 0x40; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait while polling the status register */
- while (((status = *addr) & 0x80) != 0x80) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- *addr = 0xFF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = 0xFF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/cm41xx/Kconfig b/board/cm41xx/Kconfig
deleted file mode 100644
index 99e675b12d..0000000000
--- a/board/cm41xx/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_CM41XX
-
-config SYS_BOARD
- default "cm41xx"
-
-config SYS_SOC
- default "ks8695"
-
-config SYS_CONFIG_NAME
- default "cm41xx"
-
-endif
diff --git a/board/cm41xx/MAINTAINERS b/board/cm41xx/MAINTAINERS
deleted file mode 100644
index f10eeb58f3..0000000000
--- a/board/cm41xx/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CM41XX BOARD
-#M: -
-S: Maintained
-F: board/cm41xx/
-F: include/configs/cm41xx.h
-F: configs/cm41xx_defconfig
diff --git a/board/cm41xx/Makefile b/board/cm41xx/Makefile
deleted file mode 100644
index b71ea05566..0000000000
--- a/board/cm41xx/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := cm41xx.o flash.o
diff --git a/board/cm41xx/cm41xx.c b/board/cm41xx/cm41xx.c
deleted file mode 100644
index eabad48a3c..0000000000
--- a/board/cm41xx/cm41xx.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer, OpenGear Inc, <greg.ungerer@opengear.com>
- *
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/platform.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-
-#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
-#define ks8695_write(a,b) *((volatile unsigned int *) (KS8695_IO_BASE+(a))) = (b)
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-int env_flash_cmdline (void)
-{
- char *sp = (char *) 0x0201c020;
- char *ep;
- int len;
-
- /* Check if "erase" push button is depressed */
- if ((ks8695_read(KS8695_GPIO_DATA) & 0x8) == 0) {
- printf("### Entering network recovery mode...\n");
- setenv("bootargs", "console=ttyAM0,115200 mem=32M initrd=0x400000,8M root=/dev/ram0");
- setenv("bootcmd", "bootp 0x400000; gofsk 0x400000");
- setenv("bootdelay", "2");
- return 0;
- }
-
- /* Check for flash based kernel boot args to use as default */
- for (ep = sp, len = 0; ((len < 1024) && (*ep != 0)); ep++, len++)
- ;
-
- if ((len > 0) && (len <1024))
- setenv("bootargs", sp);
-
- return 0;
-}
-
-int board_late_init (void)
-{
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- return ks8695_eth_initialize();
-}
-
-int board_init (void)
-{
- /* arch number of CM41xx */
- gd->bd->bi_arch_number = 672;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- /* power down all but port 0 on the switch */
- ks8695_write(KS8695_SWITCH_LPPM12, 0x00000005);
- ks8695_write(KS8695_SWITCH_LPPM34, 0x00050005);
-
- return 0;
-}
-
-int dram_init (void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return (0);
-}
diff --git a/board/cm41xx/config.mk b/board/cm41xx/config.mk
deleted file mode 100644
index 0d5923b941..0000000000
--- a/board/cm41xx/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00f00000
diff --git a/board/cm41xx/flash.c b/board/cm41xx/flash.c
deleted file mode 100644
index 8315a57ed9..0000000000
--- a/board/cm41xx/flash.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- * (C) Copyright 2005
- * Greg Ungerer, OpenGear Inc, greg.ungerer@opengear.com
- *
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-#include <asm/sections.h>
-
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (unsigned char * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, unsigned char data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((unsigned char *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- case 1:
- /* ignore for now */
- flash_info[i].flash_id = FLASH_UNKNOWN;
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + (__bss_end - __bss_start),
- &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return;
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F128J3A:
- printf ("28F128J3A\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (unsigned char * addr, flash_info_t * info)
-{
- volatile unsigned char value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = 0xAA;
- addr[0x2AAA] = 0x55;
- addr[0x5555] = 0x90;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (unsigned char)INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = 0xFF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[2]; /* device ID */
-
- switch (value) {
-
- case (unsigned char)INTEL_ID_28F640J3A:
- info->flash_id += FLASH_28F640J3A;
- info->sector_count = 64;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case (unsigned char)INTEL_ID_28F128J3A:
- info->flash_id += FLASH_28F128J3A;
- info->sector_count = 128;
- info->size = 0x01000000;
- break; /* => 16 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
- info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- }
-
- addr[0] = 0xFF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int prot, sect;
- ulong type;
- int rcode = 0;
- ulong start;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot)
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- else
- printf ("\n");
-
- /* Disable interrupts which might cause a timeout here */
- disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- volatile unsigned char *addr;
- unsigned char status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- addr = (volatile unsigned char *) (info->start[sect]);
- *addr = 0x50; /* clear status register */
- *addr = 0x20; /* erase setup */
- *addr = 0xD0; /* erase confirm */
-
- while (((status = *addr) & 0x80) != 0x80) {
- if (get_timer(start) >
- CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- *addr = 0xB0; /* suspend erase */
- *addr = 0xFF; /* reset to read mode */
- rcode = 1;
- break;
- }
- }
-
- *addr = 0x50; /* clear status register cmd */
- *addr = 0xFF; /* resest to read mode */
-
- printf (" done\n");
- }
- }
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- unsigned char data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return 4;
-
- wp = addr;
- port_width = 1;
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, data)) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, unsigned char data)
-{
- volatile unsigned char *addr = (volatile unsigned char *) dest;
- ulong status;
- ulong start;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%lx)\n", (ulong) addr,
- (ulong) * addr);
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- disable_interrupts();
-
- *addr = 0x40; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait while polling the status register */
- while (((status = *addr) & 0x80) != 0x80) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- *addr = 0xFF; /* restore read mode */
- return (1);
- }
- }
-
- *addr = 0xFF; /* restore read mode */
-
- return (0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/compulab/cm_t335/Kconfig b/board/compulab/cm_t335/Kconfig
index aadbfbc84d..3a8f304bd9 100644
--- a/board/compulab/cm_t335/Kconfig
+++ b/board/compulab/cm_t335/Kconfig
@@ -13,12 +13,12 @@ config SYS_CONFIG_NAME
default "cm_t335"
config DM
- default y if !SPL_BUILD
+ default y
config DM_GPIO
- default y if !SPL_BUILD
+ default y
config DM_SERIAL
- default y if !SPL_BUILD
+ default y
endif
diff --git a/board/davinci/da8xxevm/Kconfig b/board/davinci/da8xxevm/Kconfig
index 1a841ce6e0..1108e4b164 100644
--- a/board/davinci/da8xxevm/Kconfig
+++ b/board/davinci/da8xxevm/Kconfig
@@ -23,16 +23,3 @@ config SYS_CONFIG_NAME
default "da850evm"
endif
-
-if TARGET_HAWKBOARD
-
-config SYS_BOARD
- default "da8xxevm"
-
-config SYS_VENDOR
- default "davinci"
-
-config SYS_CONFIG_NAME
- default "hawkboard"
-
-endif
diff --git a/board/davinci/da8xxevm/MAINTAINERS b/board/davinci/da8xxevm/MAINTAINERS
index dd66f07e72..10c4e2ffc0 100644
--- a/board/davinci/da8xxevm/MAINTAINERS
+++ b/board/davinci/da8xxevm/MAINTAINERS
@@ -12,11 +12,3 @@ F: include/configs/da850evm.h
F: configs/da850_am18xxevm_defconfig
F: configs/da850evm_defconfig
F: configs/da850evm_direct_nor_defconfig
-
-HAWKBOARD BOARD
-M: Syed Mohammed Khasim <sm.khasim@gmail.com>
-M: Sughosh Ganu <urwithsughosh@gmail.com>
-S: Maintained
-F: include/configs/hawkboard.h
-F: configs/hawkboard_defconfig
-F: configs/hawkboard_uart_defconfig
diff --git a/board/davinci/da8xxevm/Makefile b/board/davinci/da8xxevm/Makefile
index d3acacc33d..4da509b5e1 100644
--- a/board/davinci/da8xxevm/Makefile
+++ b/board/davinci/da8xxevm/Makefile
@@ -9,4 +9,3 @@
obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o
obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o
-obj-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o
diff --git a/board/davinci/da8xxevm/README.hawkboard b/board/davinci/da8xxevm/README.hawkboard
deleted file mode 100644
index d6ae02ec02..0000000000
--- a/board/davinci/da8xxevm/README.hawkboard
+++ /dev/null
@@ -1,92 +0,0 @@
-Summary
-=======
-The README is for the boot procedure used for TI's OMAP-L138 based
-hawkboard. The hawkboard comes with a 128MiB Nand flash and a 128MiB
-DDR SDRAM along with a host of other controllers.
-
-The hawkboard is booted in three stages. The initial bootloader which
-executes upon reset is the Rom Boot Loader(RBL) which sits in the
-internal ROM of the omap. The RBL initialises the memory and the nand
-controller, and copies the image stored at a predefined location(block
-1) of the nand flash. The image loaded by the RBL to the memory is the
-AIS signed spl image. This, in turns copies the u-boot binary from the
-nand flash to the memory and jumps to the u-boot entry point.
-
-AIS is an image format defined by TI for the images that are to be
-loaded to memory by the RBL. The image is divided into a series of
-sections and the image's entry point is specified. Each section comes
-with meta data like the target address the section is to be copied to
-and the size of the section, which is used by the RBL to load the
-image. At the end of the image the RBL jumps to the image entry
-point.
-
-The secondary stage bootloader(spl) which is loaded by the RBL then
-loads the u-boot from a predefined location in the nand to the memory
-and jumps to the u-boot entry point.
-
-The reason a secondary stage bootloader is used is because the ECC
-layout expected by the RBL is not the same as that used by
-u-boot/linux. This also implies that for flashing the spl image,we
-need to use the u-boot which uses the ECC layout expected by the
-RBL[1]. Booting u-boot over UART(UART boot) is explained here[2].
-
-
-Compilation
-===========
-Three images might be needed
-
-* spl - This is the secondary bootloader which boots the u-boot
- binary.
-
-* u-boot binary - This is the image flashed to the nand and copied to
- the memory by the spl.
-
- Both the images get compiled with hawkboard_config, with the TOPDIR
- containing the u-boot images, and the spl image under the spl
- directory.
-
- The spl image needs to be processed with the AISGen tool for
- generating the AIS signed image to be flashed. Steps for generating
- the AIS image are explained here[3].
-
-* u-boot for uart boot - This is same as the u-boot binary generated
- above, with the sole difference of the CONFIG_SYS_TEXT_BASE being
- 0xc1080000, as expected by the RBL.
-
- hawkboard_uart_config
-
-
-Flashing the images to Nand
-===========================
-The spl AIS image needs to be flashed to the block 1 of the Nand
-flash, as that is the location the RBL expects the image[4]. For
-flashing the spl, boot over the u-boot specified in [1], and flash the
-image
-
-=> tftpboot 0xc0700000 <nand_spl_ais.bin>
-=> nand erase 0x20000 0x20000
-=> nand write.e 0xc0700000 0x20000 <nand_spl_size>
-
-The u-boot binary is flashed at location 0xe0000(block 6) of the nand
-flash. The spl loader expects the u-boot at this location. For
-flashing the u-boot binary
-
-=> tftpboot 0xc0700000 u-boot.bin
-=> nand erase 0xe0000 0x40000
-=> nand write.e 0xc0700000 0xe0000 <u-boot-size>
-
-
-Links
-=====
-
-[1]
- http://code.google.com/p/hawkboard/downloads/detail?name=u-boot_uart_ais_v1.bin
-
-[2]
- http://elinux.org/Hawkboard#Booting_u-boot_over_UART
-
-[3]
- http://elinux.org/Hawkboard#Signing_u-boot_for_UART_boot
-
-[4]
- http://processors.wiki.ti.com/index.php/RBL_UBL_and_host_program#RBL_booting_from_NAND_and_ECC.2FBad_blocks
diff --git a/board/davinci/da8xxevm/hawkboard-ais-nand.cfg b/board/davinci/da8xxevm/hawkboard-ais-nand.cfg
deleted file mode 100644
index 2b12b6c08a..0000000000
--- a/board/davinci/da8xxevm/hawkboard-ais-nand.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-# PLL0CFG0 PLL0CFG1
-PLL0 0x00180001 0x00000205
-# PLL1CFG0 PLL1CFG1 DRPYC1R SDCR SDTIMR1 SDTIMR2 SDRCR CLK2XSRC
-DDR2 0x15010001 0x00000002 0x00000043 0x00134632 0x26492a09 0x7d13c722 0x00000249 0x00000000
diff --git a/board/davinci/da8xxevm/hawkboard.c b/board/davinci/da8xxevm/hawkboard.c
deleted file mode 100644
index d5992a5564..0000000000
--- a/board/davinci/da8xxevm/hawkboard.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org>
- *
- * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
- * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- * Copyright (C) 2004 Texas Instruments.
- * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>.
- *
- * ----------------------------------------------------------------------------
- * SPDX-License-Identifier: GPL-2.0+
- * ----------------------------------------------------------------------------
- */
-
-#include <common.h>
-#include <asm/errno.h>
-#include <asm/arch/hardware.h>
-#include <asm/io.h>
-#include <asm/arch/davinci_misc.h>
-#include <asm/arch/pinmux_defs.h>
-#include <asm/arch/da8xx-usb.h>
-#include <ns16550.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const struct pinmux_resource pinmuxes[] = {
- PINMUX_ITEM(emac_pins_mii),
- PINMUX_ITEM(emac_pins_mdio),
- PINMUX_ITEM(emifa_pins_cs3),
- PINMUX_ITEM(emifa_pins_cs4),
- PINMUX_ITEM(emifa_pins_nand),
- PINMUX_ITEM(uart2_pins_txrx),
- PINMUX_ITEM(uart2_pins_rtscts),
-};
-
-const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
-
-const struct lpsc_resource lpsc[] = {
- { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
- { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
- { DAVINCI_LPSC_EMAC }, /* image download */
- { DAVINCI_LPSC_UART2 }, /* console */
- { DAVINCI_LPSC_GPIO },
-};
-
-const int lpsc_size = ARRAY_SIZE(lpsc);
-
-int board_init(void)
-{
- /* arch number of the board */
- gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD;
-
- /* address of boot parameters */
- gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
-
- return 0;
-}
-
-int board_early_init_f(void)
-{
- /*
- * Kick Registers need to be set to allow access to Pin Mux registers
- */
- writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0);
- writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1);
-
- /* set cfgchip3 to select mii */
- writel(readl(&davinci_syscfg_regs->cfgchip3) &
- ~(1 << 8), &davinci_syscfg_regs->cfgchip3);
-
- return 0;
-}
-
-int misc_init_r(void)
-{
- char buf[32];
-
- printf("ARM Clock : %s MHz\n",
- strmhz(buf, clk_get(DAVINCI_ARM_CLKID)));
-
- return 0;
-}
-
-int usb_phy_on(void)
-{
- u32 timeout;
- u32 cfgchip2;
-
- cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
-
- cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
- CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ |
- CFGCHIP2_USB1PHYCLKMUX);
- cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
- CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX |
- CFGCHIP2_USB1SUSPENDM;
-
- writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
-
- /* wait until the usb phy pll locks */
- timeout = DA8XX_USB_OTG_TIMEOUT;
- while (timeout--)
- if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
- return 1;
-
- /* USB phy was not turned on */
- return 0;
-}
-
-void usb_phy_off(void)
-{
- u32 cfgchip2;
-
- /*
- * Power down the on-chip PHY.
- */
- cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
- cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM);
- cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET;
- writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
-}
diff --git a/board/davinci/da8xxevm/u-boot-spl-hawk.lds b/board/davinci/da8xxevm/u-boot-spl-hawk.lds
deleted file mode 100644
index 5c629db139..0000000000
--- a/board/davinci/da8xxevm/u-boot-spl-hawk.lds
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0xc1080000;
-
- . = ALIGN(4);
- .text :
- {
- *(.vectors)
- arch/arm/cpu/arm926ejs/start.o (.text*)
- arch/arm/cpu/arm926ejs/built-in.o (.text*)
- drivers/mtd/nand/built-in.o (.text*)
-
- *(.text*)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata*) }
-
- . = ALIGN(4);
- .data : {
- *(.data)
- __datarel_start = .;
- *(.data.rel)
- __datarelrolocal_start = .;
- *(.data.rel.ro.local)
- __datarellocal_start = .;
- *(.data.rel.local)
- __datarelro_start = .;
- *(.data.rel.ro)
- }
-
- . = ALIGN(4);
- __image_copy_end = .;
- __rel_dyn_start = .;
- __rel_dyn_end = .;
-
- __got_start = .;
- . = ALIGN(4);
- .got : { *(.got) }
-
- __got_end = .;
-
- .bss :
- {
- . = ALIGN(4);
- __bss_start = .;
- *(.bss*)
- . = ALIGN(4);
- __bss_end = .;
- }
-
- .end :
- {
- *(.__end)
- }
-}
diff --git a/board/faraday/a320evb/Kconfig b/board/faraday/a320evb/Kconfig
deleted file mode 100644
index 02c42cb0a2..0000000000
--- a/board/faraday/a320evb/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_A320EVB
-
-config SYS_BOARD
- default "a320evb"
-
-config SYS_VENDOR
- default "faraday"
-
-config SYS_SOC
- default "a320"
-
-config SYS_CONFIG_NAME
- default "a320evb"
-
-endif
diff --git a/board/faraday/a320evb/MAINTAINERS b/board/faraday/a320evb/MAINTAINERS
deleted file mode 100644
index f13b015bb4..0000000000
--- a/board/faraday/a320evb/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-A320EVB BOARD
-M: Po-Yu Chuang <ratbert@faraday-tech.com>
-S: Maintained
-F: board/faraday/a320evb/
-F: include/configs/a320evb.h
-F: configs/a320evb_defconfig
diff --git a/board/faraday/a320evb/Makefile b/board/faraday/a320evb/Makefile
deleted file mode 100644
index 518ce3fcb4..0000000000
--- a/board/faraday/a320evb/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := a320evb.o
-obj-y += lowlevel_init.o
diff --git a/board/faraday/a320evb/a320evb.c b/board/faraday/a320evb/a320evb.c
deleted file mode 100644
index c42635b705..0000000000
--- a/board/faraday/a320evb/a320evb.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * (C) Copyright 2009 Faraday Technology
- * Po-Yu Chuang <ratbert@faraday-tech.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <asm/io.h>
-
-#include <faraday/ftsmc020.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init(void)
-{
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
- ftsmc020_init(); /* initialize Flash */
- return 0;
-}
-
-int dram_init(void)
-{
- unsigned long sdram_base = PHYS_SDRAM_1;
- unsigned long expected_size = PHYS_SDRAM_1_SIZE;
- unsigned long actual_size;
-
- actual_size = get_ram_size((void *)sdram_base, expected_size);
-
- gd->ram_size = actual_size;
-
- if (expected_size != actual_size)
- printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
- actual_size >> 20, expected_size >> 20);
-
- return 0;
-}
-
-int board_eth_init(bd_t *bd)
-{
- return ftmac100_initialize(bd);
-}
-
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
- if (banknum == 0) { /* non-CFI boot flash */
- info->portwidth = FLASH_CFI_8BIT;
- info->chipwidth = FLASH_CFI_BY8;
- info->interface = FLASH_CFI_X8;
- return 1;
- } else
- return 0;
-}
diff --git a/board/faraday/a320evb/lowlevel_init.S b/board/faraday/a320evb/lowlevel_init.S
deleted file mode 100644
index d366260a80..0000000000
--- a/board/faraday/a320evb/lowlevel_init.S
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * (C) Copyright 2009 Faraday Technology
- * Po-Yu Chuang <ratbert@faraday-tech.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <config.h>
-#include <version.h>
-
-#include <asm/macro.h>
-#include <faraday/ftsdmc020.h>
-
-/*
- * parameters for the SDRAM controller
- */
-#define TP0_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_TP0)
-#define TP1_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_TP1)
-#define CR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_CR)
-#define B0_BSR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_BANK0_BSR)
-#define ACR_A (CONFIG_FTSDMC020_BASE + FTSDMC020_OFFSET_ACR)
-
-#define TP0_D CONFIG_SYS_FTSDMC020_TP0
-#define TP1_D CONFIG_SYS_FTSDMC020_TP1
-#define CR_D1 FTSDMC020_CR_IPREC
-#define CR_D2 FTSDMC020_CR_ISMR
-#define CR_D3 FTSDMC020_CR_IREF
-
-#define B0_BSR_D (CONFIG_SYS_FTSDMC020_BANK0_BSR | \
- FTSDMC020_BANK_BASE(PHYS_SDRAM_1))
-#define ACR_D FTSDMC020_ACR_TOC(0x18)
-
-/*
- * numeric 7 segment display
- */
-.macro led, num
- write32 CONFIG_DEBUG_LED, \num
-.endm
-
-/*
- * Waiting for SDRAM to set up
- */
-.macro wait_sdram
- ldr r0, =CONFIG_FTSDMC020_BASE
-1:
- ldr r1, [r0, #FTSDMC020_OFFSET_CR]
- cmp r1, #0
- bne 1b
-.endm
-
-.globl lowlevel_init
-lowlevel_init:
- mov r11, lr
-
- led 0x0
-
- bl init_sdmc
-
- led 0x1
-
- /* everything is fine now */
- mov lr, r11
- mov pc, lr
-
-/*
- * memory initialization
- */
-init_sdmc:
- led 0x10
-
- /* set SDRAM register */
-
- write32 TP0_A, TP0_D
- led 0x11
-
- write32 TP1_A, TP1_D
- led 0x12
-
- /* set to precharge */
- write32 CR_A, CR_D1
- led 0x13
-
- wait_sdram
- led 0x14
-
- /* set mode register */
- write32 CR_A, CR_D2
- led 0x15
-
- wait_sdram
- led 0x16
-
- /* set to refresh */
- write32 CR_A, CR_D3
- led 0x17
-
- wait_sdram
- led 0x18
-
- write32 B0_BSR_A, B0_BSR_D
- led 0x19
-
- write32 ACR_A, ACR_D
- led 0x1a
-
- mov pc, lr
diff --git a/board/freescale/common/ls102xa_stream_id.c b/board/freescale/common/ls102xa_stream_id.c
index 6154c9c458..f43426991b 100644
--- a/board/freescale/common/ls102xa_stream_id.c
+++ b/board/freescale/common/ls102xa_stream_id.c
@@ -16,3 +16,18 @@ void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num)
for (i = 0; i < num; i++)
out_be32(scfg + id[i].offset, id[i].stream_id);
}
+
+void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size)
+{
+ int i;
+ u32 liodn;
+
+ for (i = 0; i < size; i++) {
+ if (tbl[i].num_ids == 2)
+ liodn = (tbl[i].id[0] << 16) | tbl[i].id[1];
+ else
+ liodn = tbl[i].id[0];
+
+ out_le32((uint32_t *)(tbl[i].reg_offset), liodn);
+ }
+}
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 20eade4651..722b88f1e9 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -509,6 +509,25 @@ static struct csu_ns_dev ns_dev[] = {
};
#endif
+struct liodn_id_table sec_liodn_tbl[] = {
+ SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10),
+ SET_SEC_JR_LIODN_ENTRY(1, 0x10, 0x10),
+ SET_SEC_JR_LIODN_ENTRY(2, 0x10, 0x10),
+ SET_SEC_JR_LIODN_ENTRY(3, 0x10, 0x10),
+ SET_SEC_RTIC_LIODN_ENTRY(a, 0x10),
+ SET_SEC_RTIC_LIODN_ENTRY(b, 0x10),
+ SET_SEC_RTIC_LIODN_ENTRY(c, 0x10),
+ SET_SEC_RTIC_LIODN_ENTRY(d, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(0, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(1, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(2, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(3, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(4, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(5, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(6, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(7, 0x10, 0x10),
+};
+
struct smmu_stream_id dev_stream_id[] = {
{ 0x100, 0x01, "ETSEC MAC1" },
{ 0x104, 0x02, "ETSEC MAC2" },
@@ -541,6 +560,8 @@ int board_init(void)
config_serdes_mux();
#endif
+ ls1021x_config_caam_stream_id(sec_liodn_tbl,
+ ARRAY_SIZE(sec_liodn_tbl));
ls102xa_config_smmu_stream_id(dev_stream_id,
ARRAY_SIZE(dev_stream_id));
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index bc8b00686c..fb8525fe59 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -401,6 +401,25 @@ static struct csu_ns_dev ns_dev[] = {
};
#endif
+struct liodn_id_table sec_liodn_tbl[] = {
+ SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10),
+ SET_SEC_JR_LIODN_ENTRY(1, 0x10, 0x10),
+ SET_SEC_JR_LIODN_ENTRY(2, 0x10, 0x10),
+ SET_SEC_JR_LIODN_ENTRY(3, 0x10, 0x10),
+ SET_SEC_RTIC_LIODN_ENTRY(a, 0x10),
+ SET_SEC_RTIC_LIODN_ENTRY(b, 0x10),
+ SET_SEC_RTIC_LIODN_ENTRY(c, 0x10),
+ SET_SEC_RTIC_LIODN_ENTRY(d, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(0, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(1, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(2, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(3, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(4, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(5, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(6, 0x10, 0x10),
+ SET_SEC_DECO_LIODN_ENTRY(7, 0x10, 0x10),
+};
+
struct smmu_stream_id dev_stream_id[] = {
{ 0x100, 0x01, "ETSEC MAC1" },
{ 0x104, 0x02, "ETSEC MAC2" },
@@ -427,6 +446,8 @@ int board_init(void)
#endif
#endif
+ ls1021x_config_caam_stream_id(sec_liodn_tbl,
+ ARRAY_SIZE(sec_liodn_tbl));
ls102xa_config_smmu_stream_id(dev_stream_id,
ARRAY_SIZE(dev_stream_id));
diff --git a/board/freescale/ls2085a/ddr.c b/board/freescale/ls2085a/ddr.c
index b4a3fc9a9e..4884fa24d0 100644
--- a/board/freescale/ls2085a/ddr.c
+++ b/board/freescale/ls2085a/ddr.c
@@ -77,6 +77,7 @@ found:
popts->data_bus_width = 1;
popts->otf_burst_chop_en = 0;
popts->burst_length = DDR_BL8;
+ popts->bstopre = 0; /* enable auto precharge */
}
/*
* Factors to consider for half-strength driver enable:
diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c
index 163a4c486a..519d61cb1e 100644
--- a/board/freescale/ls2085a/ls2085a.c
+++ b/board/freescale/ls2085a/ls2085a.c
@@ -12,7 +12,7 @@
#include <asm/io.h>
#include <fdt_support.h>
#include <libfdt.h>
-#include <fsl_mc.h>
+#include <fsl-mc/fsl_mc.h>
#include <environment.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -59,8 +59,15 @@ int timer_init(void)
u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
- out_le32(cltbenr, 0x1); /* enable cluster0 timebase */
- out_le32(cntcr, 0x1); /* enable clock for timer */
+ /* Enable timebase for all clusters.
+ * It is safe to do so even some clusters are not enabled.
+ */
+ out_le32(cltbenr, 0xf);
+
+ /* Enable clock for timer
+ * This is a global setting.
+ */
+ out_le32(cntcr, 0x1);
return 0;
}
@@ -91,7 +98,21 @@ void fdt_fixup_board_enet(void *fdt)
{
int offset;
- offset = fdt_path_offset(fdt, "/fsl,dprc@0");
+ offset = fdt_path_offset(fdt, "/fsl-mc");
+
+ /*
+ * TODO: Remove this when backward compatibility
+ * with old DT node (fsl,dprc@0) is no longer needed.
+ */
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/fsl,dprc@0");
+
+ if (offset < 0) {
+ printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n",
+ __func__, offset);
+ return;
+ }
+
if (get_mc_boot_status() == 0)
fdt_status_okay(fdt, offset);
else
diff --git a/board/gumstix/pepper/Kconfig b/board/gumstix/pepper/Kconfig
index 3099a9eae1..750db8585d 100644
--- a/board/gumstix/pepper/Kconfig
+++ b/board/gumstix/pepper/Kconfig
@@ -13,12 +13,12 @@ config SYS_CONFIG_NAME
default "pepper"
config DM
- default y if !SPL_BUILD
+ default y
config DM_GPIO
- default y if !SPL_BUILD
+ default y
config DM_SERIAL
- default y if !SPL_BUILD
+ default y
endif
diff --git a/board/isee/igep0033/Kconfig b/board/isee/igep0033/Kconfig
index 2fe2ef1706..9a8421eb7a 100644
--- a/board/isee/igep0033/Kconfig
+++ b/board/isee/igep0033/Kconfig
@@ -13,12 +13,12 @@ config SYS_CONFIG_NAME
default "am335x_igep0033"
config DM
- default y if !SPL_BUILD
+ default y
config DM_GPIO
- default y if !SPL_BUILD
+ default y
config DM_SERIAL
- default y if !SPL_BUILD
+ default y
endif
diff --git a/board/phytec/pcm051/Kconfig b/board/phytec/pcm051/Kconfig
index 65094cf9fd..bb987156e6 100644
--- a/board/phytec/pcm051/Kconfig
+++ b/board/phytec/pcm051/Kconfig
@@ -13,12 +13,12 @@ config SYS_CONFIG_NAME
default "pcm051"
config DM
- default y if !SPL_BUILD
+ default y
config DM_GPIO
- default y if !SPL_BUILD
+ default y
config DM_SERIAL
- default y if !SPL_BUILD
+ default y
endif
diff --git a/board/samsung/goni/Kconfig b/board/samsung/goni/Kconfig
index 2c5d3fc3be..006e864e0b 100644
--- a/board/samsung/goni/Kconfig
+++ b/board/samsung/goni/Kconfig
@@ -13,12 +13,12 @@ config SYS_CONFIG_NAME
default "s5p_goni"
config DM
- default y if !SPL_BUILD
+ default y
config DM_GPIO
- default y if !SPL_BUILD
+ default y
config DM_SERIAL
- default y if !SPL_BUILD
+ default y
endif
diff --git a/board/samsung/smdkc100/Kconfig b/board/samsung/smdkc100/Kconfig
index 996fe3cc45..ea87166d03 100644
--- a/board/samsung/smdkc100/Kconfig
+++ b/board/samsung/smdkc100/Kconfig
@@ -13,12 +13,12 @@ config SYS_CONFIG_NAME
default "smdkc100"
config DM
- default y if !SPL_BUILD
+ default y
config DM_GPIO
- default y if !SPL_BUILD
+ default y
config DM_SERIAL
- default y if !SPL_BUILD
+ default y
endif
diff --git a/board/silica/pengwyn/Kconfig b/board/silica/pengwyn/Kconfig
index 6ecda8041c..2e9a2b303f 100644
--- a/board/silica/pengwyn/Kconfig
+++ b/board/silica/pengwyn/Kconfig
@@ -13,12 +13,12 @@ config SYS_CONFIG_NAME
default "pengwyn"
config DM
- default y if !SPL_BUILD
+ default y
config DM_GPIO
- default y if !SPL_BUILD
+ default y
config DM_SERIAL
- default y if !SPL_BUILD
+ default y
endif
diff --git a/board/syteco/jadecpu/Kconfig b/board/syteco/jadecpu/Kconfig
deleted file mode 100644
index 6e9392e21f..0000000000
--- a/board/syteco/jadecpu/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_JADECPU
-
-config SYS_BOARD
- default "jadecpu"
-
-config SYS_VENDOR
- default "syteco"
-
-config SYS_SOC
- default "mb86r0x"
-
-config SYS_CONFIG_NAME
- default "jadecpu"
-
-endif
diff --git a/board/syteco/jadecpu/MAINTAINERS b/board/syteco/jadecpu/MAINTAINERS
deleted file mode 100644
index b53e7cad42..0000000000
--- a/board/syteco/jadecpu/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-JADECPU BOARD
-M: Matthias Weisser <weisserm@arcor.de>
-S: Maintained
-F: board/syteco/jadecpu/
-F: include/configs/jadecpu.h
-F: configs/jadecpu_defconfig
diff --git a/board/syteco/jadecpu/Makefile b/board/syteco/jadecpu/Makefile
deleted file mode 100644
index 74264361e5..0000000000
--- a/board/syteco/jadecpu/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian@popies.net>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += jadecpu.o
-obj-y += lowlevel_init.o
diff --git a/board/syteco/jadecpu/jadecpu.c b/board/syteco/jadecpu/jadecpu.c
deleted file mode 100644
index 6c60a41e3d..0000000000
--- a/board/syteco/jadecpu/jadecpu.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * (c) 2010 Graf-Syteco, Matthias Weisser
- * <weisserm@arcor.de>
- *
- * (C) Copyright 2007, mycable GmbH
- * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <asm/io.h>
-#include <asm/arch/mb86r0x.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-int board_init(void)
-{
- struct mb86r0x_ccnt * ccnt = (struct mb86r0x_ccnt *)
- MB86R0x_CCNT_BASE;
-
- /* We select mode 0 for group 2 and mode 1 for group 4 */
- writel(0x00000010, &ccnt->cmux_md);
-
- gd->flags = 0;
- gd->bd->bi_boot_params = PHYS_SDRAM + PHYS_SDRAM_SIZE - 0x10000;
-
- icache_enable();
- dcache_enable();
-
- return 0;
-}
-
-static void setup_display_power(uint32_t pwr_bit, char *pwm_opts,
- unsigned long pwm_base)
-{
- struct mb86r0x_gpio *gpio = (struct mb86r0x_gpio *)
- MB86R0x_GPIO_BASE;
- struct mb86r0x_pwm *pwm = (struct mb86r0x_pwm *) pwm_base;
- const char *e;
-
- writel(readl(&gpio->gpdr2) | pwr_bit, &gpio->gpdr2);
-
- e = getenv(pwm_opts);
- if (e != NULL) {
- const char *s;
- uint32_t freq, init;
-
- freq = 0;
- init = 0;
-
- s = strchr(e, 'f');
- if (s != NULL)
- freq = simple_strtol(s + 2, NULL, 0);
-
- s = strchr(e, 'i');
- if (s != NULL)
- init = simple_strtol(s + 2, NULL, 0);
-
- if (freq > 0) {
- writel(CONFIG_MB86R0x_IOCLK / 1000 / freq,
- &pwm->bcr);
- writel(1002, &pwm->tpr);
- writel(1, &pwm->pr);
- writel(init * 10 + 1, &pwm->dr);
- writel(1, &pwm->cr);
- writel(1, &pwm->sr);
- }
- }
-}
-
-int board_late_init(void)
-{
- struct mb86r0x_gpio *gpio = (struct mb86r0x_gpio *)
- MB86R0x_GPIO_BASE;
- uint32_t in_word;
-
-#ifdef CONFIG_VIDEO_MB86R0xGDC
- /* Check if we have valid display settings and turn on power if so */
- /* Display 0 */
- if (getenv("gs_dsp_0_param") || getenv("videomode"))
- setup_display_power((1 << 3), "gs_dsp_0_pwm",
- MB86R0x_PWM0_BASE);
-
- /* The corresponding GPIO is always an output */
- writel(readl(&gpio->gpddr2) | (1 << 3), &gpio->gpddr2);
-
- /* Display 1 */
- if (getenv("gs_dsp_1_param") || getenv("videomode1"))
- setup_display_power((1 << 4), "gs_dsp_1_pwm",
- MB86R0x_PWM1_BASE);
-
- /* The corresponding GPIO is always an output */
- writel(readl(&gpio->gpddr2) | (1 << 4), &gpio->gpddr2);
-#endif /* CONFIG_VIDEO_MB86R0xGDC */
-
- /* 5V enable */
- writel(readl(&gpio->gpdr1) & ~(1 << 5), &gpio->gpdr1);
- writel(readl(&gpio->gpddr1) | (1 << 5), &gpio->gpddr1);
-
- /* We have special boot options if told by GPIOs */
- in_word = readl(&gpio->gpdr1);
-
- if ((in_word & 0xC0) == 0xC0) {
- setenv("stdin", "serial");
- setenv("stdout", "serial");
- setenv("stderr", "serial");
- setenv("preboot", "run gs_slow_boot");
- } else if ((in_word & 0xC0) != 0) {
- setenv("stdout", "vga");
- setenv("preboot", "run gs_slow_boot");
- } else {
- setenv("stdin", "serial");
- setenv("stdout", "serial");
- setenv("stderr", "serial");
- if (getenv("gs_devel")) {
- setenv("preboot", "run gs_slow_boot");
- } else {
- setenv("preboot", "run gs_fast_boot");
- }
- }
-
- return 0;
-}
-
-int misc_init_r(void)
-{
- return 0;
-}
-
-/*
- * DRAM configuration
- */
-int dram_init(void)
-{
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
- PHYS_SDRAM_SIZE);
-
- return 0;
-}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- gd->bd->bi_dram[0].size = gd->ram_size;
-}
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC911X
- rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
-#endif
- return rc;
-}
diff --git a/board/syteco/jadecpu/lowlevel_init.S b/board/syteco/jadecpu/lowlevel_init.S
deleted file mode 100644
index 9568cec9a8..0000000000
--- a/board/syteco/jadecpu/lowlevel_init.S
+++ /dev/null
@@ -1,249 +0,0 @@
-/*
- * Board specific setup info
- *
- * (C) Copyright 2007, mycable GmbH
- * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de>
- *
- * (C) Copyright 2003, ARM Ltd.
- * Philippe Robin, <philippe.robin@arm.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <config.h>
-#include <version.h>
-#include <asm/macro.h>
-#include <asm/arch/mb86r0x.h>
-#include <generated/asm-offsets.h>
-
-/* Set up the platform, once the cpu has been initialized */
-.globl lowlevel_init
-lowlevel_init:
-/*
- * Initialize Clock Reset Generator (CRG)
- */
-
- ldr r0, =MB86R0x_CRG_BASE
-
- /* Not change the initial value that is set by external pin.*/
-WAIT_PLL:
- ldr r2, [r0, #CRG_CRPR] /* Wait for PLLREADY */
- tst r2, #MB86R0x_CRG_CRPR_PLLRDY
- beq WAIT_PLL
-
- /* Set clock gate control */
- ldr r1, =CONFIG_SYS_CRG_CRHA_INIT
- str r1, [r0, #CRG_CRHA]
- ldr r1, =CONFIG_SYS_CRG_CRPA_INIT
- str r1, [r0, #CRG_CRPA]
- ldr r1, =CONFIG_SYS_CRG_CRPB_INIT
- str r1, [r0, #CRG_CRPB]
- ldr r1, =CONFIG_SYS_CRG_CRHB_INIT
- str r1, [r0, #CRG_CRHB]
- ldr r1, =CONFIG_SYS_CRG_CRAM_INIT
- str r1, [r0, #CRG_CRAM]
-
-/*
- * Initialize External Bus Interface
- */
- ldr r0, =MB86R0x_MEMC_BASE
-
- ldr r1, =CONFIG_SYS_MEMC_MCFMODE0_INIT
- str r1, [r0, #MEMC_MCFMODE0]
- ldr r1, =CONFIG_SYS_MEMC_MCFMODE2_INIT
- str r1, [r0, #MEMC_MCFMODE2]
- ldr r1, =CONFIG_SYS_MEMC_MCFMODE4_INIT
- str r1, [r0, #MEMC_MCFMODE4]
-
- ldr r1, =CONFIG_SYS_MEMC_MCFTIM0_INIT
- str r1, [r0, #MEMC_MCFTIM0]
- ldr r1, =CONFIG_SYS_MEMC_MCFTIM2_INIT
- str r1, [r0, #MEMC_MCFTIM2]
- ldr r1, =CONFIG_SYS_MEMC_MCFTIM4_INIT
- str r1, [r0, #MEMC_MCFTIM4]
-
- ldr r1, =CONFIG_SYS_MEMC_MCFAREA0_INIT
- str r1, [r0, #MEMC_MCFAREA0]
- ldr r1, =CONFIG_SYS_MEMC_MCFAREA2_INIT
- str r1, [r0, #MEMC_MCFAREA2]
- ldr r1, =CONFIG_SYS_MEMC_MCFAREA4_INIT
- str r1, [r0, #MEMC_MCFAREA4]
-
-/*
- * Initialize DDR2 Controller
- */
-
- /* Wait for PLL LOCK up time or more */
- wait_timer 20
-
- /*
- * (2) Initialize DDRIF
- */
- ldr r0, =MB86R0x_DDR2_BASE
- ldr r1, =CONFIG_SYS_DDR2_DRIMS_INIT
- strh r1, [r0, #DDR2_DRIMS]
-
- /*
- * (3) Wait for 20MCKPs(120nsec) or more
- */
- wait_timer 20
-
- /*
- * (4) IRESET/IUSRRST release
- */
- ldr r0, =MB86R0x_CCNT_BASE
- ldr r1, =CONFIG_SYS_CCNT_CDCRC_INIT_1
- str r1, [r0, #CCNT_CDCRC]
-
- /*
- * (5) Wait for 20MCKPs(120nsec) or more
- */
- wait_timer 20
-
- /*
- * (6) IDLLRST release
- */
- ldr r0, =MB86R0x_CCNT_BASE
- ldr r1, =CONFIG_SYS_CCNT_CDCRC_INIT_2
- str r1, [r0, #CCNT_CDCRC]
-
- /*
- * (7+8) Wait for 200us(=200000ns) or more (DDR2 Spec)
- */
- wait_timer 33536
-
- /*
- * (9) MCKE ON
- */
- ldr r0, =MB86R0x_DDR2_BASE
- ldr r1, =CONFIG_SYS_DDR2_DRIC1_INIT
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_DRIC2_INIT
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =CONFIG_SYS_DDR2_DRCA_INIT
- strh r1, [r0, #DDR2_DRCA]
- ldr r1, =MB86R0x_DDR2_DRCI_INIT
- strh r1, [r0, #DDR2_DRIC]
-
- /*
- * (10) Initialize SDRAM
- */
-
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- wait_timer 67 /* 400ns wait */
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_1
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_1
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_2
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_2
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_3
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_3
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_4
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_4
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_5
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_5
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- wait_timer 200
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_6
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_6
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_7
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_7
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- wait_timer 18 /* 105ns wait */
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_8
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_8
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- wait_timer 200 /* MRS to OCD: 200clock */
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_9
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_9
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC1_10
- strh r1, [r0, #DDR2_DRIC1]
- ldr r1, =CONFIG_SYS_DDR2_INIT_DRIC2_10
- strh r1, [r0, #DDR2_DRIC2]
- ldr r1, =MB86R0x_DDR2_DRCI_CMD
- strh r1, [r0, #DDR2_DRIC]
-
- ldr r1, =CONFIG_SYS_DDR2_DRCM_INIT
- strh r1, [r0, #DDR2_DRCM]
-
- ldr r1, =CONFIG_SYS_DDR2_DRCST1_INIT
- strh r1, [r0, #DDR2_DRCST1]
-
- ldr r1, =CONFIG_SYS_DDR2_DRCST2_INIT
- strh r1, [r0, #DDR2_DRCST2]
-
- ldr r1, =CONFIG_SYS_DDR2_DRCR_INIT
- strh r1, [r0, #DDR2_DRCR]
-
- ldr r1, =CONFIG_SYS_DDR2_DRCF_INIT
- strh r1, [r0, #DDR2_DRCF]
-
- ldr r1, =CONFIG_SYS_DDR2_DRASR_INIT
- strh r1, [r0, #DDR2_DRASR]
-
- /*
- * (11) ODT setting
- */
- ldr r1, =CONFIG_SYS_DDR2_DROBS_INIT
- strh r1, [r0, #DDR2_DROBS]
- ldr r1, =CONFIG_SYS_DDR2_DROABA_INIT
- strh r1, [r0, #DDR2_DROABA]
- ldr r1, =CONFIG_SYS_DDR2_DRIBSODT1_INIT
- strh r1, [r0, #DDR2_DRIBSODT1]
-
- /*
- * (12) Shift to ODTCONT ON (SDRAM side) and DDR2 usual operation mode
- */
- ldr r1, =CONFIG_SYS_DDR2_DROS_INIT
- strh r1, [r0, #DDR2_DROS]
- ldr r1, =MB86R0x_DDR2_DRCI_NORMAL
- strh r1, [r0, #DDR2_DRIC]
-
- mov pc, lr
diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig
index a20e0c1ab9..722f9d57c4 100644
--- a/board/ti/am335x/Kconfig
+++ b/board/ti/am335x/Kconfig
@@ -39,18 +39,18 @@ config NOR_BOOT
NOR for environment.
config DM
- default y if !SPL_BUILD
+ default y
config DM_GPIO
- default y if DM && !SPL_BUILD
+ default y if DM
config DM_SERIAL
- default y if DM && !SPL_BUILD
+ default y if DM
config SYS_MALLOC_F
- default y if DM && !SPL_BUILD
+ default y if DM
config SYS_MALLOC_F_LEN
- default 0x400 if DM && !SPL_BUILD
+ default 0x400 if DM
endif
diff --git a/board/ti/tnetv107xevm/Kconfig b/board/ti/tnetv107xevm/Kconfig
deleted file mode 100644
index 637f20e847..0000000000
--- a/board/ti/tnetv107xevm/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_TNETV107X_EVM
-
-config SYS_BOARD
- default "tnetv107xevm"
-
-config SYS_VENDOR
- default "ti"
-
-config SYS_SOC
- default "tnetv107x"
-
-config SYS_CONFIG_NAME
- default "tnetv107x_evm"
-
-endif
diff --git a/board/ti/tnetv107xevm/MAINTAINERS b/board/ti/tnetv107xevm/MAINTAINERS
deleted file mode 100644
index 8a92c6bf87..0000000000
--- a/board/ti/tnetv107xevm/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-TNETV107XEVM BOARD
-#M: Chan-Taek Park <c-park@ti.com>
-S: Orphan (since 2014-06)
-F: board/ti/tnetv107xevm/
-F: include/configs/tnetv107x_evm.h
-F: configs/tnetv107x_evm_defconfig
diff --git a/board/ti/tnetv107xevm/Makefile b/board/ti/tnetv107xevm/Makefile
deleted file mode 100644
index 0a6128f85f..0000000000
--- a/board/ti/tnetv107xevm/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += sdb_board.o
diff --git a/board/ti/tnetv107xevm/config.mk b/board/ti/tnetv107xevm/config.mk
deleted file mode 100644
index 51c2886b34..0000000000
--- a/board/ti/tnetv107xevm/config.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-CONFIG_SYS_TEXT_BASE = 0x83FC0000
diff --git a/board/ti/tnetv107xevm/sdb_board.c b/board/ti/tnetv107xevm/sdb_board.c
deleted file mode 100644
index a84ec84bae..0000000000
--- a/board/ti/tnetv107xevm/sdb_board.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * TNETV107X-EVM: Board initialization
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <miiphy.h>
-#include <linux/mtd/nand.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/clock.h>
-#include <asm/io.h>
-#include <asm/mach-types.h>
-#include <asm/ti-common/davinci_nand.h>
-#include <asm/arch/mux.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = {
- { /* CS0 */
- .mode = ASYNC_EMIF_MODE_NAND,
- .wr_setup = 5,
- .wr_strobe = 5,
- .wr_hold = 2,
- .rd_setup = 5,
- .rd_strobe = 5,
- .rd_hold = 2,
- .turn_around = 5,
- .width = ASYNC_EMIF_8,
- },
- { /* CS1 */
- .mode = ASYNC_EMIF_MODE_NOR,
- .wr_setup = 2,
- .wr_strobe = 27,
- .wr_hold = 4,
- .rd_setup = 2,
- .rd_strobe = 27,
- .rd_hold = 4,
- .turn_around = 2,
- .width = ASYNC_EMIF_PRESERVE,
- },
- { /* CS2 */
- .mode = ASYNC_EMIF_MODE_NOR,
- .wr_setup = 2,
- .wr_strobe = 27,
- .wr_hold = 4,
- .rd_setup = 2,
- .rd_strobe = 27,
- .rd_hold = 4,
- .turn_around = 2,
- .width = ASYNC_EMIF_PRESERVE,
- },
- { /* CS3 */
- .mode = ASYNC_EMIF_MODE_NOR,
- .wr_setup = 1,
- .wr_strobe = 90,
- .wr_hold = 3,
- .rd_setup = 1,
- .rd_strobe = 26,
- .rd_hold = 3,
- .turn_around = 1,
- .width = ASYNC_EMIF_8,
- },
-};
-
-static struct pll_init_data pll_config[] = {
- {
- .pll = ETH_PLL,
- .internal_osc = 1,
- .pll_freq = 500000000,
- .div_freq = {
- 5000000, 50000000, 125000000, 250000000, 25000000,
- },
- },
-};
-
-static const short sdio1_pins[] = {
- TNETV107X_PIN_SDIO1_CLK_1, TNETV107X_PIN_SDIO1_CMD_1,
- TNETV107X_PIN_SDIO1_DATA0_1, TNETV107X_PIN_SDIO1_DATA1_1,
- TNETV107X_PIN_SDIO1_DATA2_1, TNETV107X_PIN_SDIO1_DATA3_1,
- -1
-};
-
-static const short uart1_pins[] = {
- TNETV107X_PIN_UART1_RD, TNETV107X_PIN_UART1_TD, -1
-};
-
-static const short ssp_pins[] = {
- TNETV107X_PIN_SSP0_0, TNETV107X_PIN_SSP0_1, TNETV107X_PIN_SSP0_2,
- TNETV107X_PIN_SSP1_0, TNETV107X_PIN_SSP1_1, TNETV107X_PIN_SSP1_2,
- TNETV107X_PIN_SSP1_3, -1
-};
-
-int board_init(void)
-{
-#ifndef CONFIG_USE_IRQ
- __raw_writel(0, INTC_GLB_EN); /* Global disable */
- __raw_writel(0, INTC_HINT_EN); /* Disable host ints */
- __raw_writel(0, INTC_EN_CLR0 + 0); /* Clear enable */
- __raw_writel(0, INTC_EN_CLR0 + 4); /* Clear enable */
- __raw_writel(0, INTC_EN_CLR0 + 8); /* Clear enable */
-#endif
-
- gd->bd->bi_arch_number = MACH_TYPE_TNETV107X;
- gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
-
- init_plls(ARRAY_SIZE(pll_config), pll_config);
-
- init_async_emif(ARRAY_SIZE(async_emif_config), async_emif_config);
-
- mux_select_pin(TNETV107X_PIN_ASR_CS3);
- mux_select_pins(sdio1_pins);
- mux_select_pins(uart1_pins);
- mux_select_pins(ssp_pins);
-
- return 0;
-}
-
-int dram_init(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-#ifdef CONFIG_NAND_DAVINCI
-int board_nand_init(struct nand_chip *nand)
-{
- davinci_nand_init(nand);
-
- return 0;
-}
-#endif