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-rw-r--r--common/spl/Kconfig7
-rw-r--r--common/spl/Makefile1
-rw-r--r--common/spl/spl.c7
-rw-r--r--common/spl/spl_optee.S12
4 files changed, 27 insertions, 0 deletions
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 18dbc238bf..d0564621d4 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -832,6 +832,13 @@ config SPL_AM33XX_ENABLE_RTC32K_OSC
Enable access to the AM33xx RTC and select the external 32kHz clock
source.
+config SPL_OPTEE
+ bool "Support OP-TEE Trusted OS"
+ depends on ARM
+ help
+ OP-TEE is an open source Trusted OS which is loaded by SPL.
+ More detail at: https://github.com/OP-TEE/optee_os
+
config TPL
bool
depends on SUPPORT_TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 814081feda..a130a5be4b 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
+obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 038f2b0e83..292e659c9a 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -536,6 +536,13 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
spl_invoke_atf(&spl_image);
break;
#endif
+#if CONFIG_IS_ENABLED(OPTEE)
+ case IH_OS_TEE:
+ debug("Jumping to U-Boot via OP-TEE\n");
+ spl_optee_entry(NULL, NULL, spl_image.fdt_addr,
+ (void *)spl_image.entry_point);
+ break;
+#endif
#ifdef CONFIG_SPL_OS_BOOT
case IH_OS_LINUX:
debug("Jumping to Linux\n");
diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S
new file mode 100644
index 0000000000..86fc398546
--- /dev/null
+++ b/common/spl/spl_optee.S
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+ENTRY(spl_optee_entry)
+ ldr lr, =CONFIG_SYS_TEXT_BASE
+ mov pc, r3
+ENDPROC(spl_optee_entry)