summaryrefslogtreecommitdiff
path: root/cpu
diff options
context:
space:
mode:
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm926ejs/at91/Makefile3
-rw-r--r--cpu/arm926ejs/at91/at91sam9m10g45_devices.c175
-rw-r--r--cpu/arm926ejs/at91/clock.c12
-rw-r--r--cpu/mpc83xx/cpu_init.c4
-rw-r--r--cpu/ppc4xx/4xx_pci.c25
-rw-r--r--cpu/ppc4xx/cpu_init.c5
-rw-r--r--cpu/sh2/u-boot.lds95
-rw-r--r--cpu/sh3/u-boot.lds102
-rw-r--r--cpu/sh4/u-boot.lds99
9 files changed, 509 insertions, 11 deletions
diff --git a/cpu/arm926ejs/at91/Makefile b/cpu/arm926ejs/at91/Makefile
index 3da89f4fba..4f467be91c 100644
--- a/cpu/arm926ejs/at91/Makefile
+++ b/cpu/arm926ejs/at91/Makefile
@@ -29,8 +29,11 @@ COBJS-$(CONFIG_AT91CAP9) += at91cap9_devices.o
COBJS-$(CONFIG_AT91SAM9260) += at91sam9260_devices.o
COBJS-$(CONFIG_AT91SAM9G20) += at91sam9260_devices.o
COBJS-$(CONFIG_AT91SAM9261) += at91sam9261_devices.o
+COBJS-$(CONFIG_AT91SAM9G10) += at91sam9261_devices.o
COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o
COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o
+COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o
+COBJS-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o
COBJS-$(CONFIG_AT91_LED) += led.o
COBJS-y += clock.o
COBJS-y += cpu.o
diff --git a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c b/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
new file mode 100644
index 0000000000..98d90f2514
--- /dev/null
+++ b/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
@@ -0,0 +1,175 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_serial0_hw_init(void)
+{
+ at91_set_A_periph(AT91_PIN_PB19, 1); /* TXD0 */
+ at91_set_A_periph(AT91_PIN_PB18, 0); /* RXD0 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US0);
+}
+
+void at91_serial1_hw_init(void)
+{
+ at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD1 */
+ at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD1 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US1);
+}
+
+void at91_serial2_hw_init(void)
+{
+ at91_set_A_periph(AT91_PIN_PD6, 1); /* TXD2 */
+ at91_set_A_periph(AT91_PIN_PD7, 0); /* RXD2 */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_US2);
+}
+
+void at91_serial3_hw_init(void)
+{
+ at91_set_A_periph(AT91_PIN_PB12, 0); /* DRXD */
+ at91_set_A_periph(AT91_PIN_PB13, 1); /* DTXD */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);;
+}
+
+void at91_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+ at91_serial0_hw_init();
+#endif
+
+#ifdef CONFIG_USART1
+ at91_serial1_hw_init();
+#endif
+
+#ifdef CONFIG_USART2
+ at91_serial2_hw_init();
+#endif
+
+#ifdef CONFIG_USART3 /* DBGU */
+ at91_serial3_hw_init();
+#endif
+}
+
+#ifdef CONFIG_ATMEL_SPI
+void at91_spi0_hw_init(unsigned long cs_mask)
+{
+ at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI0_MISO */
+ at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI0_MOSI */
+ at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI0_SPCK */
+
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_SPI0);
+
+ if (cs_mask & (1 << 0)) {
+ at91_set_A_periph(AT91_PIN_PB3, 0);
+ }
+ if (cs_mask & (1 << 1)) {
+ at91_set_B_periph(AT91_PIN_PB18, 0);
+ }
+ if (cs_mask & (1 << 2)) {
+ at91_set_B_periph(AT91_PIN_PB19, 0);
+ }
+ if (cs_mask & (1 << 3)) {
+ at91_set_B_periph(AT91_PIN_PD27, 0);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PB3, 0);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PB18, 0);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PB19, 0);
+ }
+ if (cs_mask & (1 << 7)) {
+ at91_set_gpio_output(AT91_PIN_PD27, 0);
+ }
+}
+
+void at91_spi1_hw_init(unsigned long cs_mask)
+{
+ at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_MISO */
+ at91_set_A_periph(AT91_PIN_PB15, 0); /* SPI1_MOSI */
+ at91_set_A_periph(AT91_PIN_PB16, 0); /* SPI1_SPCK */
+
+ /* Enable clock */
+ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_SPI1);
+
+ if (cs_mask & (1 << 0)) {
+ at91_set_A_periph(AT91_PIN_PB17, 0);
+ }
+ if (cs_mask & (1 << 1)) {
+ at91_set_B_periph(AT91_PIN_PD28, 0);
+ }
+ if (cs_mask & (1 << 2)) {
+ at91_set_A_periph(AT91_PIN_PD18, 0);
+ }
+ if (cs_mask & (1 << 3)) {
+ at91_set_A_periph(AT91_PIN_PD19, 0);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PB17, 0);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PD28, 0);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PD18, 0);
+ }
+ if (cs_mask & (1 << 7)) {
+ at91_set_gpio_output(AT91_PIN_PD19, 0);
+ }
+
+}
+#endif
+
+#ifdef CONFIG_MACB
+void at91_macb_hw_init(void)
+{
+ at91_set_A_periph(AT91_PIN_PA17, 0); /* ETXCK_EREFCK */
+ at91_set_A_periph(AT91_PIN_PA15, 0); /* ERXDV */
+ at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
+ at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
+ at91_set_A_periph(AT91_PIN_PA16, 0); /* ERXER */
+ at91_set_A_periph(AT91_PIN_PA14, 0); /* ETXEN */
+ at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX0 */
+ at91_set_A_periph(AT91_PIN_PA11, 0); /* ETX1 */
+ at91_set_A_periph(AT91_PIN_PA19, 0); /* EMDIO */
+ at91_set_A_periph(AT91_PIN_PA18, 0); /* EMDC */
+#ifndef CONFIG_RMII
+ at91_set_B_periph(AT91_PIN_PA29, 0); /* ECRS */
+ at91_set_B_periph(AT91_PIN_PA30, 0); /* ECOL */
+ at91_set_B_periph(AT91_PIN_PA8, 0); /* ERX2 */
+ at91_set_B_periph(AT91_PIN_PA9, 0); /* ERX3 */
+ at91_set_B_periph(AT91_PIN_PA28, 0); /* ERXCK */
+ at91_set_B_periph(AT91_PIN_PA6, 0); /* ETX2 */
+ at91_set_B_periph(AT91_PIN_PA7, 0); /* ETX3 */
+ at91_set_B_periph(AT91_PIN_PA27, 0); /* ETXER */
+#endif
+}
+#endif
diff --git a/cpu/arm926ejs/at91/clock.c b/cpu/arm926ejs/at91/clock.c
index 9f03468b6c..574f48824c 100644
--- a/cpu/arm926ejs/at91/clock.c
+++ b/cpu/arm926ejs/at91/clock.c
@@ -183,15 +183,23 @@ int at91_clock_init(unsigned long main_clock)
* For now, assume this parentage won't change.
*/
mckr = at91_sys_read(AT91_PMC_MCKR);
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+ /* plla divisor by 2 */
+ plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
+#endif
freq = mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_CSS);
+
freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2)); /* prescale */
#if defined(CONFIG_AT91RM9200)
mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
#elif defined(CONFIG_AT91SAM9G20)
mck_rate_hz = (mckr & AT91_PMC_MDIV) ?
- freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq; /* mdiv ; (x >> 7) = ((x >> 8) * 2) */
+ freq / ((mckr & AT91_PMC_MDIV) >> 7) : freq; /* mdiv ; (x >> 7) = ((x >> 8) * 2) */
if (mckr & AT91_PMC_PDIV)
- freq /= 2; /* processor clock division */
+ freq /= 2; /* processor clock division */
+#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+ mck_rate_hz = (mckr & AT91_PMC_MDIV) == AT91SAM9_PMC_MDIV_3 ?
+ freq / 3 : freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
#else
mck_rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
#endif
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 414565cb65..03b6c86349 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -303,11 +303,11 @@ void cpu_init_f (volatile immap_t * im)
struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR;
/* Configure interface. */
- setbits_be32((void *)ehci->control, REFSEL_16MHZ | UTMI_PHY_EN);
+ setbits_be32(&ehci->control, REFSEL_16MHZ | UTMI_PHY_EN);
/* Wait for clock to stabilize */
do {
- temp = in_be32((void *)ehci->control);
+ temp = in_be32(&ehci->control);
udelay(1000);
} while (!(temp & PHY_CLK_VALID));
#endif
diff --git a/cpu/ppc4xx/4xx_pci.c b/cpu/ppc4xx/4xx_pci.c
index 31ca85dc55..4b5d636bd1 100644
--- a/cpu/ppc4xx/4xx_pci.c
+++ b/cpu/ppc4xx/4xx_pci.c
@@ -87,6 +87,20 @@ DECLARE_GLOBAL_DATA_PTR;
*/
int __pci_pre_init(struct pci_controller *hose)
{
+#if defined (CONFIG_405EP)
+ /*
+ * Enable the internal PCI arbiter by default.
+ *
+ * On 405EP CPUs the internal arbiter can be controlled
+ * by the I2C strapping EEPROM. If you want to do so
+ * or if you want to disable the arbiter pci_pre_init()
+ * must be reimplemented without enabling the arbiter.
+ * The arbiter is enabled in this place because of
+ * compatibility reasons.
+ */
+ mtdcr(cpc0_pci, mfdcr(cpc0_pci) | CPC0_PCI_ARBIT_EN);
+#endif /* CONFIG_405EP */
+
return 1;
}
int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init")));
@@ -323,8 +337,15 @@ void pci_405gp_init(struct pci_controller *hose)
}
#endif
-#if defined(CONFIG_405EP) /* on ppc405ep vendor id is not set */
- pci_write_config_word(PCIDEVID_405GP, PCI_VENDOR_ID, 0x1014); /* IBM */
+#if defined(CONFIG_405EP)
+ /*
+ * on ppc405ep vendor/device id is not set
+ * The user manual says 0x1014 (IBM) / 0x0156 (405GP!)
+ * are the correct values.
+ */
+ pci_write_config_word(PCIDEVID_405GP, PCI_VENDOR_ID, PCI_VENDOR_ID_IBM);
+ pci_write_config_word(PCIDEVID_405GP,
+ PCI_DEVICE_ID, PCI_DEVICE_ID_IBM_405GP);
#endif
/*
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index 577d33fead..bbd795de2a 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -174,11 +174,6 @@ cpu_init_f (void)
* Set EMAC noise filter bits
*/
mtdcr(cpc0_epctl, CPC0_EPRCSR_E0NFE | CPC0_EPRCSR_E1NFE);
-
- /*
- * Enable the internal PCI arbiter
- */
- mtdcr(cpc0_pci, mfdcr(cpc0_pci) | CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
#endif /* CONFIG_405EP */
#if defined(CONFIG_SYS_4xx_GPIO_TABLE)
diff --git a/cpu/sh2/u-boot.lds b/cpu/sh2/u-boot.lds
new file mode 100644
index 0000000000..6db5a00913
--- /dev/null
+++ b/cpu/sh2/u-boot.lds
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2008 Nobuhiro Iwamatsu
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ /*
+ * entry and reloct_dst will be provided via ldflags
+ */
+ . = .;
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ cpu/sh2/start.o (.text)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+ PROVIDE (__u_boot_cmd_start = .);
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ . = ALIGN(4);
+ }
+ PROVIDE (__u_boot_cmd_end = .);
+
+ PROVIDE (reloc_dst_end = .);
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (_end = .);
+}
diff --git a/cpu/sh3/u-boot.lds b/cpu/sh3/u-boot.lds
new file mode 100644
index 0000000000..1e55b832f5
--- /dev/null
+++ b/cpu/sh3/u-boot.lds
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * Copyright (C) 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * Copyright (C) 2008
+ * Mark Jonas <mark.jonas@de.bosch.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ /*
+ * entry and reloct_dst will be provided via ldflags
+ */
+ . = .;
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ cpu/sh3/start.o (.text)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+ PROVIDE (__u_boot_cmd_start = .);
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ . = ALIGN(4);
+ }
+ PROVIDE (__u_boot_cmd_end = .);
+
+ PROVIDE (reloc_dst_end = .);
+ /* _reloc_dst_end = .; */
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (_end = .);
+}
diff --git a/cpu/sh4/u-boot.lds b/cpu/sh4/u-boot.lds
new file mode 100644
index 0000000000..bff9f43c10
--- /dev/null
+++ b/cpu/sh4/u-boot.lds
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * Copyright (C) 2008-2009
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
+OUTPUT_ARCH(sh)
+ENTRY(_start)
+
+SECTIONS
+{
+ /*
+ * entry and reloct_dst will be provided via ldflags
+ */
+ . = .;
+
+ PROVIDE (_ftext = .);
+ PROVIDE (_fcode = .);
+ PROVIDE (_start = .);
+
+ .text :
+ {
+ cpu/sh4/start.o (.text)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenv)
+ . = ALIGN(8192);
+ common/env_embedded.o (.ppcenvr)
+ . = ALIGN(8192);
+ *(.text)
+ . = ALIGN(4);
+ } =0xFF
+ PROVIDE (_ecode = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ . = ALIGN(4);
+ }
+ PROVIDE (_etext = .);
+
+
+ PROVIDE (_fdata = .);
+ .data :
+ {
+ *(.data)
+ . = ALIGN(4);
+ }
+ PROVIDE (_edata = .);
+
+ PROVIDE (_fgot = .);
+ .got :
+ {
+ *(.got)
+ . = ALIGN(4);
+ }
+ PROVIDE (_egot = .);
+
+ PROVIDE (__u_boot_cmd_start = .);
+ .u_boot_cmd :
+ {
+ *(.u_boot_cmd)
+ . = ALIGN(4);
+ }
+ PROVIDE (__u_boot_cmd_end = .);
+
+ PROVIDE (reloc_dst_end = .);
+ /* _reloc_dst_end = .; */
+
+ PROVIDE (bss_start = .);
+ PROVIDE (__bss_start = .);
+ .bss (NOLOAD) :
+ {
+ *(.bss)
+ . = ALIGN(4);
+ }
+ PROVIDE (bss_end = .);
+
+ PROVIDE (_end = .);
+}
generated by cgit (git 2.34.1) at 2024-12-27 09:45:46 +0000