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-rw-r--r--cpu/microblaze/Makefile2
-rwxr-xr-x[-rw-r--r--]cpu/microblaze/cache.c17
-rw-r--r--cpu/microblaze/dcache.S68
-rw-r--r--cpu/microblaze/disable_int.S46
-rw-r--r--cpu/microblaze/enable_int.S38
-rw-r--r--cpu/microblaze/exception.c10
-rw-r--r--cpu/microblaze/icache.S69
-rwxr-xr-x[-rw-r--r--]cpu/microblaze/interrupts.c30
-rwxr-xr-x[-rw-r--r--]cpu/microblaze/irq.S7
-rw-r--r--cpu/microblaze/start.S33
-rw-r--r--cpu/microblaze/timer.c4
11 files changed, 88 insertions, 236 deletions
diff --git a/cpu/microblaze/Makefile b/cpu/microblaze/Makefile
index db1afa553d..9d542013cc 100644
--- a/cpu/microblaze/Makefile
+++ b/cpu/microblaze/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).a
START = start.o
-SOBJS = dcache.o icache.o irq.o disable_int.o enable_int.o
+SOBJS = irq.o
COBJS = cpu.o interrupts.o cache.o exception.o timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
index fc388ebb56..4f36a84ec4 100644..100755
--- a/cpu/microblaze/cache.c
+++ b/cpu/microblaze/cache.c
@@ -23,6 +23,7 @@
*/
#include <common.h>
+#include <asm/asm.h>
#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
@@ -45,4 +46,20 @@ int icache_status (void)
__asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
return i;
}
+
+void icache_enable (void) {
+ MSRSET(0x20);
+}
+
+void icache_disable(void) {
+ MSRCLR(0x20);
+}
+
+void dcache_enable (void) {
+ MSRSET(0x80);
+}
+
+void dcache_disable(void) {
+ MSRCLR(0x80);
+}
#endif
diff --git a/cpu/microblaze/dcache.S b/cpu/microblaze/dcache.S
deleted file mode 100644
index eaf96717eb..0000000000
--- a/cpu/microblaze/dcache.S
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
- .text
- .globl dcache_enable
- .ent dcache_enable
- .align 2
-dcache_enable:
- /* Make space on stack for a temporary */
- addi r1, r1, -4
- /* Save register r12 */
- swi r12, r1, 0
- /* Read the MSR register */
- mfs r12, rmsr
- /* Set the instruction enable bit */
- ori r12, r12, 0x80
- /* Save the MSR register */
- mts rmsr, r12
- /* Load register r12 */
- lwi r12, r1, 0
- /* Return */
- rtsd r15, 8
- /* Update stack in the delay slot */
- addi r1, r1, 4
- .end dcache_enable
-
- .text
- .globl dcache_disable
- .ent dcache_disable
- .align 2
-dcache_disable:
- /* Make space on stack for a temporary */
- addi r1, r1, -4
- /* Save register r12 */
- swi r12, r1, 0
- /* Read the MSR register */
- mfs r12, rmsr
- /* Clear the data cache enable bit */
- andi r12, r12, ~0x80
- /* Save the MSR register */
- mts rmsr, r12
- /* Load register r12 */
- lwi r12, r1, 0
- /* Return */
- rtsd r15, 8
- /* Update stack in the delay slot */
- addi r1, r1, 4
- .end dcache_disable
diff --git a/cpu/microblaze/disable_int.S b/cpu/microblaze/disable_int.S
deleted file mode 100644
index aecd79513c..0000000000
--- a/cpu/microblaze/disable_int.S
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
- .text
- .globl microblaze_disable_interrupts
- .ent microblaze_disable_interrupts
- .align 2
-microblaze_disable_interrupts:
- #Make space on stack for a temporary
- addi r1, r1, -4
- #Save register r12
- swi r12, r1, 0
- #Read the MSR register
- mfs r12, rmsr
- #Clear the interrupt enable bit
- andi r12, r12, ~2
- #Save the MSR register
- mts rmsr, r12
- #Load register r12
- lwi r12, r1, 0
- #Return
- rtsd r15, 8
- #Update stack in the delay slot
- addi r1, r1, 4
- .end microblaze_disable_interrupts
diff --git a/cpu/microblaze/enable_int.S b/cpu/microblaze/enable_int.S
deleted file mode 100644
index c096c6c3c0..0000000000
--- a/cpu/microblaze/enable_int.S
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstrmonstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
- .text
- .globl microblaze_enable_interrupts
- .ent microblaze_enable_interrupts
- .align 2
-microblaze_enable_interrupts:
- addi r1, r1, -4
- swi r12, r1, 0
- mfs r12, rmsr
- ori r12, r12, 2
- mts rmsr, r12
- lwi r12, r1, 0
- rtsd r15, 8
- addi r1, r1, 4
- .end microblaze_enable_interrupts
diff --git a/cpu/microblaze/exception.c b/cpu/microblaze/exception.c
index b135acbad9..d76b05a526 100644
--- a/cpu/microblaze/exception.c
+++ b/cpu/microblaze/exception.c
@@ -23,15 +23,16 @@
*/
#include <common.h>
+#include <asm/asm.h>
void _hw_exception_handler (void)
{
int address = 0;
int state = 0;
/* loading address of exception EAR */
- __asm__ __volatile ("mfs %0,rear"::"r" (address):"memory");
+ MFS (address, rear);
/* loading excetpion state register ESR */
- __asm__ __volatile ("mfs %0,resr"::"r" (state):"memory");
+ MFS (state, resr);
printf ("Hardware exception at 0x%x address\n", address);
switch (state & 0x1f) { /* mask on exception cause */
case 0x1:
@@ -49,6 +50,11 @@ void _hw_exception_handler (void)
case 0x5:
puts ("Divide by zero exception\n");
break;
+#ifdef MICROBLAZE_V5
+ case 0x1000:
+ puts ("Exception in delay slot\n");
+ break;
+#endif
default:
puts ("Undefined cause\n");
break;
diff --git a/cpu/microblaze/icache.S b/cpu/microblaze/icache.S
deleted file mode 100644
index 25940d106e..0000000000
--- a/cpu/microblaze/icache.S
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
- .text
- .globl icache_enable
- .ent icache_enable
- .align 2
-icache_enable:
- /* Make space on stack for a temporary */
- addi r1, r1, -4
- /* Save register r12 */
- swi r12, r1, 0
- /* Read the MSR register */
- mfs r12, rmsr
- /* Set the instruction enable bit */
- ori r12, r12, 0x20
- /* Save the MSR register */
- mts rmsr, r12
- /* Load register r12 */
- lwi r12, r1, 0
- /* Return */
- rtsd r15, 8
- /* Update stack in the delay slot */
- addi r1, r1, 4
- .end icache_enable
-
- .text
- .globl icache_disable
- .ent icache_disable
- .align 2
-icache_disable:
- /* Make space on stack for a temporary */
- addi r1, r1, -4
- /* Save register r12 */
- swi r12, r1, 0
- /* Read the MSR register */
- mfs r12, rmsr
- /* Clear the instruction enable bit */
- andi r12, r12, ~0x20
- /* Save the MSR register */
- mts rmsr, r12
- /* Load register r12 */
- lwi r12, r1, 0
- /* Return */
- rtsd r15, 8
- /* Update stack in the delay slot */
- addi r1, r1, 4
- .end icache_disable
diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c
index 2db847cd02..b61153f8e6 100644..100755
--- a/cpu/microblaze/interrupts.c
+++ b/cpu/microblaze/interrupts.c
@@ -27,6 +27,7 @@
#include <common.h>
#include <command.h>
#include <asm/microblaze_intc.h>
+#include <asm/asm.h>
#undef DEBUG_INT
@@ -35,12 +36,12 @@ extern void microblaze_enable_interrupts (void);
void enable_interrupts (void)
{
- microblaze_enable_interrupts ();
+ MSRSET(0x2);
}
int disable_interrupts (void)
{
- microblaze_disable_interrupts ();
+ MSRCLR(0x2);
return 0;
}
@@ -48,6 +49,10 @@ int disable_interrupts (void)
#ifdef CFG_TIMER_0
extern void timer_init (void);
#endif
+#ifdef CFG_FSL_2
+extern void fsl_init2 (void);
+#endif
+
static struct irq_action vecs[CFG_INTC_0_NUM];
@@ -106,7 +111,6 @@ void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, void *arg)
act->count = 0;
enable_one_interrupt (irq);
} else { /* disable */
-
act->handler = (interrupt_handler_t *) def_hdlr;
act->arg = (void *)irq;
disable_one_interrupt (irq);
@@ -141,18 +145,22 @@ int interrupts_init (void)
#ifdef CFG_TIMER_0
timer_init ();
#endif
+#ifdef CFG_FSL_2
+ fsl_init2 ();
+#endif
enable_interrupts ();
return 0;
}
void interrupt_handler (void)
{
- int irqs;
- irqs = (intc->isr & intc->ier); /* find active interrupt */
-
+ int irqs = (intc->isr & intc->ier); /* find active interrupt */
+ int i = 1;
#ifdef DEBUG_INT
+ int value;
printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
+ R14(value);
printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
#endif
struct irq_action *act = vecs;
@@ -165,15 +173,19 @@ void interrupt_handler (void)
#endif
act->handler (act->arg);
act->count++;
+ intc->iar = i;
+ return;
}
irqs >>= 1;
act++;
+ i <<= 1;
}
- intc->iar = 0xFFFFFFFF; /* erase all events */
-#ifdef DEBUG
+
+#ifdef DEBUG_INT
printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
intc->ier, intc->iar, intc->mer);
- printf ("Interrupt handler on %x line, r14\n", irqs);
+ R14(value);
+ printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
#endif
}
#endif
diff --git a/cpu/microblaze/irq.S b/cpu/microblaze/irq.S
index a4e3fbfad6..e1fc19046c 100644..100755
--- a/cpu/microblaze/irq.S
+++ b/cpu/microblaze/irq.S
@@ -23,6 +23,7 @@
*/
#include <config.h>
+#include <asm/asm.h>
.text
.global _interrupt_handler
_interrupt_handler:
@@ -151,6 +152,11 @@ _interrupt_handler:
addi r1, r1, 4
/* enable_interrupt */
+#ifdef XILINX_USE_MSR_INSTR
+ msrset r0, 2
+#else
+ /* FIXME unstable in stressed mode - two irqs */
+ nop
addi r1, r1, -4
swi r12, r1, 0
mfs r12, rmsr
@@ -159,6 +165,7 @@ _interrupt_handler:
lwi r12, r1, 0
addi r1, r1, 4
nop
+#endif
bra r14
nop
nop
diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index ca3befc24e..3c027ff9bb 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -117,3 +117,36 @@ clear_bss:
3: /* jumping to board_init */
brai board_init
1: bri 1b
+
+/*
+ * Read 16bit little endian
+ */
+ .text
+ .global in16
+ .ent in16
+ .align 2
+in16: lhu r3, r0, r5
+ bslli r4, r3, 8
+ bsrli r3, r3, 8
+ andi r4, r4, 0xffff
+ or r3, r3, r4
+ rtsd r15, 8
+ sext16 r3, r3
+ .end in16
+
+/*
+ * Write 16bit little endian
+ * first parameter(r5) - address, second(r6) - short value
+ */
+ .text
+ .global out16
+ .ent out16
+ .align 2
+out16: bslli r3, r6, 8
+ bsrli r6, r6, 8
+ andi r3, r3, 0xffff
+ or r3, r3, r6
+ sh r3, r0, r5
+ rtsd r15, 8
+ or r0, r0, r0
+ .end out16
diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c
index be4fd57cc4..ab1cb12749 100644
--- a/cpu/microblaze/timer.c
+++ b/cpu/microblaze/timer.c
@@ -24,6 +24,7 @@
#include <common.h>
#include <asm/microblaze_timer.h>
+#include <asm/microblaze_intc.h>
volatile int timestamp = 0;
@@ -44,9 +45,6 @@ void set_timer (ulong t)
#ifdef CFG_INTC_0
#ifdef CFG_TIMER_0
-extern void install_interrupt_handler (int irq, interrupt_handler_t * hdlr,
- void *arg);
-
microblaze_timer_t *tmr = (microblaze_timer_t *) (CFG_TIMER_0_ADDR);
void timer_isr (void *arg)
generated by cgit (git 2.34.1) at 2024-12-26 17:06:48 +0000