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Diffstat (limited to 'doc/README.fsl-esdhc')
| -rw-r--r-- | doc/README.fsl-esdhc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc index 7e71387576..29cc6619ea 100644 --- a/doc/README.fsl-esdhc +++ b/doc/README.fsl-esdhc @@ -20,5 +20,3 @@ Freescale esdhc-specific options - CONFIG_SYS_FSL_ESDHC_BE ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined by ESDHC IP's endian mode or processor's endian mode. - - - CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V. |