diff options
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/gpio/gpio-msm.txt | 3 | ||||
| -rw-r--r-- | doc/device-tree-bindings/i2c/nx_i2c.txt | 28 | ||||
| -rw-r--r-- | doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt | 78 | ||||
| -rw-r--r-- | doc/device-tree-bindings/serial/msm-serial.txt | 4 |
4 files changed, 112 insertions, 1 deletions
diff --git a/doc/device-tree-bindings/gpio/gpio-msm.txt b/doc/device-tree-bindings/gpio/gpio-msm.txt index 966ce0af09..70a2c7f0dd 100644 --- a/doc/device-tree-bindings/gpio/gpio-msm.txt +++ b/doc/device-tree-bindings/gpio/gpio-msm.txt @@ -1,7 +1,8 @@ Qualcomm Snapdragon GPIO controller Required properties: -- compatible : "qcom,msm8916-pinctrl" or "qcom,apq8016-pinctrl" +- compatible : "qcom,msm8916-pinctrl", "qcom,apq8016-pinctrl" or + "qcom,ipq4019-pinctrl" - reg : Physical base address and length of the controller's registers. This controller is called "Top Level Mode Multiplexing" in Qualcomm documentation. diff --git a/doc/device-tree-bindings/i2c/nx_i2c.txt b/doc/device-tree-bindings/i2c/nx_i2c.txt new file mode 100644 index 0000000000..9f3abe78e4 --- /dev/null +++ b/doc/device-tree-bindings/i2c/nx_i2c.txt @@ -0,0 +1,28 @@ +I2C controller embedded in Nexell's/Samsung's SoC S5P4418 and S5P6818 + +Driver: +- drivers/i2c/nx_i2c.c + +Required properties: +- #address-cells = <1>; +- #size-cells = <0>; +- compatible = "nexell,s5pxx18-i2c"; +- reg = <i2c_base 0x100>; + Where i2c_base has to be the base address of the i2c-register set. + I2C0: 0xc00a4000 + I2C1: 0xc00a5000 + I2C2: 0xc00a6000 + +Optional properties: +- clock-frequency: Desired I2C bus frequency in Hz, default value is 100000. +- i2c-sda-delay-ns (S5P6818 only): SDA delay in ns, default value is 0. +- Child nodes conforming to i2c bus binding. + +Example: + i2c0:i2c@c00a4000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nexell,s5pxx18-i2c"; + reg = <0xc00a4000 0x100>; + clock-frequency = <400000>; + }; diff --git a/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt new file mode 100644 index 0000000000..115ab53a4c --- /dev/null +++ b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt @@ -0,0 +1,78 @@ +Binding for Nexell s5pxx18 pin cotroller +======================================== + +Nexell's ARM bases SoC's integrates a GPIO and Pin mux/config hardware +controller. It controls the input/output settings on the available pads/pins +and also provides ability to multiplex and configure the output of various +on-chip controllers onto these pads. + +Please refer to pinctrl-bindings.txt in this directory for details of the +common pinctrl bindings used by client devices, including the meaning of the +phrase "pin configuration node". + + +Required properties: + - compatible: "nexell,s5pxx18-pinctrl" + - reg: should be register base and length as documented in the datasheet + - interrupts: interrupt specifier for the controller over gpio and alive pins + +Example: +pinctrl_0: pinctrl@c0010000 { + compatible = "nexell,s5pxx18-pinctrl"; + reg = <0xc0010000 0xf000>; + u-boot,dm-pre-reloc; +}; + +Nexell's pin configuration nodes act as a container for an arbitrary number of +subnodes. Each of these subnodes represents some desired configuration for a +pin, a group, or a list of pins or groups. This configuration can include the +mux function to select on those pin(s)/group(s), and various pin configuration +parameters. + + Child nodes must be set at least one of the following settings: + - pins = Select pins for using this function. + - pin-function = Select the function for use in a selected pin. + - pin-pull = Pull up/down configuration. + - pin-strength = Drive strength configuration. + + Valid values for nexell,pins are: + "gpioX-N" : X in {A,B,C,D,E}, N in {0-31} + Valid values for nexell,pin-function are: + "N" : N in {0-3}. + This setting means that the value is different for each pin. + Please refer to datasheet. + Valid values for nexell,pin-pull are: + "N" : 0 - Down, 1 - Up, 2 - Off + Valid values for nexell,pin-strength are: + "N" : 0,1,2,3 + + +Example: + - pin settings + mmc0_clk: mmc0-clk { + pins = "gpioa-29"; + pin-function = <1>; + pin-pull = <2>; + pin-strength = <2>; + }; + + mmc0_cmd: mmc0-cmd { + pins = "gpioa-31"; + pin-function = <1>; + pin-pull = <2>; + pin-strength = <1>; + }; + + mmc0_bus4: mmc0-bus-width4 { + pins = "gpiob-1, gpiob-3, gpiob-5, gpiob-7"; + pin-function = <1>; + pin-pull = <2>; + pin-strength = <1>; + }; + + - used by client devices + mmc0:mmc@... { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_clk>, <&mmc0_cmd>, <&mmc0_bus4>; + ... + }; diff --git a/doc/device-tree-bindings/serial/msm-serial.txt b/doc/device-tree-bindings/serial/msm-serial.txt index 48b8428aca..dca995798a 100644 --- a/doc/device-tree-bindings/serial/msm-serial.txt +++ b/doc/device-tree-bindings/serial/msm-serial.txt @@ -4,3 +4,7 @@ Required properties: - compatible: must be "qcom,msm-uartdm-v1.4" - reg: start address and size of the registers - clock: interface clock (must accept baudrate as a frequency) + +Optional properties: +- bit-rate: Data Mover bit rate register value + (If not defined then 0xCC is used as default) |