diff options
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/gpio/gpio-msm.txt | 22 | ||||
| -rw-r--r-- | doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 | ||||
| -rw-r--r-- | doc/device-tree-bindings/mmc/msm_sdhci.txt | 25 | ||||
| -rw-r--r-- | doc/device-tree-bindings/pmic/pm8916.txt | 18 | ||||
| -rw-r--r-- | doc/device-tree-bindings/serial/8250.txt | 2 | ||||
| -rw-r--r-- | doc/device-tree-bindings/serial/msm-serial.txt | 6 | ||||
| -rw-r--r-- | doc/device-tree-bindings/spi/spi-bus.txt | 2 | ||||
| -rw-r--r-- | doc/device-tree-bindings/spmi/spmi-msm.txt | 26 | ||||
| -rw-r--r-- | doc/device-tree-bindings/spmi/spmi-sandbox.txt | 31 | ||||
| -rw-r--r-- | doc/device-tree-bindings/usb/ehci-msm.txt | 10 |
10 files changed, 188 insertions, 2 deletions
diff --git a/doc/device-tree-bindings/gpio/gpio-msm.txt b/doc/device-tree-bindings/gpio/gpio-msm.txt new file mode 100644 index 0000000000..966ce0af09 --- /dev/null +++ b/doc/device-tree-bindings/gpio/gpio-msm.txt @@ -0,0 +1,22 @@ +Qualcomm Snapdragon GPIO controller + +Required properties: +- compatible : "qcom,msm8916-pinctrl" or "qcom,apq8016-pinctrl" +- reg : Physical base address and length of the controller's registers. + This controller is called "Top Level Mode Multiplexing" in + Qualcomm documentation. +- #gpio-cells : Should be one (pin number). +- gpio-controller : Marks the device node as a GPIO controller. +- gpio-count: Number of GPIO pins. +- gpio-bank-name: (optional) name of gpio bank. As default "soc" is used. + +Example: + +soc_gpios: pinctrl@1000000 { + compatible = "qcom,msm8916-pinctrl"; + reg = <0x1000000 0x300000>; + gpio-controller; + gpio-count = <122>; + gpio-bank-name="soc"; + #gpio-cells = <1>; +}; diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt b/doc/device-tree-bindings/gpio/pm8916_gpio.txt new file mode 100644 index 0000000000..58185b8335 --- /dev/null +++ b/doc/device-tree-bindings/gpio/pm8916_gpio.txt @@ -0,0 +1,48 @@ +Driver for part of pm8916 PMIC - gpio and power/reset keys + +This device should be child of SPMI pmic. + +1) GPIO driver + +Required properties: +- compatible: "qcom,pm8916-gpio" +- reg: peripheral ID, size of register block +- gpio-controller +- gpio-count: number of GPIOs +- #gpio-cells: 2 + +Optional properties: +- gpio-bank-name: name of bank (as default "pm8916" is used) + +Example: + +pmic_gpios: gpios@c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-count = <4>; + #gpio-cells = <2>; + gpio-bank-name="pmic"; +}; + + +2) Power/Reset key driver + +Required properties: +- compatible: "qcom,pm8916-pwrkey" +- reg: peripheral ID, size of register block +- gpio-controller +- #gpio-cells: 2 + +Optional properties: +- gpio-bank-name: name of bank (as default "pm8916_key" is used) + + +Example: + +pmic_pon: pon@800 { + compatible = "qcom,pm8916-pwrkey"; + reg = <0x800 0x96>; + #gpio-cells = <2>; + gpio-controller; +}; diff --git a/doc/device-tree-bindings/mmc/msm_sdhci.txt b/doc/device-tree-bindings/mmc/msm_sdhci.txt new file mode 100644 index 0000000000..08a290c669 --- /dev/null +++ b/doc/device-tree-bindings/mmc/msm_sdhci.txt @@ -0,0 +1,25 @@ +Qualcomm Snapdragon SDHCI controller + +Required properties: +- compatible : "qcom,sdhci-msm-v4" +- reg: Base address and length of registers: + - Host controller registers (SDHCI) + - SD Core registers +- clock: interface clock (must accept SD bus clock as a frequency) + +Optional properties: +- index: If there is more than one controller - controller index (required + by generic SDHCI code). +- bus_width: Width of SD/eMMC bus (default 4) +- clock-frequency: Frequency of SD/eMMC bus (default 400 kHz) + +Example: + +sdhci@07864000 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0x7864900 0x11c 0x7864000 0x800>; + index = <0x1>; + bus-width = <0x4>; + clock = <&clkc 1>; + clock-frequency = <200000000>; +}; diff --git a/doc/device-tree-bindings/pmic/pm8916.txt b/doc/device-tree-bindings/pmic/pm8916.txt new file mode 100644 index 0000000000..15c598b8c4 --- /dev/null +++ b/doc/device-tree-bindings/pmic/pm8916.txt @@ -0,0 +1,18 @@ +Qualcomm pm8916 PMIC + +This PMIC is connected using SPMI bus so should be child of SPMI bus controller. + +Required properties: +- compatible: "qcom,spmi-pmic"; +- reg: SPMI Slave ID, size (ignored) +- #address-cells: 0x1 (peripheral ID) +- #size-cells: 0x1 (size of peripheral register space) + +Example: + +pm8916@0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; +}; diff --git a/doc/device-tree-bindings/serial/8250.txt b/doc/device-tree-bindings/serial/8250.txt index 91d5ab0e60..ba8edae0ee 100644 --- a/doc/device-tree-bindings/serial/8250.txt +++ b/doc/device-tree-bindings/serial/8250.txt @@ -53,7 +53,7 @@ Note: Represents a single port that is compatible with the DUART found on many Freescale chips (examples include mpc8349, mpc8548, - mpc8641d, p4080 and ls2085a). + mpc8641d, p4080 and ls2080a). Example: diff --git a/doc/device-tree-bindings/serial/msm-serial.txt b/doc/device-tree-bindings/serial/msm-serial.txt new file mode 100644 index 0000000000..48b8428aca --- /dev/null +++ b/doc/device-tree-bindings/serial/msm-serial.txt @@ -0,0 +1,6 @@ +Qualcomm UART (Data Mover mode) + +Required properties: +- compatible: must be "qcom,msm-uartdm-v1.4" +- reg: start address and size of the registers +- clock: interface clock (must accept baudrate as a frequency) diff --git a/doc/device-tree-bindings/spi/spi-bus.txt b/doc/device-tree-bindings/spi/spi-bus.txt index 5c8720a820..420ec9529f 100644 --- a/doc/device-tree-bindings/spi/spi-bus.txt +++ b/doc/device-tree-bindings/spi/spi-bus.txt @@ -63,7 +63,7 @@ contain the following properties. a header byte before reading data from the slave. Some SPI controllers and devices support Dual and Quad SPI transfer mode. -It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD). +It allows data in SPI system transferred in 2 wires(DUAL) or 4 wires(QUAD). Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is only 1(SINGLE), 2(DUAL) and 4(QUAD). Dual/Quad mode is not allowed when 3-wire mode is used. diff --git a/doc/device-tree-bindings/spmi/spmi-msm.txt b/doc/device-tree-bindings/spmi/spmi-msm.txt new file mode 100644 index 0000000000..ae47673b76 --- /dev/null +++ b/doc/device-tree-bindings/spmi/spmi-msm.txt @@ -0,0 +1,26 @@ +Qualcomm SPMI arbiter/bus driver + +This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs. + +Required properties: +- compatible: "qcom,spmi-pmic-arb" +- reg: Register block adresses and sizes for various parts of device: + 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn) + 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS) + 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS) + +Optional properties (if not set by parent): +- #address-cells: 0x1 - childs slave ID address +- #size-cells: 0x1 + +All PMICs should be placed as a child nodes of bus arbiter. +Automatic detection of childs is currently not supported. + +Example: + +spmi@200f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>; + #address-cells = <0x1>; + #size-cells = <0x1>; +}; diff --git a/doc/device-tree-bindings/spmi/spmi-sandbox.txt b/doc/device-tree-bindings/spmi/spmi-sandbox.txt new file mode 100644 index 0000000000..8569a1a840 --- /dev/null +++ b/doc/device-tree-bindings/spmi/spmi-sandbox.txt @@ -0,0 +1,31 @@ +Sandbox SPMI emulated arbiter. + +This is bus driver for Sandbox. It includes part of emulated pm8916 pmic. + +Required properties: +- compatible: "sandbox,spmi" +- #address-cells: 0x1 - childs slave ID address +- #size-cells: 0x1 + +Example: + +spmi: spmi@0 { + compatible = "sandbox,spmi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + pm8916@0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + spmi_gpios: gpios@c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-count = <4>; + #gpio-cells = <2>; + gpio-bank-name="spmi"; + }; + }; +}; diff --git a/doc/device-tree-bindings/usb/ehci-msm.txt b/doc/device-tree-bindings/usb/ehci-msm.txt new file mode 100644 index 0000000000..205bb07220 --- /dev/null +++ b/doc/device-tree-bindings/usb/ehci-msm.txt @@ -0,0 +1,10 @@ +Chipidea EHCI controller (part of OTG controller) used on Qualcomm devices. + +Required properties: +- compatible: must be "qcom,ehci-host" +- reg: start address and size of the registers + +ehci@78d9000 { + compatible = "qcom,ehci-host"; + reg = <0x78d9000 0x400>; +}; |