diff options
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.ti-secure | 8 | ||||
| -rw-r--r-- | doc/device-tree-bindings/clock/st,stm32mp1.txt | 10 |
2 files changed, 11 insertions, 7 deletions
diff --git a/doc/README.ti-secure b/doc/README.ti-secure index 4b5380c0f3..76950253ac 100644 --- a/doc/README.ti-secure +++ b/doc/README.ti-secure @@ -108,7 +108,8 @@ Booting of U-Boot SPL Invoking the script for DRA7xx/AM57xx Secure Devices ==================================================== - create-boot-image.sh <IMAGE_TYPE> <INPUT_FILE> <OUTPUT_FILE> + create-boot-image.sh \ + <IMAGE_TYPE> <INPUT_FILE> <OUTPUT_FILE> <SPL_LOAD_ADDR> <IMAGE_TYPE> is a value that specifies the type of the image to generate OR the action the image generation tool will take. Valid @@ -116,7 +117,6 @@ Booting of U-Boot SPL X-LOADER - Generates an image for NOR or QSPI boot modes MLO - Generates an image for SD/MMC/eMMC boot modes ULO - Generates an image for USB/UART peripheral boot modes - Note: ULO is not yet used by the u-boot build process <INPUT_FILE> is the full path and filename of the public world boot loader binary file (for this platform, this is always u-boot-spl.bin). @@ -130,9 +130,13 @@ Booting of U-Boot SPL the device ROM bootloader requires for loading from the FAT partition of an SD card (same as on non-secure devices) + u-boot-spl_HS_ULO - boot image for USB/UART peripheral boot modes u-boot-spl_HS_X-LOADER - boot image for all other flash memories including QSPI and NOR flash + <SPL_LOAD_ADDR> is the address at which SOC ROM should load the + <INPUT_FILE> + Invoking the script for Keystone2 Secure Devices ============================================= diff --git a/doc/device-tree-bindings/clock/st,stm32mp1.txt b/doc/device-tree-bindings/clock/st,stm32mp1.txt index 6a9397e105..ffcf8cd31d 100644 --- a/doc/device-tree-bindings/clock/st,stm32mp1.txt +++ b/doc/device-tree-bindings/clock/st,stm32mp1.txt @@ -132,15 +132,15 @@ Optional Properties: frac = < 0x810 >; }; st,pll@1 { - cfg = < 1 43 1 0 0 PQR(0,1,1)>; - csg = <10 20 1>; + cfg = < 1 43 1 0 0 PQR(0,1,1) >; + csg = < 10 20 1 >; }; st,pll@2 { - cfg = < 2 85 3 13 3 0>; - csg = <10 20 SSCG_MODE_CENTER_SPREAD>; + cfg = < 2 85 3 13 3 0 >; + csg = < 10 20 SSCG_MODE_CENTER_SPREAD >; }; st,pll@3 { - cfg = < 2 78 4 7 9 3>; + cfg = < 2 78 4 7 9 3 >; }; st,pkcs = < CLK_STGEN_HSE |