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-rw-r--r--doc/README.bcmns374
-rw-r--r--doc/README.s5p441863
-rw-r--r--doc/device-tree-bindings/gpio/gpio-msm.txt3
-rw-r--r--doc/device-tree-bindings/i2c/nx_i2c.txt28
-rw-r--r--doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt78
-rw-r--r--doc/device-tree-bindings/serial/msm-serial.txt4
6 files changed, 249 insertions, 1 deletions
diff --git a/doc/README.bcmns3 b/doc/README.bcmns3
new file mode 100644
index 0000000000..c51f91471f
--- /dev/null
+++ b/doc/README.bcmns3
@@ -0,0 +1,74 @@
+BCMNS3 QSPI memory layout
+=========================
+
+BCMNS3 has total 8MB non-volatile SPI flash memory. It is used to store
+different images like fip.bin, nitro firmware, DDR shmo value and other backup
+images.
+
+Following is the QSPI flash memory layout.
+
+/* QSPI layout
+ * |---------------------------|->0x000000
+ * | |
+ * | |
+ * | fip.bin |
+ * | 2MB |
+ * | |
+ * ~ ~
+ * ~ ~
+ * | |
+ * | |
+ * | |
+ * |---------------------------|->0x200000
+ * | |
+ * | |
+ * | |
+ * | fip.bin (Mirror) |
+ * | 2MB |
+ * ~ ~
+ * ~ ~
+ * | |
+ * | |
+ * | |
+ * |---------------------------|->0x400000
+ * | |
+ * | Nitro NS3 Config |
+ * | 1.5M |
+ * | |
+ * ~ ~
+ * ~ ~
+ * | |
+ * |---------------------------|->0x580000
+ * | Nitro NS3 Config |
+ * | 1.5M |
+ * | (Mirror) |
+ * ~ ~
+ * ~ ~
+ * | |
+ * |---------------------------|->0x700000
+ * | Nitro NS3 bspd Config |
+ * | 64KB |
+ * ~ ~
+ * ~ ~
+ * | |
+ * |---------------------------|->0x710000
+ * | Nitro NS3 bspd Config |
+ * | 64KB |
+ * ~ (Mirror) ~
+ * ~ ~
+ * | |
+ * |---------------------------|->0x720000
+ * | SHMOO |
+ * | 64KB |
+ * | |
+ * ~ ~
+ * ~ ~
+ * |---------------------------|->0x730000
+ * | Meta Data |
+ * | 832KB |
+ * | |
+ * ~ ~
+ * ~ ~
+ * | |
+ * |---------------------------|
+ */
diff --git a/doc/README.s5p4418 b/doc/README.s5p4418
new file mode 100644
index 0000000000..ac724d08a0
--- /dev/null
+++ b/doc/README.s5p4418
@@ -0,0 +1,63 @@
+
+Summary
+=======
+
+This README is about U-Boot support for SAMSUNG's/NEXELL's ARM Cortex-A9 based
+S5P4418 SoC. It is based on FriendlyARM's U-Boot v2016.01 for the NanoPi2
+(and other) boards [1].
+
+Currently the following boards are supported:
+
+* FriendlyArm NanoPi2 [2]
+* FriendlyArm NanoPC-T2 [3]
+
+
+Build
+=====
+
+* NanoPi2 and NanoPC-T2
+
+make s5p4418_nanopi2_defconfig
+make
+
+
+Installation
+============
+
+- Download Official-ROMs-SDCard-20190718.7z from [4] (images files for android,
+ friendlyCore and LUbuntu)
+- Use s5p4418-sd-lubuntu-desktop-xenial-4.4-armhf-20190718.img to make a SD-card
+- Use dd in the directory where U-Boot has been built to update U-Boot:
+ (replace <SD-card> with the device used for the SD-card, e.g. sdc)
+ sudo dd seek=3841 if=u-boot.bin of=/dev/<SD-card>
+- Boot the board from this SD-card
+
+The source code for (the used?) LUbuntu 16.04 can be found at [5].
+
+
+Links
+=====
+
+[1] FriendlyArm U-boot v2016.01:
+
+https://github.com/friendlyarm/u-boot/tree/nanopi2-v2016.01
+
+
+[2] NanoPi2:
+
+http://wiki.friendlyarm.com/wiki/index.php/NanoPi_2
+
+
+[3] NanoPC-T2:
+
+http://wiki.friendlyarm.com/wiki/index.php/NanoPC-T2
+
+
+[4] FriendlyArm image files for NanoPi2:
+
+http://download.friendlyarm.com//NanoPi2
+
+
+[5] FriendlyArm LUbuntu 16.04 Source Code for NanoPi2:
+
+https://github.com/friendlyarm/linux/tree/nanopi2-v4.4.y
diff --git a/doc/device-tree-bindings/gpio/gpio-msm.txt b/doc/device-tree-bindings/gpio/gpio-msm.txt
index 966ce0af09..70a2c7f0dd 100644
--- a/doc/device-tree-bindings/gpio/gpio-msm.txt
+++ b/doc/device-tree-bindings/gpio/gpio-msm.txt
@@ -1,7 +1,8 @@
Qualcomm Snapdragon GPIO controller
Required properties:
-- compatible : "qcom,msm8916-pinctrl" or "qcom,apq8016-pinctrl"
+- compatible : "qcom,msm8916-pinctrl", "qcom,apq8016-pinctrl" or
+ "qcom,ipq4019-pinctrl"
- reg : Physical base address and length of the controller's registers.
This controller is called "Top Level Mode Multiplexing" in
Qualcomm documentation.
diff --git a/doc/device-tree-bindings/i2c/nx_i2c.txt b/doc/device-tree-bindings/i2c/nx_i2c.txt
new file mode 100644
index 0000000000..9f3abe78e4
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/nx_i2c.txt
@@ -0,0 +1,28 @@
+I2C controller embedded in Nexell's/Samsung's SoC S5P4418 and S5P6818
+
+Driver:
+- drivers/i2c/nx_i2c.c
+
+Required properties:
+- #address-cells = <1>;
+- #size-cells = <0>;
+- compatible = "nexell,s5pxx18-i2c";
+- reg = <i2c_base 0x100>;
+ Where i2c_base has to be the base address of the i2c-register set.
+ I2C0: 0xc00a4000
+ I2C1: 0xc00a5000
+ I2C2: 0xc00a6000
+
+Optional properties:
+- clock-frequency: Desired I2C bus frequency in Hz, default value is 100000.
+- i2c-sda-delay-ns (S5P6818 only): SDA delay in ns, default value is 0.
+- Child nodes conforming to i2c bus binding.
+
+Example:
+ i2c0:i2c@c00a4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nexell,s5pxx18-i2c";
+ reg = <0xc00a4000 0x100>;
+ clock-frequency = <400000>;
+ };
diff --git a/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt
new file mode 100644
index 0000000000..115ab53a4c
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt
@@ -0,0 +1,78 @@
+Binding for Nexell s5pxx18 pin cotroller
+========================================
+
+Nexell's ARM bases SoC's integrates a GPIO and Pin mux/config hardware
+controller. It controls the input/output settings on the available pads/pins
+and also provides ability to multiplex and configure the output of various
+on-chip controllers onto these pads.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+
+Required properties:
+ - compatible: "nexell,s5pxx18-pinctrl"
+ - reg: should be register base and length as documented in the datasheet
+ - interrupts: interrupt specifier for the controller over gpio and alive pins
+
+Example:
+pinctrl_0: pinctrl@c0010000 {
+ compatible = "nexell,s5pxx18-pinctrl";
+ reg = <0xc0010000 0xf000>;
+ u-boot,dm-pre-reloc;
+};
+
+Nexell's pin configuration nodes act as a container for an arbitrary number of
+subnodes. Each of these subnodes represents some desired configuration for a
+pin, a group, or a list of pins or groups. This configuration can include the
+mux function to select on those pin(s)/group(s), and various pin configuration
+parameters.
+
+ Child nodes must be set at least one of the following settings:
+ - pins = Select pins for using this function.
+ - pin-function = Select the function for use in a selected pin.
+ - pin-pull = Pull up/down configuration.
+ - pin-strength = Drive strength configuration.
+
+ Valid values for nexell,pins are:
+ "gpioX-N" : X in {A,B,C,D,E}, N in {0-31}
+ Valid values for nexell,pin-function are:
+ "N" : N in {0-3}.
+ This setting means that the value is different for each pin.
+ Please refer to datasheet.
+ Valid values for nexell,pin-pull are:
+ "N" : 0 - Down, 1 - Up, 2 - Off
+ Valid values for nexell,pin-strength are:
+ "N" : 0,1,2,3
+
+
+Example:
+ - pin settings
+ mmc0_clk: mmc0-clk {
+ pins = "gpioa-29";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <2>;
+ };
+
+ mmc0_cmd: mmc0-cmd {
+ pins = "gpioa-31";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <1>;
+ };
+
+ mmc0_bus4: mmc0-bus-width4 {
+ pins = "gpiob-1, gpiob-3, gpiob-5, gpiob-7";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <1>;
+ };
+
+ - used by client devices
+ mmc0:mmc@... {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_clk>, <&mmc0_cmd>, <&mmc0_bus4>;
+ ...
+ };
diff --git a/doc/device-tree-bindings/serial/msm-serial.txt b/doc/device-tree-bindings/serial/msm-serial.txt
index 48b8428aca..dca995798a 100644
--- a/doc/device-tree-bindings/serial/msm-serial.txt
+++ b/doc/device-tree-bindings/serial/msm-serial.txt
@@ -4,3 +4,7 @@ Required properties:
- compatible: must be "qcom,msm-uartdm-v1.4"
- reg: start address and size of the registers
- clock: interface clock (must accept baudrate as a frequency)
+
+Optional properties:
+- bit-rate: Data Mover bit rate register value
+ (If not defined then 0xCC is used as default)
generated by cgit (git 2.34.1) at 2025-01-18 08:00:27 +0000