diff options
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.AVR32-port-muxing | 4 | ||||
| -rw-r--r-- | doc/README.SNTP | 2 | ||||
| -rw-r--r-- | doc/README.Sandpoint8240 | 6 | ||||
| -rw-r--r-- | doc/README.at91 | 6 | ||||
| -rw-r--r-- | doc/README.ebony | 2 | ||||
| -rw-r--r-- | doc/README.fsl-ddr | 4 | ||||
| -rw-r--r-- | doc/README.mpc832xemds | 2 | ||||
| -rw-r--r-- | doc/README.mpc8360emds | 2 | ||||
| -rw-r--r-- | doc/README.mpc837xemds | 2 | ||||
| -rw-r--r-- | doc/README.mpc8544ds | 2 | ||||
| -rw-r--r-- | doc/README.mpc8572ds | 4 | ||||
| -rw-r--r-- | doc/README.mpc85xxads | 2 | ||||
| -rw-r--r-- | doc/README.mvbc_p | 2 | ||||
| -rw-r--r-- | doc/README.mvblm7 | 4 | ||||
| -rw-r--r-- | doc/README.mvsmr | 2 | ||||
| -rw-r--r-- | doc/README.ocotea | 2 | ||||
| -rw-r--r-- | doc/README.p2020rdb | 4 |
17 files changed, 26 insertions, 26 deletions
diff --git a/doc/README.AVR32-port-muxing b/doc/README.AVR32-port-muxing index b53799d338..8c1718cdca 100644 --- a/doc/README.AVR32-port-muxing +++ b/doc/README.AVR32-port-muxing @@ -91,7 +91,7 @@ of the flags are the same on all implementations. PORTMUX_DIR_OUTPUT PORTMUX_DIR_INPUT -These mutually-exlusive flags configure the initial direction of the +These mutually-exclusive flags configure the initial direction of the pins. PORTMUX_DIR_OUTPUT means that the pins are driven by the CPU, while PORTMUX_DIR_INPUT means that the pins are tristated by the CPU. These flags are ignored by portmux_select_peripheral(). @@ -125,7 +125,7 @@ PORTMUX_PULL_UP. PORTMUX_DRIVE_HIGH PORTMUX_DRIVE_MAX -These mutually-exlusive flags determine the drive strength of the +These mutually-exclusive flags determine the drive strength of the pins. PORTMUX_DRIVE_MIN will give low power-consumption, but may cause corruption of high-speed signals. PORTMUX_DRIVE_MAX will give high power-consumption, but may be necessary on pins toggling at very high diff --git a/doc/README.SNTP b/doc/README.SNTP index 9edc957c6f..da9ec459ad 100644 --- a/doc/README.SNTP +++ b/doc/README.SNTP @@ -6,7 +6,7 @@ syncronize RTC of the board. This command needs the command line parameter of server's IP address or environment variable "ntpserverip". The network time is sent as UTC. So if you want to set local time to RTC, set the offset in second from UTC to the -enviroment variable "time offset". +environment variable "time offset". If the DHCP server provides time server's IP or time offset, you don't need to set the above environment variables yourself. diff --git a/doc/README.Sandpoint8240 b/doc/README.Sandpoint8240 index a41b69aced..fa846dc33e 100644 --- a/doc/README.Sandpoint8240 +++ b/doc/README.Sandpoint8240 @@ -236,7 +236,7 @@ PART 10) => setenv serverip 192.168.0.10 => setenv gatewayip=192.168.0.1 => saveenv -Saving Enviroment to Flash... +Saving Environment to Flash... Un-Protected 1 sectors Erasing Flash... done @@ -296,7 +296,7 @@ Erase Flash Bank # 2 - missing => cp.b 0x100000 FFF00000 1f28c Copy to Flash... done => saveenv -Saving Enviroment to Flash... +Saving Environment to Flash... Un-Protected 1 sectors Erasing Flash... done @@ -330,7 +330,7 @@ Erase Flash from 0xfff00000 to 0xfff3ffff done Erased 7 sectors Copy to Flash... done -Saving Enviroment to Flash... +Saving Environment to Flash... Un-Protected 1 sectors Erasing Flash... done diff --git a/doc/README.at91 b/doc/README.at91 index 84b5595a92..b51df00da7 100644 --- a/doc/README.at91 +++ b/doc/README.at91 @@ -62,16 +62,16 @@ Environment variables U-Boot environment variables can be stored at different places: - Dataflash on SPI chip select 0 (dataflash card) - Nand flash. - - Nor falsh (not populate by default) + - Nor flash (not populate by default) You can choose your storage location at config step (here for at91sam9260ek) : make at91sam9263ek_config - use data flash (spi cs0) (default) make at91sam9263ek_nandflash_config - use nand flash make at91sam9263ek_dataflash_cs0_config - use data flash (spi cs0) - make at91sam9263ek_norflash_config - use nor falsh + make at91sam9263ek_norflash_config - use nor flash You can choose to boot directly from U-Boot at config step - make at91sam9263ek_norflash_boot_config - boot from nor falsh + make at91sam9263ek_norflash_boot_config - boot from nor flash ------------------------------------------------------------------------------ diff --git a/doc/README.ebony b/doc/README.ebony index a8479a4799..4df00b3561 100644 --- a/doc/README.ebony +++ b/doc/README.ebony @@ -4,7 +4,7 @@ ======================================================================= This file contains some handy info regarding U-Boot and the AMCC -Ebony evalutation board. See the README.ppc440 for additional +Ebony evaluation board. See the README.ppc440 for additional information. diff --git a/doc/README.fsl-ddr b/doc/README.fsl-ddr index 1d50153d58..5e21658765 100644 --- a/doc/README.fsl-ddr +++ b/doc/README.fsl-ddr @@ -250,7 +250,7 @@ print [c<n>] [d<n>] [spd] [dimmparms] [commonparms] [opts] [addresses] [regs] c<n> - the controller number, eg. c0, c1 d<n> - the DIMM number, eg. d0, d1 spd - print SPD data - dimmparms - DIMM paramaters, calcualted from SPD + dimmparms - DIMM parameters, calculated from SPD commonparms - lowest common parameters for all DIMMs opts - options addresses - address assignment (not implemented yet) @@ -260,7 +260,7 @@ edit <c#> <d#> <spd|dimmparms|commonparms|opts|addresses|regs> <element> <value> c<n> - the controller number, eg. c0, c1 d<n> - the DIMM number, eg. d0, d1 spd - print SPD data - dimmparms - DIMM paramaters, calcualted from SPD + dimmparms - DIMM parameters, calculated from SPD commonparms - lowest common parameters for all DIMMs opts - options addresses - address assignment (not implemented yet) diff --git a/doc/README.mpc832xemds b/doc/README.mpc832xemds index 688bdbb201..4142aa9c8d 100644 --- a/doc/README.mpc832xemds +++ b/doc/README.mpc832xemds @@ -15,7 +15,7 @@ Freescale MPC832XEMDS Board "On" == 0 SW3 is switch 18 as silk-screened onto the board. - SW4[8] is the bit labled 8 on Switch 4. + SW4[8] is the bit labeled 8 on Switch 4. SW5[1:6] refers to bits labeled 1 through 6 in order on switch 5. SW6[7:1] refers to bits labeled 7 through 1 in order on switch 6. SW7[1:8]= 0000_0001 refers to bits labeled 1 through 6 is set as "On" diff --git a/doc/README.mpc8360emds b/doc/README.mpc8360emds index 2b39160418..6afa753969 100644 --- a/doc/README.mpc8360emds +++ b/doc/README.mpc8360emds @@ -15,7 +15,7 @@ Freescale MPC8360EMDS Board "On" == 0 SW18 is switch 18 as silk-screened onto the board. - SW4[8] is the bit labled 8 on Switch 4. + SW4[8] is the bit labeled 8 on Switch 4. SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2. SW3[7:1] refers to bits labeled 7 through 1 in order on switch 3. SW3[1:8]= 0000_0001 refers to bits labeled 1 through 6 is set as "On" diff --git a/doc/README.mpc837xemds b/doc/README.mpc837xemds index aa767ae7d8..faf21c9ffb 100644 --- a/doc/README.mpc837xemds +++ b/doc/README.mpc837xemds @@ -14,7 +14,7 @@ Freescale MPC837xEMDS Board "Off" == 1 "On" == 0 - SW4[8] is the bit labled 8 on Switch 4. + SW4[8] is the bit labeled 8 on Switch 4. SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2. SW2[1:8]= 0000_0001 refers to bits labeled 1 through 7 is set as "On" and bits labeled 8 is set as "Off". diff --git a/doc/README.mpc8544ds b/doc/README.mpc8544ds index bf257a0054..b49c3c07c4 100644 --- a/doc/README.mpc8544ds +++ b/doc/README.mpc8544ds @@ -22,7 +22,7 @@ boot bank at 0xfff8_0000. Memory Map ---------- -0xff80_0000 - 0xffbf_ffff Alernate bank 4MB +0xff80_0000 - 0xffbf_ffff Alternate bank 4MB 0xffc0_0000 - 0xffff_ffff Boot bank 4MB 0xffb8_0000 Alternate image start 512KB diff --git a/doc/README.mpc8572ds b/doc/README.mpc8572ds index 06dab596be..57fd2ad616 100644 --- a/doc/README.mpc8572ds +++ b/doc/README.mpc8572ds @@ -19,7 +19,7 @@ Booting is always from the boot bank at 0xec00_0000. Memory Map ---------- -0xe800_0000 - 0xebff_ffff Alernate bank 64MB +0xe800_0000 - 0xebff_ffff Alternate bank 64MB 0xec00_0000 - 0xefff_ffff Boot bank 64MB 0xebf8_0000 - 0xebff_ffff Alternate u-boot address 512KB @@ -115,7 +115,7 @@ Implementing AMP(Asymmetric MultiProcessing) - Select "Advanced setup" -> " Prompt for advanced kernel configuration options" - Select "Set physical address where the kernel is loaded" and - set it to 0x20000000, asssuming core1 will start from 512MB. + set it to 0x20000000, assuming core1 will start from 512MB. - Select "Set custom page offset address" - Select "Set custom kernel base address" - Select "Set maximum low memory" diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads index d059a97981..28bbcbe095 100644 --- a/doc/README.mpc85xxads +++ b/doc/README.mpc85xxads @@ -35,7 +35,7 @@ Updated 13-July-2004 Jon Loeliger "On" == 0 SW18 is switch 18 as silk-screened onto the board. - SW4[8] is the bit labled 8 on Switch 4. + SW4[8] is the bit labeled 8 on Switch 4. SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2 SW3[7:1] refers to bits labeled 7 through 1 in order on switch 3 diff --git a/doc/README.mvbc_p b/doc/README.mvbc_p index e3fcb4eb1b..a691137550 100644 --- a/doc/README.mvbc_p +++ b/doc/README.mvbc_p @@ -33,7 +33,7 @@ Matrix Vision mvBlueCOUGAR-P (mvBC-P) 2.4 I2C LM75 @ 0x90 for temperature monitoring. EEPROM @ 0xA0 for vendor specifics. - image sensor interface (slave adresses depend on sensor) + image sensor interface (slave addresses depend on sensor) 3 Flash layout. diff --git a/doc/README.mvblm7 b/doc/README.mvblm7 index 3ee9396540..a0686f7fa5 100644 --- a/doc/README.mvblm7 +++ b/doc/README.mvblm7 @@ -40,10 +40,10 @@ Matrix Vision mvBlueLYNX-M7 (mvBL-M7) MAX5381 DAC @ 0x60 for 1st digital input threshold. LM75 @ 0x90 for temperature monitoring. EEPROM @ 0xA0 for system setup (HRCW etc.) + vendor specifics. - 1st image sensor interface (slave adresses depend on sensor) + 1st image sensor interface (slave addresses depend on sensor) Bus2: MAX5381 DAC @ 0x60 for 2nd digital input threshold. - 2nd image sensor interface (slave adresses depend on sensor) + 2nd image sensor interface (slave addresses depend on sensor) 3 Flash layout. diff --git a/doc/README.mvsmr b/doc/README.mvsmr index d729ea6fbe..8e34cb7838 100644 --- a/doc/README.mvsmr +++ b/doc/README.mvsmr @@ -23,7 +23,7 @@ Matrix Vision mvSMR 2.4 I2C EEPROM @ 0xA0 for vendor specifics. - image sensor interface (slave adresses depend on sensor) + image sensor interface (slave addresses depend on sensor) 3 Flash layout. diff --git a/doc/README.ocotea b/doc/README.ocotea index 9ac3a184cb..be79b03c8a 100644 --- a/doc/README.ocotea +++ b/doc/README.ocotea @@ -4,7 +4,7 @@ ======================================================================= This file contains some handy info regarding U-Boot and the AMCC -Ocotea 440gx evalutation board. See the README.ppc440 for additional +Ocotea 440gx evaluation board. See the README.ppc440 for additional information. diff --git a/doc/README.p2020rdb b/doc/README.p2020rdb index 8a2302fa99..cb664a5bd7 100644 --- a/doc/README.p2020rdb +++ b/doc/README.p2020rdb @@ -17,7 +17,7 @@ Booting by default is always from the boot bank at 0xef00_0000. Memory Map ---------- -0xef00_0000 - 0xef7f_ffff Alernate bank 8MB +0xef00_0000 - 0xef7f_ffff Alternate bank 8MB 0xe800_0000 - 0xefff_ffff Boot bank 8MB 0xef78_0000 - 0xef7f_ffff Alternate u-boot address 512KB @@ -89,7 +89,7 @@ Implementing AMP(Asymmetric MultiProcessing) "Prompt for advanced kernel configuration options" - Select "Set physical address where the kernel is loaded" - and set it to 0x20000000, asssuming core1 will + and set it to 0x20000000, assuming core1 will start from 512MB. - Select "Set custom page offset address" - Select "Set custom kernel base address" |