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-rw-r--r--doc/README.at9184
-rw-r--r--doc/README.b4860qds4
-rw-r--r--doc/README.fsl_iim48
-rw-r--r--doc/README.fuse67
-rw-r--r--doc/README.imx2510
-rw-r--r--doc/README.imx2710
-rw-r--r--doc/README.imx56
-rw-r--r--doc/README.imx610
-rw-r--r--doc/README.imximage18
-rw-r--r--doc/README.mxc_ocotp51
-rw-r--r--doc/README.omap-reset-time20
-rw-r--r--doc/README.scrapyard1
-rw-r--r--doc/README.t4240qds26
-rw-r--r--doc/README.vf61010
-rw-r--r--doc/device-tree-bindings/video/simple-framebuffer.txt25
15 files changed, 370 insertions, 20 deletions
diff --git a/doc/README.at91 b/doc/README.at91
index b51df00da7..67412136ee 100644
--- a/doc/README.at91
+++ b/doc/README.at91
@@ -1,6 +1,9 @@
Atmel AT91 Evaluation kits
-http://atmel.com/dyn/products/tools.asp?family_id=605#1443
+Index
+ - I. Board mapping & boot media
+ - II. NAND partition table
+ - III. watchdog support
I. Board mapping & boot media
------------------------------------------------------------------------------
@@ -10,7 +13,7 @@ AT91SAM9260EK, AT91SAM9G20EK & AT91SAM9XEEK
Memory map
0x20000000 - 23FFFFFF SDRAM (64 MB)
0xC0000000 - Cxxxxxxx Atmel Dataflash card (J13)
- 0xD0000000 - Dxxxxxxx Soldered Atmel Dataflash
+ 0xD0000000 - D07FFFFF Soldered Atmel Dataflash (AT45DB642)
Environment variables
@@ -20,7 +23,6 @@ Environment variables
- Nand flash.
You can choose your storage location at config step (here for at91sam9260ek) :
- make at91sam9260ek_config - use data flash (spi cs1) (default)
make at91sam9260ek_nandflash_config - use nand flash
make at91sam9260ek_dataflash_cs0_config - use data flash (spi cs0)
make at91sam9260ek_dataflash_cs1_config - use data flash (spi cs1)
@@ -32,7 +34,7 @@ AT91SAM9261EK, AT91SAM9G10EK
Memory map
0x20000000 - 23FFFFFF SDRAM (64 MB)
- 0xC0000000 - Cxxxxxxx Soldered Atmel Dataflash
+ 0xC0000000 - C07FFFFF Soldered Atmel Dataflash (AT45DB642)
0xD0000000 - Dxxxxxxx Atmel Dataflash card (J22)
Environment variables
@@ -43,7 +45,6 @@ Environment variables
- Nand flash.
You can choose your storage location at config step (here for at91sam9260ek) :
- make at91sam9261ek_config - use data flash (spi cs0) (default)
make at91sam9261ek_nandflash_config - use nand flash
make at91sam9261ek_dataflash_cs0_config - use data flash (spi cs0)
make at91sam9261ek_dataflash_cs3_config - use data flash (spi cs3)
@@ -65,7 +66,6 @@ Environment variables
- Nor flash (not populate by default)
You can choose your storage location at config step (here for at91sam9260ek) :
- make at91sam9263ek_config - use data flash (spi cs0) (default)
make at91sam9263ek_nandflash_config - use nand flash
make at91sam9263ek_dataflash_cs0_config - use data flash (spi cs0)
make at91sam9263ek_norflash_config - use nor flash
@@ -79,19 +79,15 @@ AT91SAM9M10G45EK
------------------------------------------------------------------------------
Memory map
- 0x20000000 - 23FFFFFF SDRAM (64 MB)
- 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J12)
+ 0x70000000 - 77FFFFFF SDRAM (128 MB)
Environment variables
U-Boot environment variables can be stored at different places:
- - Dataflash on SPI chip select 0 (dataflash card)
- Nand flash.
You can choose your storage location at config step (here for at91sam9m10g45ek) :
- make at91sam9m10g45ek_config - use data flash (spi cs0) (default)
make at91sam9m10g45ek_nandflash_config - use nand flash
- make at91sam9m10g45ek_dataflash_cs0_config - use data flash (spi cs0)
------------------------------------------------------------------------------
@@ -100,7 +96,7 @@ AT91SAM9RLEK
Memory map
0x20000000 - 23FFFFFF SDRAM (64 MB)
- 0xC0000000 - Cxxxxxxx Soldered Atmel Dataflash
+ 0xC0000000 - C07FFFFF Soldered Atmel Dataflash (AT45DB642)
Environment variables
@@ -108,12 +104,66 @@ Environment variables
- Dataflash on SPI chip select 0
- Nand flash.
- You can choose your storage location at config step (here for at91sam9260ek) :
- make at91sam9263ek_config - use data flash (spi cs0) (default)
- make at91sam9263ek_nandflash_config - use nand flash
- make at91sam9263ek_dataflash_cs0_config - use data flash (spi cs0)
+ You can choose your storage location at config step (here for at91sam9rlek) :
+ make at91sam9rlek_nandflash_config - use nand flash
+
+
+------------------------------------------------------------------------------
+AT91SAM9N12EK, AT91SAM9X5EK
+------------------------------------------------------------------------------
+
+Memory map
+ 0x20000000 - 27FFFFFF SDRAM (128 MB)
+
+Environment variables
+
+ U-Boot environment variables can be stored at different places:
+ - Nand flash.
+ - SD/MMC card
+ - Serialflash/Dataflash on SPI chip select 0
+
+ You can choose your storage location at config step (here for at91sam9x5ek) :
+ make at91sam9x5ek_dataflash_config - use data flash
+ make at91sam9x5ek_mmc_config - use sd/mmc card
+ make at91sam9x5ek_nandflash_config - use nand flash
+ make at91sam9x5ek_spiflash_config - use serial flash
+
+
+------------------------------------------------------------------------------
+SAMA5D3XEK
+------------------------------------------------------------------------------
+
+Memory map
+ 0x20000000 - 3FFFFFFF SDRAM (512 MB)
+
+Environment variables
+
+ U-Boot environment variables can be stored at different places:
+ - Nand flash.
+ - SD/MMC card
+ - Serialflash on SPI chip select 0
+
+ You can choose your storage location at config step (here for sama5d3xek) :
+ make sama5d3xek_mmc_config - use SD/MMC card
+ make sama5d3xek_nandflash_config - use nand flash
+ make sama5d3xek_serialflash_config - use serial flash
+
+
+II. NAND partition table
+
+ All the board support boot from NAND flash will use the following NAND
+ partition table
+
+ 0x00000000 - 0x0003FFFF bootstrap (256 KiB)
+ 0x00040000 - 0x000BFFFF u-boot (512 KiB)
+ 0x000C0000 - 0x000FFFFF env (256 KiB)
+ 0x00100000 - 0x0013FFFF env_redundant (256 KiB)
+ 0x00140000 - 0x0017FFFF spare (256 KiB)
+ 0x00180000 - 0x001FFFFF dtb (512 KiB)
+ 0x00200000 - 0x007FFFFF kernel (6 MiB)
+ 0x00800000 - 0xxxxxxxxx rootfs (All left)
-II. Watchdog support
+III. Watchdog support
For security reasons, the at91 watchdog is running at boot time and,
if deactivated, cannot be used anymore.
diff --git a/doc/README.b4860qds b/doc/README.b4860qds
index f6c5ff8e9c..bd10a6df04 100644
--- a/doc/README.b4860qds
+++ b/doc/README.b4860qds
@@ -185,7 +185,7 @@ Start Address End Address Description Size
0xF_A0C0_0000 0xF_DFFF_FFFF Free 1012 MB
0xF_A000_0000 0xF_A0BF_FFFF MAPLE0/1/2 12 MB
0xF_0040_0000 0xF_9FFF_FFFF Free 12 GB
-0xF_0000_0000 0xF_003F_FFFF DCSR 4 MB
+0xF_0000_0000 0xF_01FF_FFFF DCSR 32 MB
0xC_4000_0000 0xE_FFFF_FFFF Free 11 GB
0xC_3000_0000 0xC_3FFF_FFFF sRIO-2 I/O 256 MB
0xC_2000_0000 0xC_2FFF_FFFF sRIO-1 I/O 256 MB
@@ -215,7 +215,7 @@ Start Address End Address Description Size
0xF_A0C0_0000 0xF_DFFF_FFFF Free 1012 MB
0xF_A000_0000 0xF_A0BF_FFFF MAPLE0/1/2 12 MB
0xF_0040_0000 0xF_9FFF_FFFF Free 12 GB
-0xF_0000_0000 0xF_003F_FFFF DCSR 4 MB
+0xF_0000_0000 0xF_01FF_FFFF DCSR 32 MB
0xC_4000_0000 0xE_FFFF_FFFF Free 11 GB
0xC_3000_0000 0xC_3FFF_FFFF sRIO-2 I/O 256 MB
0xC_2000_0000 0xC_2FFF_FFFF sRIO-1 I/O 256 MB
diff --git a/doc/README.fsl_iim b/doc/README.fsl_iim
new file mode 100644
index 0000000000..e087f5e0e4
--- /dev/null
+++ b/doc/README.fsl_iim
@@ -0,0 +1,48 @@
+Driver implementing the fuse API for Freescale's IC Identification Module (IIM)
+
+This IP can be found on the following SoCs:
+ - MPC512x,
+ - i.MX25,
+ - i.MX27,
+ - i.MX31,
+ - i.MX35,
+ - i.MX51,
+ - i.MX53.
+
+The section numbers in this file refer to the i.MX25 Reference Manual.
+
+A fuse word contains 8 fuse bit slots, as explained in 30.4.2.2.1.
+
+A bank contains 256 fuse word slots, as shown by the memory map in 30.3.1.
+
+Some fuse bit or word slots may not have the corresponding fuses actually
+implemented in the fusebox.
+
+See the README files of the SoCs using this driver in order to know the
+conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
+addresses.
+
+Fuse operations:
+
+ Read
+ Read operations are implemented as read accesses to the shadow registers,
+ using "Word y of Bank x" from the register summary in 30.3.2. This is
+ explained in detail in 30.4.5.1.
+
+ Sense
+ Sense operations are implemented as explained in 30.4.5.2.
+
+ Program
+ Program operations are implemented as explained in 30.4.5.3. Following
+ this operation, the shadow registers are reloaded by the hardware (not
+ immediately, but this does not make any difference for a user reading
+ these registers).
+
+ Override
+ Override operations are implemented as write accesses to the shadow
+ registers, as explained in 30.4.5.4.
+
+Configuration:
+
+ CONFIG_FSL_IIM
+ Define this to enable the fsl_iim driver.
diff --git a/doc/README.fuse b/doc/README.fuse
new file mode 100644
index 0000000000..1bc91c44a6
--- /dev/null
+++ b/doc/README.fuse
@@ -0,0 +1,67 @@
+Fuse API functions and commands
+
+The fuse API allows to control a fusebox and how it is used by the upper
+hardware layers.
+
+A fuse corresponds to a single non-volatile memory bit that can be programmed
+(i.e. blown, set to 1) only once. The programming operation is irreversible. A
+fuse that has not been programmed reads 0.
+
+Fuses can be used by SoCs to store various permanent configuration and data,
+e.g. boot configuration, security configuration, MAC addresses, etc.
+
+A fuse word is the smallest group of fuses that can be read at once from the
+fusebox control IP registers. This is limited to 32 bits with the current API.
+
+A fuse bank is the smallest group of fuse words having a common ID, as defined
+by each SoC.
+
+Upon startup, the fusebox control IP reads the fuse values and stores them to a
+volatile shadow cache.
+
+See the README files of the drivers implementing this API in order to know the
+SoC- and implementation-specific details.
+
+Functions / commands:
+
+ int fuse_read(u32 bank, u32 word, u32 *val);
+ fuse read <bank> <word> [<cnt>]
+ Read fuse words from the shadow cache.
+
+ int fuse_sense(u32 bank, u32 word, u32 *val);
+ fuse sense <bank> <word> [<cnt>]
+ Sense - i.e. read directly from the fusebox, skipping the shadow cache -
+ fuse words. This operation does not update the shadow cache.
+
+ This is useful to know the true value of fuses if an override has been
+ performed (see below).
+
+ int fuse_prog(u32 bank, u32 word, u32 val);
+ fuse prog [-y] <bank> <word> <hexval> [<hexval>...]
+ Program fuse words. This operation directly affects the fusebox and is
+ irreversible. The shadow cache is updated accordingly or not, depending on
+ each IP.
+
+ Only the bits to be programmed should be set in the input value (i.e. for
+ fuse bits that have already been programmed and hence should be left
+ unchanged by a further programming, it is preferable to clear the
+ corresponding bits in the input value in order not to perform a new
+ hardware programming operation on these fuse bits).
+
+ int fuse_override(u32 bank, u32 word, u32 val);
+ fuse override <bank> <word> <hexval> [<hexval>...]
+ Override fuse words in the shadow cache.
+
+ The fusebox is unaffected, so following this operation, the shadow cache
+ may differ from the fusebox values. Read or sense operations can then be
+ used to get the values from the shadow cache or from the fusebox.
+
+ This is useful to change the behaviors linked to some cached fuse values,
+ either because this is needed only temporarily, or because some of the
+ fuses have already been programmed or are locked (if the SoC allows to
+ override a locked fuse).
+
+Configuration:
+
+ CONFIG_CMD_FUSE
+ Define this to enable the fuse commands.
diff --git a/doc/README.imx25 b/doc/README.imx25
new file mode 100644
index 0000000000..0ca21b6dfe
--- /dev/null
+++ b/doc/README.imx25
@@ -0,0 +1,10 @@
+U-Boot for Freescale i.MX25
+
+This file contains information for the port of U-Boot to the Freescale i.MX25
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in the words 26 to 31 of fuse bank 0, using the
+ natural MAC byte order (i.e. MSB first).
diff --git a/doc/README.imx27 b/doc/README.imx27
new file mode 100644
index 0000000000..6f92cb47ce
--- /dev/null
+++ b/doc/README.imx27
@@ -0,0 +1,10 @@
+U-Boot for Freescale i.MX27
+
+This file contains information for the port of U-Boot to the Freescale i.MX27
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in the words 4 to 9 of fuse bank 0, using the
+ reversed MAC byte order (i.e. LSB first).
diff --git a/doc/README.imx5 b/doc/README.imx5
index e08941e2ae..c5312b69d3 100644
--- a/doc/README.imx5
+++ b/doc/README.imx5
@@ -20,3 +20,9 @@ i.MX5x SoCs.
This option should be enabled for boards having a SYS_ON_OFF_CTL signal
connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
reference designs.
+
+2. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+2.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the
+ natural MAC byte order (i.e. MSB first).
diff --git a/doc/README.imx6 b/doc/README.imx6
new file mode 100644
index 0000000000..513a06ee86
--- /dev/null
+++ b/doc/README.imx6
@@ -0,0 +1,10 @@
+U-Boot for Freescale i.MX6
+
+This file contains information for the port of U-Boot to the Freescale i.MX6
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in fuse bank 4, with the 32 lsbs in word 2 and the
+ 16 msbs in word 3.
diff --git a/doc/README.imximage b/doc/README.imximage
index 073e3fcb3c..802eb90f1d 100644
--- a/doc/README.imximage
+++ b/doc/README.imximage
@@ -65,9 +65,27 @@ Configuration command line syntax:
This command need appear the fist before
other valid commands in configuration file.
+ BOOT_OFFSET value
+
+ This command is parallel to BOOT_FROM and
+ is preferred over BOOT_FROM.
+
+ value: Offset of the image header, this
+ value shall be set to one of the
+ values found in the file:
+ arch/arm/include/asm/\
+ imx-common/imximage.cfg
+ Example:
+ BOOT_OFFSET FLASH_OFFSET_STANDARD
+
BOOT_FROM nand/spi/sd/onenand/nor/sata
+
+ This command is parallel to BOOT_OFFSET and
+ is to be deprecated in favor of BOOT_OFFSET.
+
Example:
BOOT_FROM spi
+
DATA type address value
type: word=4, halfword=2, byte=1
diff --git a/doc/README.mxc_ocotp b/doc/README.mxc_ocotp
new file mode 100644
index 0000000000..7a2863cfd2
--- /dev/null
+++ b/doc/README.mxc_ocotp
@@ -0,0 +1,51 @@
+Driver implementing the fuse API for Freescale's On-Chip OTP Controller (OCOTP)
+on MXC
+
+This IP can be found on the following SoCs:
+ - Vybrid VF610,
+ - i.MX6.
+
+Note that this IP is different from albeit similar to the IPs of the same name
+that can be found on the following SoCs:
+ - i.MX23,
+ - i.MX28,
+ - i.MX50.
+
+The section numbers in this file refer to the i.MX6 Reference Manual.
+
+A fuse word contains 32 fuse bit slots, as explained in 46.2.1.
+
+A bank contains 8 fuse word slots, as explained in 46.2.1 and shown by the
+memory map in 46.4.
+
+Some fuse bit or word slots may not have the corresponding fuses actually
+implemented in the fusebox.
+
+See the README files of the SoCs using this driver in order to know the
+conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
+addresses.
+
+Fuse operations:
+
+ Read
+ Read operations are implemented as read accesses to the shadow registers,
+ using "Bankx Wordy" from the memory map in 46.4. This is explained in
+ detail by the first two paragraphs in 46.2.1.2.
+
+ Sense
+ Sense operations are implemented as the direct fusebox read explained by
+ the steps in 46.2.1.2.
+
+ Program
+ Program operations are implemented as explained by the steps in 46.2.1.3.
+ Following this operation, the shadow registers are not reloaded by the
+ hardware.
+
+ Override
+ Override operations are implemented as write accesses to the shadow
+ registers, as explained by the first paragraph in 46.2.1.3.
+
+Configuration:
+
+ CONFIG_MXC_OCOTP
+ Define this to enable the mxc_ocotp driver.
diff --git a/doc/README.omap-reset-time b/doc/README.omap-reset-time
new file mode 100644
index 0000000000..0c974bacae
--- /dev/null
+++ b/doc/README.omap-reset-time
@@ -0,0 +1,20 @@
+README on how reset time on OMAPs should be calculated
+
+CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC:
+Most OMAPs' provide a way to specify the time for
+which the reset should be held low while the voltages
+and Oscillator outputs stabilize.
+
+This time is mostly board and PMIC dependent. Hence the
+boards are expected to specify a pre-computed time
+using the above option, (the details on how to compute
+the value are given below) without which a default time
+as specified by CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC
+is used.
+
+The value for CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC
+can be computed using a summation of the below 3 parameters
+-1- Time taken by the Osciallator to stop and restart
+-2- PMIC OTP time
+-3- Voltage ramp time, which can be derived using the
+PMIC slew rate and value of voltage ramp needed.
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 9223f6e436..a0f1fa30f8 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -96,3 +96,4 @@ R5200 ColdFire - 48ead7a 2008-03-31 Zachary P. L
CPCI440 powerpc 440GP b568fd2 2007-12-27 Matthias Fuchs <matthias.fuchs@esd-electronics.com>
PCIPPC2 powerpc MPC740/MPC750 7c9e89b 2013-02-07 Wolfgang Denk <wd@denx.de>
PCIPPC6 powerpc MPC740/MPC750 - - Wolfgang Denk <wd@denx.de>
+omap2420h4 arm omap24xx - 2013-06-04 Richard Woodruff <r-woodruff2@ti.com>
diff --git a/doc/README.t4240qds b/doc/README.t4240qds
index 677d120a80..a9841fb5f7 100644
--- a/doc/README.t4240qds
+++ b/doc/README.t4240qds
@@ -86,7 +86,7 @@ The addresses in brackets are physical addresses.
0x0_0000_0000 (0x0_0000_0000) - 0x0_7fff_ffff 2GB DDR (more than 2GB is initialized but not mapped under with TLB)
0x0_8000_0000 (0xc_0000_0000) - 0x0_dfff_ffff 1.5GB PCIE memory
-0x0_f000_0000 (0xf_0000_0000) - 0x0_f03f_ffff 4MB DCSR
+0x0_f000_0000 (0xf_0000_0000) - 0x0_f1ff_ffff 32MB DCSR (includes trace buffers)
0x0_f400_0000 (0xf_f400_0000) - 0x0_f5ff_ffff 32MB BMan
0x0_f600_0000 (0xf_f600_0000) - 0x0_f7ff_ffff 32MB QMan
0x0_f800_0000 (0xf_f800_0000) - 0x0_f803_ffff 256KB PCIE IO
@@ -96,3 +96,27 @@ The addresses in brackets are physical addresses.
0x0_ffff_f000 (0x0_7fff_fff0) - 0x0_ffff_ffff 4KB Boot page translation for secondary cores
The physical address of the last (boot page translation) varies with the actual DDR size.
+
+Voltage ID and VDD override
+--------------------
+T4240 has a VID feature. U-boot reads the VID efuses and adjust the voltage
+accordingly. The voltage can also be override by command vdd_override. The
+syntax is
+
+vdd_override <voltage in mV>, eg. 1050 is for 1.050v.
+
+Upon success, the actual voltage will be read back. The value is checked
+for safety and any invalid value will not adjust the voltage.
+
+Another way to override VDD is to use environmental variable, in case of using
+command is too late for some debugging. The syntax is
+
+setenv t4240qds_vdd_mv <voltage in mV>
+saveenv
+reset
+
+The override voltage takes effect when booting.
+
+Note: voltage adjustment needs to be done step by step. Changing voltage too
+rapidly may cause current surge. The voltage stepping is done by software.
+Users can set the final voltage directly.
diff --git a/doc/README.vf610 b/doc/README.vf610
new file mode 100644
index 0000000000..38cf5cfd20
--- /dev/null
+++ b/doc/README.vf610
@@ -0,0 +1,10 @@
+U-Boot for Freescale Vybrid VF610
+
+This file contains information for the port of U-Boot to the Freescale Vybrid
+VF610 SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in fuse bank 4, with the 16 msbs in word 2 and the
+ 32 lsbs in word 3.
diff --git a/doc/device-tree-bindings/video/simple-framebuffer.txt b/doc/device-tree-bindings/video/simple-framebuffer.txt
new file mode 100644
index 0000000000..3ea4605831
--- /dev/null
+++ b/doc/device-tree-bindings/video/simple-framebuffer.txt
@@ -0,0 +1,25 @@
+Simple Framebuffer
+
+A simple frame-buffer describes a raw memory region that may be rendered to,
+with the assumption that the display hardware has already been set up to scan
+out from that buffer.
+
+Required properties:
+- compatible: "simple-framebuffer"
+- reg: Should contain the location and size of the framebuffer memory.
+- width: The width of the framebuffer in pixels.
+- height: The height of the framebuffer in pixels.
+- stride: The number of bytes in each line of the framebuffer.
+- format: The format of the framebuffer surface. Valid values are:
+ - r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b).
+
+Example:
+
+ framebuffer {
+ compatible = "simple-framebuffer";
+ reg = <0x1d385000 (1600 * 1200 * 2)>;
+ width = <1600>;
+ height = <1200>;
+ stride = <(1600 * 2)>;
+ format = "r5g6b5";
+ };
generated by cgit (git 2.34.1) at 2025-01-23 16:33:02 +0000