diff options
Diffstat (limited to 'drivers/clk/imx/clk-imx8mn.c')
| -rw-r--r-- | drivers/clk/imx/clk-imx8mn.c | 108 |
1 files changed, 75 insertions, 33 deletions
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 2d8e373131..e29d902544 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -81,9 +81,24 @@ static const char *imx8mn_ahb_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_p static const char *imx8mn_enet_axi_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_250m", "sys_pll2_200m", "audio_pll1_out", "video_pll1_out", "sys_pll3_out", }; +#ifndef CONFIG_SPL_BUILD +static const char *imx8mn_enet_ref_sels[] = {"clock-osc-24m", "sys_pll2_125m", "sys_pll2_50m", "sys_pll2_100m", + "sys_pll1_160m", "audio_pll1_out", "video_pll1_out", "clk_ext4", }; + +static const char *imx8mn_enet_timer_sels[] = {"clock-osc-24m", "sys_pll2_100m", "audio_pll1_out", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4", "video_pll1_out", }; + +static const char *imx8mn_enet_phy_sels[] = {"clock-osc-24m", "sys_pll2_50m", "sys_pll2_125m", "sys_pll2_200m", + "sys_pll2_500m", "video_pll1_out", "audio_pll2_out", }; +#endif + static const char *imx8mn_nand_usdhc_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_200m", "sys_pll1_133m", "sys_pll3_out", "sys_pll2_250m", "audio_pll1_out", }; +static const char * const imx8mn_usb_bus_sels[] = {"clock-osc-24m", "sys_pll2_500m", "sys_pll1_800m", + "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", + "clk_ext4", "audio_pll2_out", }; + static const char *imx8mn_usdhc1_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", }; @@ -108,6 +123,17 @@ static const char *imx8mn_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_ static const char *imx8mn_usdhc3_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m", "audio_pll2_clk", "sys_pll1_100m", }; +static const char *imx8mn_qspi_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_pll2_333m", "sys_pll2_500m", + "audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m", }; + +static const char * const imx8mn_usb_core_sels[] = {"clock-osc-24m", "sys_pll1_100m", "sys_pll1_40m", + "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", + "clk_ext3", "audio_pll2_out", }; + +static const char * const imx8mn_usb_phy_sels[] = {"clock-osc-24m", "sys_pll1_100m", "sys_pll1_40m", + "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", + "clk_ext3", "audio_pll2_out", }; + static ulong imx8mn_clk_get_rate(struct clk *clk) { struct clk *c; @@ -165,11 +191,33 @@ static int imx8mn_clk_enable(struct clk *clk) return __imx8mn_clk_enable(clk, 1); } +static int imx8mn_clk_set_parent(struct clk *clk, struct clk *parent) +{ + struct clk *c, *cp; + int ret; + + debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); + + ret = clk_get_by_id(clk->id, &c); + if (ret) + return ret; + + ret = clk_get_by_id(parent->id, &cp); + if (ret) + return ret; + + ret = clk_set_parent(c, cp); + c->dev->parent = cp->dev; + + return ret; +} + static struct clk_ops imx8mn_clk_ops = { .set_rate = imx8mn_clk_set_rate, .get_rate = imx8mn_clk_get_rate, .enable = imx8mn_clk_enable, .disable = imx8mn_clk_disable, + .set_parent = imx8mn_clk_set_parent, }; static int imx8mn_clk_probe(struct udevice *dev) @@ -319,6 +367,8 @@ static int imx8mn_clk_probe(struct udevice *dev) imx8m_clk_composite_critical("nand_usdhc_bus", imx8mn_nand_usdhc_sels, base + 0x8900)); + clk_dm(IMX8MN_CLK_USB_BUS, + imx8m_clk_composite("usb_bus", imx8mn_usb_bus_sels, base + 0x8b80)); /* IP */ clk_dm(IMX8MN_CLK_USDHC1, @@ -340,6 +390,12 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_CLK_USDHC3, imx8m_clk_composite("usdhc3", imx8mn_usdhc3_sels, base + 0xbc80)); + clk_dm(IMX8MN_CLK_QSPI, + imx8m_clk_composite("qspi", imx8mn_qspi_sels, base + 0xab80)); + clk_dm(IMX8MN_CLK_USB_CORE_REF, + imx8m_clk_composite("usb_core_ref", imx8mn_usb_core_sels, base + 0xb100)); + clk_dm(IMX8MN_CLK_USB_PHY_REF, + imx8m_clk_composite("usb_phy_ref", imx8mn_usb_phy_sels, base + 0xb180)); clk_dm(IMX8MN_CLK_I2C1_ROOT, imx_clk_gate4("i2c1_root_clk", "i2c1", base + 0x4170, 0)); @@ -363,39 +419,25 @@ static int imx8mn_clk_probe(struct udevice *dev) imx_clk_gate4("wdog3_root_clk", "wdog", base + 0x4550, 0)); clk_dm(IMX8MN_CLK_USDHC3_ROOT, imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0)); - -#ifdef CONFIG_SPL_BUILD - struct clk *clkp, *clkp1; - - clk_get_by_id(IMX8MN_CLK_WDOG1_ROOT, &clkp); - clk_enable(clkp); - clk_get_by_id(IMX8MN_CLK_WDOG2_ROOT, &clkp); - clk_enable(clkp); - clk_get_by_id(IMX8MN_CLK_WDOG3_ROOT, &clkp); - clk_enable(clkp); - - /* Configure SYS_PLL3 to 600MHz */ - clk_get_by_id(IMX8MN_SYS_PLL3, &clkp); - clk_set_rate(clkp, 600000000UL); - clk_enable(clkp); - - /* Configure ARM to sys_pll2_500m */ - clk_get_by_id(IMX8MN_CLK_A53_SRC, &clkp); - clk_get_by_id(IMX8MN_SYS_PLL2_OUT, &clkp1); - clk_enable(clkp1); - clk_get_by_id(IMX8MN_SYS_PLL2_500M, &clkp1); - clk_set_parent(clkp, clkp1); - - /* Configure ARM PLL to 1.2GHz */ - clk_get_by_id(IMX8MN_ARM_PLL, &clkp1); - clk_set_rate(clkp1, 1200000000UL); - clk_get_by_id(IMX8MN_ARM_PLL_OUT, &clkp1); - clk_enable(clkp1); - clk_set_parent(clkp, clkp1); - - /* Configure DIV to 1.2GHz */ - clk_get_by_id(IMX8MN_CLK_A53_DIV, &clkp1); - clk_set_rate(clkp1, 1200000000UL); + clk_dm(IMX8MN_CLK_QSPI_ROOT, + imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0)); + clk_dm(IMX8MN_CLK_USB1_CTRL_ROOT, + imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0)); + + /* clks not needed in SPL stage */ +#ifndef CONFIG_SPL_BUILD + clk_dm(IMX8MN_CLK_ENET_REF, + imx8m_clk_composite("enet_ref", imx8mn_enet_ref_sels, + base + 0xa980)); + clk_dm(IMX8MN_CLK_ENET_TIMER, + imx8m_clk_composite("enet_timer", imx8mn_enet_timer_sels, + base + 0xaa00)); + clk_dm(IMX8MN_CLK_ENET_PHY_REF, + imx8m_clk_composite("enet_phy", imx8mn_enet_phy_sels, + base + 0xaa80)); + clk_dm(IMX8MN_CLK_ENET1_ROOT, + imx_clk_gate4("enet1_root_clk", "enet_axi", + base + 0x40a0, 0)); #endif return 0; |