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-rw-r--r--drivers/mmc/arm_pl180_mmci.c73
-rw-r--r--drivers/mmc/arm_pl180_mmci.h1
-rw-r--r--drivers/mmc/sunxi_mmc.c13
3 files changed, 54 insertions, 33 deletions
diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
index e267cd782e..f71d79ecd6 100644
--- a/drivers/mmc/arm_pl180_mmci.c
+++ b/drivers/mmc/arm_pl180_mmci.c
@@ -357,13 +357,13 @@ static const struct mmc_ops arm_pl180_mmci_ops = {
.set_ios = host_set_ios,
.init = mmc_host_reset,
};
-#endif
/*
* mmc_host_init - initialize the mmc controller.
* Set initial clock and power for mmc slot.
* Initialize mmc struct and register with mmc framework.
*/
+
int arm_pl180_mmci_init(struct pl180_mmc_host *host, struct mmc **mmc)
{
u32 sdi_u32;
@@ -377,9 +377,8 @@ int arm_pl180_mmci_init(struct pl180_mmc_host *host, struct mmc **mmc)
writel(sdi_u32, &host->base->mask0);
host->cfg.name = host->name;
-#ifndef CONFIG_DM_MMC
host->cfg.ops = &arm_pl180_mmci_ops;
-#endif
+
/* TODO remove the duplicates */
host->cfg.host_caps = host->caps;
host->cfg.voltages = host->voltages;
@@ -393,20 +392,34 @@ int arm_pl180_mmci_init(struct pl180_mmc_host *host, struct mmc **mmc)
*mmc = mmc_create(&host->cfg, host);
if (!*mmc)
return -1;
-
debug("registered mmc interface number is:%d\n",
(*mmc)->block_dev.devnum);
return 0;
}
+#endif
#ifdef CONFIG_DM_MMC
+static void arm_pl180_mmc_init(struct pl180_mmc_host *host)
+{
+ u32 sdi_u32;
+
+ writel(host->pwr_init, &host->base->power);
+ writel(host->clkdiv_init, &host->base->clock);
+ udelay(CLK_CHANGE_DELAY);
+
+ /* Disable mmc interrupts */
+ sdi_u32 = readl(&host->base->mask0) & ~SDI_MASK0_MASK;
+ writel(sdi_u32, &host->base->mask0);
+}
+
static int arm_pl180_mmc_probe(struct udevice *dev)
{
struct arm_pl180_mmc_plat *pdata = dev_get_platdata(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct mmc *mmc = &pdata->mmc;
- struct pl180_mmc_host *host = mmc->priv;
+ struct pl180_mmc_host *host = dev->priv;
+ struct mmc_config *cfg = &pdata->cfg;
struct clk clk;
u32 bus_width;
int ret;
@@ -417,31 +430,33 @@ static int arm_pl180_mmc_probe(struct udevice *dev)
ret = clk_enable(&clk);
if (ret) {
+ clk_free(&clk);
dev_err(dev, "failed to enable clock\n");
return ret;
}
- strcpy(host->name, "MMC");
host->pwr_init = INIT_PWR;
host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V1 | SDI_CLKCR_CLKEN |
SDI_CLKCR_HWFC_EN;
- host->voltages = VOLTAGE_WINDOW_SD;
- host->caps = 0;
host->clock_in = clk_get_rate(&clk);
- host->clock_min = host->clock_in / (2 * (SDI_CLKCR_CLKDIV_INIT_V1 + 1));
- host->clock_max = dev_read_u32_default(dev, "max-frequency",
- MMC_CLOCK_MAX);
host->version2 = dev_get_driver_data(dev);
+ cfg->name = dev->name;
+ cfg->voltages = VOLTAGE_WINDOW_SD;
+ cfg->host_caps = 0;
+ cfg->f_min = host->clock_in / (2 * (SDI_CLKCR_CLKDIV_INIT_V1 + 1));
+ cfg->f_max = dev_read_u32_default(dev, "max-frequency", MMC_CLOCK_MAX);
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+
gpio_request_by_name(dev, "cd-gpios", 0, &host->cd_gpio, GPIOD_IS_IN);
bus_width = dev_read_u32_default(dev, "bus-width", 1);
switch (bus_width) {
case 8:
- host->caps |= MMC_MODE_8BIT;
+ cfg->host_caps |= MMC_MODE_8BIT;
/* Hosts capable of 8-bit transfers can also do 4 bits */
case 4:
- host->caps |= MMC_MODE_4BIT;
+ cfg->host_caps |= MMC_MODE_4BIT;
break;
case 1:
break;
@@ -449,19 +464,21 @@ static int arm_pl180_mmc_probe(struct udevice *dev)
dev_err(dev, "Invalid bus-width value %u\n", bus_width);
}
- ret = arm_pl180_mmci_init(host, &mmc);
- if (ret) {
- dev_err(dev, "arm_pl180_mmci init failed\n");
- return ret;
- }
-
+ arm_pl180_mmc_init(host);
+ mmc->priv = host;
mmc->dev = dev;
- dev->priv = host;
upriv->mmc = mmc;
return 0;
}
+int arm_pl180_mmc_bind(struct udevice *dev)
+{
+ struct arm_pl180_mmc_plat *plat = dev_get_platdata(dev);
+
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
+}
+
static int dm_host_request(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
@@ -479,16 +496,11 @@ static int dm_host_set_ios(struct udevice *dev)
static int dm_mmc_getcd(struct udevice *dev)
{
- struct arm_pl180_mmc_plat *pdata = dev_get_platdata(dev);
- struct mmc *mmc = &pdata->mmc;
- struct pl180_mmc_host *host = mmc->priv;
+ struct pl180_mmc_host *host = dev->priv;
int value = 1;
- if (dm_gpio_is_valid(&host->cd_gpio)) {
+ if (dm_gpio_is_valid(&host->cd_gpio))
value = dm_gpio_get_value(&host->cd_gpio);
- if (host->cd_inverted)
- return !value;
- }
return value;
}
@@ -501,12 +513,10 @@ static const struct dm_mmc_ops arm_pl180_dm_mmc_ops = {
static int arm_pl180_mmc_ofdata_to_platdata(struct udevice *dev)
{
- struct arm_pl180_mmc_plat *pdata = dev_get_platdata(dev);
- struct mmc *mmc = &pdata->mmc;
- struct pl180_mmc_host *host = mmc->priv;
+ struct pl180_mmc_host *host = dev->priv;
fdt_addr_t addr;
- addr = devfdt_get_addr(dev);
+ addr = dev_read_addr(dev);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
@@ -527,6 +537,7 @@ U_BOOT_DRIVER(arm_pl180_mmc) = {
.ops = &arm_pl180_dm_mmc_ops,
.probe = arm_pl180_mmc_probe,
.ofdata_to_platdata = arm_pl180_mmc_ofdata_to_platdata,
+ .bind = arm_pl180_mmc_bind,
.priv_auto_alloc_size = sizeof(struct pl180_mmc_host),
.platdata_auto_alloc_size = sizeof(struct arm_pl180_mmc_plat),
};
diff --git a/drivers/mmc/arm_pl180_mmci.h b/drivers/mmc/arm_pl180_mmci.h
index 6b98db6cd9..36487be288 100644
--- a/drivers/mmc/arm_pl180_mmci.h
+++ b/drivers/mmc/arm_pl180_mmci.h
@@ -192,7 +192,6 @@ struct pl180_mmc_host {
struct mmc_config cfg;
#ifdef CONFIG_DM_MMC
struct gpio_desc cd_gpio;
- bool cd_inverted;
#endif
};
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 7fa1ae8b16..39f15eb423 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -70,10 +70,12 @@ static int mmc_resource_init(int sdc_no)
priv->reg = (struct sunxi_mmc *)SUNXI_MMC2_BASE;
priv->mclkreg = &ccm->sd2_clk_cfg;
break;
+#ifdef SUNXI_MMC3_BASE
case 3:
priv->reg = (struct sunxi_mmc *)SUNXI_MMC3_BASE;
priv->mclkreg = &ccm->sd3_clk_cfg;
break;
+#endif
default:
printf("Wrong mmc number %d\n", sdc_no);
return -1;
@@ -116,6 +118,9 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
#ifdef CONFIG_MACH_SUN9I
pll = CCM_MMC_CTRL_PLL_PERIPH0;
pll_hz = clock_get_pll4_periph0();
+#elif defined(CONFIG_MACH_SUN50I_H6)
+ pll = CCM_MMC_CTRL_PLL6X2;
+ pll_hz = clock_get_pll6() * 2;
#else
pll = CCM_MMC_CTRL_PLL6;
pll_hz = clock_get_pll6();
@@ -494,7 +499,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
cfg->host_caps = MMC_MODE_4BIT;
-#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I)
+#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I) || defined(CONFIG_MACH_SUN50I_H6)
if (sdc_no == 2)
cfg->host_caps = MMC_MODE_8BIT;
#endif
@@ -509,6 +514,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
/* config ahb clock */
debug("init mmc %d clock and io\n", sdc_no);
+#if !defined(CONFIG_MACH_SUN50I_H6)
setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MMC(sdc_no));
#ifdef CONFIG_SUNXI_GEN_SUN6I
@@ -520,6 +526,11 @@ struct mmc *sunxi_mmc_init(int sdc_no)
writel(SUNXI_MMC_COMMON_CLK_GATE | SUNXI_MMC_COMMON_RESET,
SUNXI_MMC_COMMON_BASE + 4 * sdc_no);
#endif
+#else /* CONFIG_MACH_SUN50I_H6 */
+ setbits_le32(&ccm->sd_gate_reset, 1 << sdc_no);
+ /* unassert reset */
+ setbits_le32(&ccm->sd_gate_reset, 1 << (RESET_SHIFT + sdc_no));
+#endif
ret = mmc_set_mod_clk(priv, 24000000);
if (ret)
return NULL;
generated by cgit (git 2.34.1) at 2025-01-30 18:48:57 +0000