diff options
Diffstat (limited to 'drivers/mtd/nand/raw/Kconfig')
| -rw-r--r-- | drivers/mtd/nand/raw/Kconfig | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index ffc6cc98aa..7f76e5ecef 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -22,6 +22,44 @@ config NAND_ATMEL Enable this driver for NAND flash platforms using an Atmel NAND controller. +if NAND_ATMEL + +config ATMEL_NAND_HWECC + bool "Atmel Hardware ECC" + default n + +config ATMEL_NAND_HW_PMECC + bool "Atmel Programmable Multibit ECC (PMECC)" + select ATMEL_NAND_HWECC + default n + help + The Programmable Multibit ECC (PMECC) controller is a programmable + binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. + +config PMECC_CAP + int "PMECC Correctable ECC Bits" + depends on ATMEL_NAND_HW_PMECC + default 2 + help + Correctable ECC bits, can be 2, 4, 8, 12, and 24. + +config PMECC_SECTOR_SIZE + int "PMECC Sector Size" + depends on ATMEL_NAND_HW_PMECC + default 512 + help + Sector size, in bytes, can be 512 or 1024. + +config SPL_GENERATE_ATMEL_PMECC_HEADER + bool "Atmel PMECC Header Generation" + select ATMEL_NAND_HWECC + select ATMEL_NAND_HW_PMECC + default n + help + Generate Programmable Multibit ECC (PMECC) header for SPL image. + +endif + config NAND_DAVINCI bool "Support TI Davinci NAND controller" help @@ -261,6 +299,13 @@ config SYS_NAND_BUSWIDTH_16BIT not available while configuring controller. So a static CONFIG_NAND_xx is needed to know the device's bus-width in advance. +config SYS_NAND_MAX_CHIPS + int "NAND max chips" + default 1 + depends on NAND_ARASAN + help + The maximum number of NAND chips per device to be supported. + if SPL config SYS_NAND_U_BOOT_LOCATIONS |